== Series Details ==
Series: drm/i915/display: Update the DDI_BUF_CTL active timeout for ADL-P
URL : https://patchwork.freedesktop.org/series/117375/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13112_full -> Patchwork_117375v1_full
===
== Series Details ==
Series: Add MTL PMU support for multi-gt (rev2)
URL : https://patchwork.freedesktop.org/series/115836/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13115 -> Patchwork_115836v2
Summary
---
**FAIL
== Series Details ==
Series: drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups (rev7)
URL : https://patchwork.freedesktop.org/series/112196/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/112196/revisions/7/mbox/ not
applied
Applying: drm/i91
== Series Details ==
Series: Add MTL PMU support for multi-gt (rev2)
URL : https://patchwork.freedesktop.org/series/115836/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add MTL PMU support for multi-gt (rev2)
URL : https://patchwork.freedesktop.org/series/115836/
State : warning
== Summary ==
Error: dim checkpatch failed
4fcbc0ab4f43 drm/i915/pmu: Support PMU for all engines
64197b1bcaba drm/i915/pmu: Skip sampling engines with no
On Thu, May 04, 2023 at 12:54:40PM -0700, Sean Christopherson wrote:
> On Wed, Mar 15, 2023, Sean Christopherson wrote:
> > On Wed, Mar 15, 2023, Yan Zhao wrote:
> > > On Fri, Mar 10, 2023 at 04:22:51PM -0800, Sean Christopherson wrote:
> > > > Disable the page-track notifier code at compile time i
From: Tvrtko Ursulin
Reserve some bits in the counter config namespace which will carry the
tile id and prepare the code to handle this.
No per tile counters have been added yet.
v2:
- Fix checkpatch issues
- Use 4 bits for gt id in non-engine counters. Drop FIXME.
- Set MAX GTs to 4. Drop FIXM
From: Tvrtko Ursulin
Start exporting frequency and RC6 counters from all tiles.
Existing counters keep their names and config values and new one use the
namespace added in the previous patch, with the "-gtN" added to their
names.
Interrupts counter is an odd one off. Because it is the global de
With MTL, frequency and rc6 counters are specific to a gt. Export these
counters via gt-specific events to the user space.
Signed-off-by: Umesh Nerlige Ramappa
Test-with: 20230506005528.1890922-1-umesh.nerlige.rama...@intel.com
Tvrtko Ursulin (6):
drm/i915/pmu: Support PMU for all engines
d
From: Tvrtko Ursulin
Trivial prep work for full multi-tile enablement later.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Vinay Belgaumkar
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++--
drivers/gpu/drm/i915/i915_pmu.c | 16
dr
From: Tvrtko Ursulin
Given how the metrics are already exported, we also need to run sampling
over engines from all GTs.
Problem of GT frequencies is left for later.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_pmu.c | 13 ++---
1 f
From: Tvrtko Ursulin
We do not want to have timers per tile and waste CPU cycles and energy via
multiple wake-up sources, for a relatively un-important task of PMU
sampling, so keeping a single timer works well. But we also do not want
the first GT which goes idle to turn off the timer.
Add some
From: Tvrtko Ursulin
As we have more and more engines do not waste time sampling the ones no-
one is monitoring.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_pmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i
== Series Details ==
Series: drm/i915/mtl: Fix the wa number for Wa_22016670082
URL : https://patchwork.freedesktop.org/series/117405/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13115 -> Patchwork_117405v1
Summary
--
== Series Details ==
Series: drm/i915: Fix NULL ptr deref by checking new_crtc_state
URL : https://patchwork.freedesktop.org/series/117369/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13110_full -> Patchwork_117369v1_full
On Fri, May 05, 2023 at 04:45:44PM -0700, Radhakrishna Sripada wrote:
> Fixes the right lineage number for the workaround.
>
> Fixes: a7fa1537b791 ("drm/i915/mtl: Implement Wa_14019141245")
> Cc: Matt Roper
> Signed-off-by: Radhakrishna Sripada
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm
Fixes the right lineage number for the workaround.
Fixes: a7fa1537b791 ("drm/i915/mtl: Implement Wa_14019141245")
Cc: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
Hi Matt,
> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, May 4, 2023 4:37 PM
> To: Sripada, Radhakrishna
> Cc: intel-gfx@lists.freedesktop.org; Vivi, Rodrigo
> Subject: Re: [Intel-gfx] [PATCH v1.1] drm/i915/mtl: Implement
> Wa_14019141245
>
> On Tue, Apr 25, 2023 at 11:
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev10)
URL : https://patchwork.freedesktop.org/series/117004/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13114 -> Patchwork_117004v10
===
On Fri, May 05, 2023 at 11:46:11PM +0300, Imre Deak wrote:
> If the output on a DP-alt link with its sink disconnected is kept
> enabled for too long (about 20 sec), then some IOM/TCSS firmware timeout
> will cause havoc on the PCI bus, at least for other GFX devices on it
> which will stop powerin
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev10)
URL : https://patchwork.freedesktop.org/series/117004/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/tc: Add a workaround for an IOM/TCSS firmware hang issue
(rev10)
URL : https://patchwork.freedesktop.org/series/117004/
State : warning
== Summary ==
Error: dim checkpatch failed
2da4ae991f31 drm/i915: Fix PIPEDMC disabling for a bigjoiner configuration
9
== Series Details ==
Series: C20 Computed HDMI TMDS pixel clocks
URL : https://patchwork.freedesktop.org/series/117399/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13114 -> Patchwork_117399v1
Summary
---
**SUCCESS*
== Series Details ==
Series: C20 Computed HDMI TMDS pixel clocks
URL : https://patchwork.freedesktop.org/series/117399/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: C20 Computed HDMI TMDS pixel clocks
URL : https://patchwork.freedesktop.org/series/117399/
State : warning
== Summary ==
Error: dim checkpatch failed
25766d718057 drm/i915: Add 16bit register/mask operators
-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__n' -
== Series Details ==
Series: series starting with [1/2] drm/i915/mtl: Drop FLAT CCS check
URL : https://patchwork.freedesktop.org/series/117391/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13114 -> Patchwork_117391v1
Summ
== Series Details ==
Series: drm/i915: GSC FW support for MTL
URL : https://patchwork.freedesktop.org/series/117396/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/117396/revisions/1/mbox/ not
applied
Applying: DO NOT REVIEW: drm/i915: HuC loading
== Series Details ==
Series: series starting with [1/2] drm/i915/mtl: Drop FLAT CCS check
URL : https://patchwork.freedesktop.org/series/117391/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/in
Prevent downgrading the link training maximum lane count/rate if the
sink is disconnected - and so the link training failure is expected. In
such cases modeset failures due to the reduced max link params would be
just confusing for user space (instead of which the correct thing it
should act on is
If the output on a DP-alt link with its sink disconnected is kept
enabled for too long (about 20 sec), then some IOM/TCSS firmware timeout
will cause havoc on the PCI bus, at least for other GFX devices on it
which will stop powering up. Since user space is not guaranteed to do a
disabling modeset
If a sink is disconnected it's expected that link training actions will
fail on it, so downgrade the error messages about such actions to be a
debug message. Such - expected - link training failures are more
frequent after a follow up patch, after which an active TypeC link is
reset after the sink
During HW readout/sanitization CRTCs can be disabled only if they don't
have an attached encoder (and so the encoder disable hooks don't need to
be called). An upcoming patch will need to disable CRTCs also with an
attached an encoder, so add support for this.
For bigjoiner configs the encoder dis
Add functions for printing link training debug and error messages, both
to prepare for the next patch, which downgrades an error to a debug
message if the sink is disconnected and to remove some code duplication.
v2: (Ville)
- Always print the connector prefix.
- Preserve the drm_dbg_kms() debug c
Split calling the CRTC/encoder disabling hooks and updating the CRTC and
DPLL object states from updating the CRTC and atomic state and other
global state (BW, CDCLK, DBUF) into separate functions. When disabling a
bigjoiner configuration the latter step can be done only after all the
linked pipes
Factor out a function setting the encoder and CRTC in the connector
atomic state, required by a follow up patch.
No functional changes.
v2:
- Rebased on changes in patch 4.
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Imre Deak
---
.../drm/i915/display/intel_modeset_setup.c
Make sure that the CRTC state is reset correctly, as expected after
disabling the CRTC.
In particular this change will:
- Zero all the CSC blob pointers after intel_crtc_free_hw_state()
has freed them.
- Zero the shared DPLL and port PLL pointers and clear the
corresponding CRTC reference flag
== Series Details ==
Series: drm/ttm: Allow the driver to resolve a WW transaction rollback
URL : https://patchwork.freedesktop.org/series/117389/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13114 -> Patchwork_117389v1
Su
== Series Details ==
Series: drm/ttm: Allow the driver to resolve a WW transaction rollback
URL : https://patchwork.freedesktop.org/series/117389/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Thu, May 04, 2023 at 06:27:53PM +0200, Andrzej Hajda wrote:
> Hi maintainers of net and i915,
>
> On 25.04.2023 00:05, Andrzej Hajda wrote:
> > This is revived patchset improving ref_tracker library and converting
> > i915 internal tracker to ref_tracker.
> > The old thread ended without consen
== Series Details ==
Series: series starting with [1/4] drm/i915/mtl: Drop FLAT CCS check (rev2)
URL : https://patchwork.freedesktop.org/series/117272/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13114 -> Patchwork_117272v2
===
Hello,
On Wed, May 03, 2023 at 10:34:56AM +0200, Maarten Lankhorst wrote:
> RFC as I'm looking for comments.
>
> For long running compute, it can be beneficial to partition the GPU memory
> between cgroups, so each cgroup can use its maximum amount of memory without
> interfering with other sched
== Series Details ==
Series: series starting with [1/4] drm/i915/mtl: Drop FLAT CCS check (rev2)
URL : https://patchwork.freedesktop.org/series/117272/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [1/4] drm/i915/mtl: Drop FLAT CCS check (rev2)
URL : https://patchwork.freedesktop.org/series/117272/
State : warning
== Summary ==
Error: dim checkpatch failed
dc3883be8311 drm/i915/mtl: Drop FLAT CCS check
e09733f11ed1 drm/i915/mtl: Add MTL f
Use algorithm to generate HDMI C20 PLL clock frequencies.
BSPEC: 64568
Cc: Radhakrishna Sripada
Cc: Mika Kahola
Cc: Anusha Srivatsa
Cc: Gustavo Sousa
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 89 +--
.../gpu/drm/i915/display/intel_cx0_phy
Use computed C20 HDMI TMDS pixel clocks to support 25.175MHz to
594000MHz modes. Add 16 Bit mask operators to support C20 phy
programming.
BSPEC: 64568
Cc: Imre Deak
Cc: Mika Kahola
Cc: Radhakrishna Sripada
Cc: Gustavo Sousa
Signed-off-by: Clint Taylor
Clint Taylor (2):
drm/i915: Add 16b
Add the support macros to define/extract bits as 16bits.
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/i915_reg_defs.h | 49
1 file changed, 49 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h
b/drivers/gpu/drm/i915/i915_reg_defs.h
index 622d6
On Fri, May 05, 2023 at 07:44:11PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 06:55:18PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 05:17:06PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 05:05:55PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Thu, May 04, 2023 at 01:45:24PM -0700, John Harrison wrote:
On 5/4/2023 13:29, Lucas De Marchi wrote:
On Thu, May 04, 2023 at 01:22:52PM -0700, john.c.harri...@intel.com
wrote:
From: John Harrison
Also switch to using reduced version file naming as it is no longer
such a work-in-progress a
On Fri, May 05, 2023 at 11:15:18AM +, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Friday, May 5, 2023 4:36 PM
> > To: Shankar, Uma
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915: Pick one HDMI port for
>
On 5/3/2023 1:40 AM, john.c.harri...@intel.com wrote:
From: John Harrison
The validation of the firmware table was being done inside the code
for scanning the table for the next available firmware blob. Which is
unnecessary. So pull it out into a separate function that is only
called once pe
On Fri, May 05, 2023 at 06:55:18PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 05:17:06PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 05:05:55PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 04:57:54PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Thu, Apr 27, 2023 at 06:25:59PM +0530, Ankit Nautiyal wrote:
> This patch series is part of a previous series:
> https://patchwork.freedesktop.org/series/109470/
>
> This adds new member sink_format to store the final format that the
> sink will be using, which might be different than the outpu
Add FW definition and the matching override modparam.
The GSC FW has both a release version, based on platform and a rolling
counter, and a compatibility version, which is the one tracking
interface changes. Since what we care about is the interface, we use
the compatibility version in the buinary
A few fixes/updates are required around the GSC memory allocation and it
is easier to do them all at the same time. The changes are as follows:
1 - Switch the memory allocation to stolen memory. We need to avoid
accesses from GSC FW to normal memory after the suspend function has
completed and to
Add a new debugfs to dump information about the GSC. This includes:
- the FW path and SW tracking status;
- the release, security and compatibility versions;
- the HECI1 status registers.
Note that those are the same registers that the mei driver dumps in
their own status sysfs on DG2 (where mei
The release and security versions of the GSC binary are not used at
runtime to decide interface compatibility (there is a separate version
for that), but they're still useful for debug, so it is still worth
extracting them and printing them out in dmesg.
To get to these version, we need to navigat
The compatibility version is queried via an MKHI command. Right now, the
only existing interface is 1.0
This is basically the interface version for the GSC FW, so the plan is
to use it as the main tracked version, including for the binary naming
in the fetch code.
Signed-off-by: Daniele Ceraolo Sp
This is a of the HuC support for MTL series [1]. It's been included
because one of the new patches in this series depend on it, but it
should be reviewd separately in its own thread.
[1] https://patchwork.freedesktop.org/series/117080/
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i9
Last chunk of the required support for the GSC FW. This includes some
fixes to the GSC memory allocation, FW idefinition and version
management, plus a new debugfs for debug information.
Adding the FW definition will enable all the features that are dependent
on the GSC being loaded (Media C6, HuC
On Fri, May 05, 2023 at 05:17:06PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 05:05:55PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 04:57:54PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 04:42:33PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
From: Clint Taylor
Add support for remapping CCS FBs on MTL to remove the restriction
of the power-of-two sized stride and the 2MB surface offset alignment
for these FBs.
Signed-off-by: Clint Taylor
Signed-off-by: Juha-Pekka Heikkila
Reviewed-by: Radhakrishna Sripada
Signed-off-by: Nirmoy Das
From: Pallavi Mishra
Remove FLAT CCS check from XY_FAST_COLOR_BLT usage, thus
enabling MTL to use it.
Signed-off-by: Pallavi Mishra
Signed-off-by: Juha-Pekka Heikkila
Reviewed-by: Nirmoy Das
Reviewed-by: Andrzej Hajda
Reviewed-by: Andi Shyti
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i
On Thu, May 04, 2023 at 07:57:30PM +0300, Jani Nikula wrote:
> Split hotplug irq handling out of i915_irq.[ch] into
> display/intel_hotplug_irq.[ch].
>
> The line between the new intel_hotplug_irq.[ch] and the existing
> intel_hotplug.[ch] needs further clarification, but the first step is to
> mo
On Thu, May 04, 2023 at 07:57:29PM +0300, Jani Nikula wrote:
> Move gmbus and dp aux irq handlers to their respective files. It should
> be up to them what to do with the irq, not the generic irq code.
I wonder if we shouldn't merge these 2 functions since they are identical
and leave only the gmb
The following changes since commit 2bc50f50b092087636cc216f1605c557dc12a1ee:
Merge branch 'mtl_guc_70.6.6' of
git://anongit.freedesktop.org/drm/drm-firmware (2023-05-04 07:20:20 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware mtl_gsc_102.0.0.155
On Tue, Apr 18, 2023 at 07:04:30AM -0700, Nikita Zhandarovich wrote:
> drm_dp_dsc_sink_max_slice_count() may return 0 if something goes
> wrong on the part of the DSC sink and its DPCD register. This null
> value may be later used as a divisor in intel_dsc_compute_params(),
> which will lead to an
I just now noticed the other comments. Wiill address them.
On 2023-05-03 17:31, Tvrtko Ursulin wrote:
On 03/05/2023 09:34, Maarten Lankhorst wrote:
Based roughly on the rdma and misc cgroup controllers, with a lot of
the accounting code borrowed from rdma.
The interface is simple:
- populate
Allow drivers to resolve a WW transaction rollback. This allows for
1) Putting a lower-priority transaction to sleep allowing another to
succeed instead both fighting using trylocks.
2) Letting the driver know whether a received -ENOMEM is the result of
competition with another WW transaction, whic
On Fri, May 05, 2023 at 05:05:55PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 04:57:54PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 04:42:33PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 04:28:50PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
== Series Details ==
Series: drm/i915/display: Update the DDI_BUF_CTL active timeout for ADL-P
URL : https://patchwork.freedesktop.org/series/117375/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13112 -> Patchwork_117375v1
On Fri, May 05, 2023 at 04:57:54PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 04:42:33PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 04:28:50PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 04:21:16PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 04:42:33PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 04:28:50PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 04:21:16PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 04:11:52PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 03:52:12PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 03:46:40PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 03:27:51PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 03:09:01PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 04:28:50PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 04:21:16PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 04:11:52PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 03:54:58PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 04:21:16PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 04:11:52PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 03:54:58PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 03:46:40PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 04:11:52PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 03:54:58PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 03:46:40PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 03:27:51PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 03:54:58PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 03:46:40PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 03:27:51PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 03:09:01PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 03:46:40PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 03:27:51PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 03:09:01PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 02:41:24PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 03:46:40PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 03:27:51PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 03:09:01PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 02:41:24PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 03:27:51PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 03:09:01PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 02:41:24PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 02:25:46PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 03:09:01PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 02:41:24PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 02:25:46PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 02:20:17PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 11:22:36AM +0300, Govindapillai, Vinod wrote:
> On Thu, 2023-05-04 at 02:10 +0300, Imre Deak wrote:
> > If a sink is disconnected it's expected that link training actions will
> > fail on it, so downgrade the error messages about such actions to be a
> > debug message. Such
On Fri, May 05, 2023 at 02:41:24PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 02:25:46PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 02:20:17PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 02:06:34PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 11:51:51AM +0300, Jani Nikula wrote:
> On Thu, 04 May 2023, Ville Syrjälä wrote:
> > On Thu, May 04, 2023 at 02:10:43AM +0300, Imre Deak wrote:
> >> Add functions for printing link training debug and error messages, both
> >> to prepare for the next patch, which downgrades
On Fri, May 05, 2023 at 02:25:46PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 02:20:17PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 02:06:34PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 02:05:27PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 02:20:17PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 02:06:34PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 02:05:27PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 02:02:43PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 02:06:34PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 02:05:27PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 02:02:43PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 01:58:03PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
> -Original Message-
> From: Ville Syrjälä
> Sent: Friday, May 5, 2023 4:36 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915: Pick one HDMI port for
> infoframe/audio transmission on g4x
>
> On Thu, May 04, 2023 at 09:13:27PM
For ADL-P the timeout for DDI_BUF_CTL active is 500usec.
Update the same as per Bspec:55424.
Fixes: 5add4575c298 ("drm/i915/ddi: Align timeout for DDI_BUF_CTL active with
Bspec")
Cc: Ankit Nautiyal
Cc: Imre Deak
Cc: Lucas De Marchi
Cc: # v6.3+
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/
On Fri, May 05, 2023 at 10:47:58AM +0800, kernel test robot wrote:
> tree/branch:
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
> branch HEAD: 145e5cddfe8b4bf607510b2dcf630d95f4db420f Add linux-next
> specific files for 20230504
>
> Error/Warning reports:
>
> https
On Fri, May 05, 2023 at 02:06:34PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 02:05:27PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 02:02:43PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 01:58:03PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Fri, May 0
On Fri, May 05, 2023 at 02:05:27PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 02:02:43PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 01:58:03PM +0300, Lisovskiy, Stanislav wrote:
> > > On Fri, May 05, 2023 at 01:54:14PM +0300, Ville Syrjälä wrote:
> > > > On Fri, May 0
On Thu, May 04, 2023 at 09:13:27PM +, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of
> > Ville Syrjala
> > Sent: Tuesday, November 8, 2022 1:16 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 5/5] drm/i915: Pick one HDMI po
On Fri, May 05, 2023 at 02:02:43PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 01:58:03PM +0300, Lisovskiy, Stanislav wrote:
> > On Fri, May 05, 2023 at 01:54:14PM +0300, Ville Syrjälä wrote:
> > > On Fri, May 05, 2023 at 11:22:12AM +0300, Stanislav Lisovskiy wrote:
> > > > intel_atomic_g
On Fri, May 05, 2023 at 01:58:03PM +0300, Lisovskiy, Stanislav wrote:
> On Fri, May 05, 2023 at 01:54:14PM +0300, Ville Syrjälä wrote:
> > On Fri, May 05, 2023 at 11:22:12AM +0300, Stanislav Lisovskiy wrote:
> > > intel_atomic_get_new_crtc_state can return NULL, unless crtc state wasn't
> > > obtai
On Fri, May 05, 2023 at 01:54:14PM +0300, Ville Syrjälä wrote:
> On Fri, May 05, 2023 at 11:22:12AM +0300, Stanislav Lisovskiy wrote:
> > intel_atomic_get_new_crtc_state can return NULL, unless crtc state wasn't
> > obtained previously with intel_atomic_get_crtc_state, so we must check it
> > for N
On Fri, May 05, 2023 at 11:22:12AM +0300, Stanislav Lisovskiy wrote:
> intel_atomic_get_new_crtc_state can return NULL, unless crtc state wasn't
> obtained previously with intel_atomic_get_crtc_state, so we must check it
> for NULLness here, just as in many other places, where we can't guarantee
>
On Thu, 04 May 2023, Rodrigo Vivi wrote:
> On Thu, May 04, 2023 at 12:20:41PM +0300, Jani Nikula wrote:
>> On Wed, 03 May 2023, Rodrigo Vivi wrote:
>> > On Tue, May 02, 2023 at 06:37:27PM +0300, Jani Nikula wrote:
>> >> You can't document function pointer member as functions.
>> >>
>> >> drivers/
On Thu, 04 May 2023, Rodrigo Vivi wrote:
> But let's not block the progress of the much needed fixes. It's your call:
>
> Reviewed-by: Rodrigo Vivi
Thanks, pushed to drm-intel-gt-next as-is.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
On Fri, May 05, 2023 at 11:29:22AM +0200, Andrzej Hajda wrote:
> On 05.05.2023 10:22, Stanislav Lisovskiy wrote:
> > intel_atomic_get_new_crtc_state can return NULL, unless crtc state wasn't
> > obtained previously with intel_atomic_get_crtc_state, so we must check it
> > for NULLness here, just as
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