On Tue, 28 Mar 2023 16:35:43 -0700, Ashutosh Dixit wrote:
>
> On ATSM the PL1 limit is disabled at power up. The previous uapi assumed
> that the PL1 limit is always enabled and therefore did not have a notion of
> a disabled PL1 limit. This results in erroneous PL1 limit values when the
> PL1 limi
> From: Alex Williamson
> Sent: Thursday, March 30, 2023 3:57 AM
>
> On Mon, 27 Mar 2023 02:40:43 -0700
> Yi Liu wrote:
>
[...]
> > +/*
> > + * device access via the fd opened by this function is blocked until
> > + * .open_device() is called successfully during BIND_IOMMUFD.
> > + */
> > +int
== Series Details ==
Series: Add MTL PMU support for multi-gt
URL : https://patchwork.freedesktop.org/series/115836/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12937 -> Patchwork_115836v1
Summary
---
**SUCCESS**
== Series Details ==
Series: Add MTL PMU support for multi-gt
URL : https://patchwork.freedesktop.org/series/115836/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add MTL PMU support for multi-gt
URL : https://patchwork.freedesktop.org/series/115836/
State : warning
== Summary ==
Error: dim checkpatch failed
11153695e917 drm/i915/pmu: Support PMU for all engines
e81f792130c7 drm/i915/pmu: Skip sampling engines with no enable
> From: Tian, Kevin
> Sent: Thursday, March 30, 2023 9:10 AM
>
> > From: Jason Gunthorpe
> > Sent: Wednesday, March 29, 2023 11:50 PM
> >
> > On Wed, Mar 29, 2023 at 09:41:26AM +, Tian, Kevin wrote:
> >
> > > We could extend bind_iommufd to return the group id or introduce a
> > > new ioctl
> From: Jason Gunthorpe
> Sent: Wednesday, March 29, 2023 11:58 PM
>
> On Wed, Mar 29, 2023 at 09:49:44AM -0600, Alex Williamson wrote:
>
> > > We could extend bind_iommufd to return the group id or introduce a
> > > new ioctl to query it per dev_id.
> >
> > That would be ironic to go to all thi
> From: Jason Gunthorpe
> Sent: Wednesday, March 29, 2023 11:50 PM
>
> On Wed, Mar 29, 2023 at 09:41:26AM +, Tian, Kevin wrote:
>
> > We could extend bind_iommufd to return the group id or introduce a
> > new ioctl to query it per dev_id.
>
> > Once that is in place looks we don't need a ne
Use a helper to convert frequency values to MHz.
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_pmu.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 2a5deabff088..40ce
From: Tvrtko Ursulin
Reserve some bits in the counter config namespace which will carry the
tile id and prepare the code to handle this.
No per tile counters have been added yet.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_pmu.c | 153 +++-
drivers/
With MTL, frequency and rc6 counters are specific to a gt. Export these
counters via gt-specific events to the user space.
Signed-off-by: Umesh Nerlige Ramappa
Test-with: 20230330003656.1294873-1-umesh.nerlige.rama...@intel.com
Tvrtko Ursulin (6):
drm/i915/pmu: Support PMU for all engines
dr
From: Tvrtko Ursulin
We do not want to have timers per tile and waste CPU cycles and energy via
multiple wake-up sources, for a relatively un-important task of PMU
sampling, so keeping a single timer works well. But we also do not want
the first GT which goes idle to turn off the timer.
Add some
From: Tvrtko Ursulin
Given how the metrics are already exported, we also need to run sampling
over engines from all GTs.
Problem of GT frequencies is left for later.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_pmu.c | 14 +++---
1 file changed, 11 insertions(+), 3 dele
Split the event reading function into engine and other helpers.
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_pmu.c | 93 ++---
1 file changed, 52 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/
From: Tvrtko Ursulin
Start exporting frequency and RC6 counters from all tiles.
Existing counters keep their names and config values and new one use the
namespace added in the previous patch, with the "-gtN" added to their
names.
Interrupts counter is an odd one off. Because it is the global de
MTL introduces separate GTs for render and media. This complicates the
definition of frequency and rc6 counters for the GPU as a whole since
each GT has an independent counter. The best way to support this change
is to deprecate the GPU-specific counters and create GT-specific
counters, however tha
From: Tvrtko Ursulin
Trivial prep work for full multi-tile enablement later.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++--
drivers/gpu/drm/i915/i915_pmu.c | 16
drivers/gpu/drm/i915/i915_pmu.h |
From: Tvrtko Ursulin
As we have more and more engines do not waste time sampling the ones no-
one is monitoring.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_pmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_
== Series Details ==
Series: Add MTL Wa_14017066071, Wa_14017654203 and Wa_22015279794 (rev2)
URL : https://patchwork.freedesktop.org/series/115821/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12937 -> Patchwork_115821v2
On Wed, 2023-03-29 at 08:43 +0100, Tvrtko Ursulin wrote:
> On 28/03/2023 18:52, Rodrigo Vivi wrote:
> > On Tue, Mar 28, 2023 at 05:01:36PM +, Teres Alexis, Alan Previn wrote:
> > > On Mon, 2023-03-27 at 17:15 +0100, Tvrtko Ursulin wrote:
> > >
alan:snip
> How will the context create path look
On Wed, Mar 29, 2023 at 03:00:55PM -0600, Alex Williamson wrote:
> > + * The user should provide a device cookie when calling this ioctl. The
> > + * cookie is carried only in event e.g. I/O fault reported to userspace
> > + * via iommufd. The user should use devid returned by this ioctl to mark
>
On Wed, 29 Mar 2023 16:47:49 -0600
Alex Williamson wrote:
> On Mon, 27 Mar 2023 02:40:47 -0700
> Yi Liu wrote:
>
> > This gives notes for userspace applications on device cdev usage.
> >
> > Reviewed-by: Kevin Tian
> > Signed-off-by: Yi Liu
> > ---
> > Documentation/driver-api/vfio.rst | 12
On Mon, 27 Mar 2023 02:40:47 -0700
Yi Liu wrote:
> This gives notes for userspace applications on device cdev usage.
>
> Reviewed-by: Kevin Tian
> Signed-off-by: Yi Liu
> ---
> Documentation/driver-api/vfio.rst | 127 ++
> 1 file changed, 127 insertions(+)
>
> dif
== Series Details ==
Series: series starting with [1/3] drm/i915: Skip cursor when writing
PLANE_CHICKEN
URL : https://patchwork.freedesktop.org/series/115815/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12937 -> Patchwork_115815v1
==
== Series Details ==
Series: drm/i915: (mostly) PSR related register cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/115708/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12937 -> Patchwork_115708v2
Summary
-
== Series Details ==
Series: drm/i915: (mostly) PSR related register cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/115708/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include
== Series Details ==
Series: drm/i915: (mostly) PSR related register cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/115708/
State : warning
== Summary ==
Error: dim checkpatch failed
c68fc57101a3 drm/i915: Fix up whitespace in some display chicken registers
07f7a824fe2d drm/i91
On Mon, 27 Mar 2023 02:40:46 -0700
Yi Liu wrote:
> group code is not needed for vfio device cdev, so with vfio device cdev
> introduced, the group infrastructures can be compiled out if only cdev
> is needed.
>
> Reviewed-by: Kevin Tian
> Tested-by: Terrence Xu
> Signed-off-by: Yi Liu
> ---
>
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix fast wake AUX sync len
URL : https://patchwork.freedesktop.org/series/115810/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12937 -> Patchwork_115810v1
S
From: Radhakrishna Sripada
Wa_22015279794 applies to MTL P from stepping A0 to B0 (exclusive).
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Gustavo Sousa
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 ++
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5
From: Radhakrishna Sripada
Both workarounds require the same implementation and apply to MTL P and
M from stepping A0 to B0 (exclusive).
v2:
- Remove unrelated brace removal. (Matt)
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Gustavo Sousa
Reviewed-by: Matt Roper
---
drivers/gpu/dr
Add some GT workarounds for MTL. Note that Wa_14017066071 and Wa_14017654203
require the same implementation and have the same platform and stepping bounds,
so there is a single patch for them.
v2:
- Remove unrelated brace removal in first patch. (Matt)
Radhakrishna Sripada (2):
drm/i915/mtl:
Nit, ATDETACH? [AT|DE]TACH?
On Mon, 27 Mar 2023 02:40:45 -0700
Yi Liu wrote:
> This adds ioctl for userspace to attach device cdev fd to and detach
> from IOAS/hw_pagetable managed by iommufd.
>
> VFIO_DEVICE_ATTACH_IOMMUFD_PT: attach vfio device to IOAS, hw_pagetable
>
== Series Details ==
Series: drm/scdc-helper: Pimp SCDC debugs
URL : https://patchwork.freedesktop.org/series/115807/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12937 -> Patchwork_115807v1
Summary
---
**FAILURE**
On Wed, Mar 29, 2023 at 05:24:51PM -0300, Gustavo Sousa wrote:
> From: Radhakrishna Sripada
>
> Wa_22015279794 applies to MTL P from stepping A0 to B0 (exclusive).
>
> Signed-off-by: Radhakrishna Sripada
> Signed-off-by: Gustavo Sousa
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt
On Wed, Mar 29, 2023 at 05:24:50PM -0300, Gustavo Sousa wrote:
> From: Radhakrishna Sripada
>
> Both workarounds require the same implementation and apply to MTL P and
> M from stepping A0 to B0 (exclusive).
>
> Signed-off-by: Radhakrishna Sripada
> Signed-off-by: Gustavo Sousa
> ---
> driver
On Mon, 27 Mar 2023 02:40:44 -0700
Yi Liu wrote:
> This adds ioctl for userspace to bind device cdev fd to iommufd.
>
> VFIO_DEVICE_BIND_IOMMUFD: bind device to an iommufd, hence gain DMA
> control provided by the iommufd. open_device
>
From: Radhakrishna Sripada
Both workarounds require the same implementation and apply to MTL P and
M from stepping A0 to B0 (exclusive).
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_worka
From: Radhakrishna Sripada
Wa_22015279794 applies to MTL P from stepping A0 to B0 (exclusive).
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 6 ++
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
2 files changed, 1
Add some GT workarounds for MTL. Note that Wa_14017066071 and Wa_14017654203
require the same implementation and have the same platform and stepping bounds,
so there is a single patch for them.
Radhakrishna Sripada (2):
drm/i915/mtl: Add workarounds Wa_14017066071 and Wa_14017654203
drm/i915/m
== Series Details ==
Series: drm/i915: Add support for MTL GSC SW Proxy
URL : https://patchwork.freedesktop.org/series/115806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12936 -> Patchwork_115806v1
Summary
---
**S
On Mon, Mar 27, 2023 at 02:33:47AM -0700, Yi Liu wrote:
> @@ -494,6 +479,30 @@ void iommufd_access_destroy(struct iommufd_access
> *access)
> }
> EXPORT_SYMBOL_NS_GPL(iommufd_access_destroy, IOMMUFD);
>
> +int iommufd_access_attach(struct iommufd_access *access, u32 ioas_id)
> +{
> + struc
On Mon, 27 Mar 2023 02:40:43 -0700
Yi Liu wrote:
> This allows user to directly open a vfio device w/o using the legacy
> container/group interface, as a prerequisite for supporting new iommu
> features like nested translation.
>
> The device fd opened in this manner doesn't have the capability
== Series Details ==
Series: drm/i915: Add support for MTL GSC SW Proxy
URL : https://patchwork.freedesktop.org/series/115806/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Add support for MTL GSC SW Proxy
URL : https://patchwork.freedesktop.org/series/115806/
State : warning
== Summary ==
Error: dim checkpatch failed
cd5858341f03 drm/i915/mtl: Define GSC Proxy component interface
Traceback (most recent call last):
File "s
== Series Details ==
Series: drm/i915: Replace kmap_atomic() with kmap_local_page()
URL : https://patchwork.freedesktop.org/series/115769/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12931_full -> Patchwork_115769v1_full
On Mon, Mar 27, 2023 at 02:33:45AM -0700, Yi Liu wrote:
> Nicolin Chen (1):
> iommufd: Create access in vfio_iommufd_emulated_bind()
>
> Yi Liu (5):
> iommu/iommufd: Pass iommufd_ctx pointer in iommufd_get_ioas()
> vfio-iommufd: No need to record iommufd_ctx in vfio_device
> vfio-iommufd:
On Tue, Mar 28, 2023 at 07:22:24PM +0300, Jani Nikula wrote:
> On Mon, 27 Mar 2023, Rodrigo Vivi wrote:
> > uncore->lock only protects the forcewake domain itself,
> > not the register accesses.
> >
> > uncore's _fw alternatives are for cases where the domains
> > are not needed because we are sur
== Series Details ==
Series: High refresh rate PSR fixes (rev7)
URL : https://patchwork.freedesktop.org/series/115109/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12936 -> Patchwork_115109v7
Summary
---
**SUCCESS**
== Series Details ==
Series: High refresh rate PSR fixes (rev7)
URL : https://patchwork.freedesktop.org/series/115109/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1:
From: Ville Syrjälä
Define CUR_CHICKEN so we don't have to remember the offset.
Looks like it's getting introduced in mtl.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i9
From: Ville Syrjälä
Add tgl+ comments to the PLANE_CHICKEN registers which
I apparently forgot to add when defining the registers.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_
From: Ville Syrjälä
Cursor is not a universal plane and thus doesn't have the
PLANE_CHICKEN register. Skip it.
Fixes: c5de248484af ("drm/i915/dpt: Add a modparam to disable DPT via the
chicken bit")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dpt.c | 6 +-
1 file c
== Series Details ==
Series: drm/i915: Add CSC state readout/check
URL : https://patchwork.freedesktop.org/series/115794/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12936 -> Patchwork_115794v1
Summary
---
**SUCCES
On Tue, Mar 28, 2023 at 12:30:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Define more of the PSR mask bits, and describe in detail
> what some of them do. Even if we don't set them all from
> the driver they can be very useful during PSR debugging.
> Having to trawl through bspec e
== Series Details ==
Series: drm/i915: Add CSC state readout/check
URL : https://patchwork.freedesktop.org/series/115794/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:
== Series Details ==
Series: drm/i915: Add CSC state readout/check
URL : https://patchwork.freedesktop.org/series/115794/
State : warning
== Summary ==
Error: dim checkpatch failed
01fd9db0cec9 drm/i915: Fix limited range csc matrix
e8f2d513ac2d drm/i915: Introduce intel_csc_matrix struct
40e6
== Series Details ==
Series: series starting with [1/5] drm/debugfs: drop debugfs_init() for the
render and accel node v2
URL : https://patchwork.freedesktop.org/series/115793/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12936 -> Patchwork_115793v1
=
Hi Christian,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Christian-K-nig/drm-debugfs-rework-debugfs-directory-creation-v2/20230329-212234
base: git://anongit.freedesktop.org/drm/drm-tip drm
== Series Details ==
Series: series starting with [1/5] drm/debugfs: drop debugfs_init() for the
render and accel node v2
URL : https://patchwork.freedesktop.org/series/115793/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be c
== Series Details ==
Series: series starting with [1/5] drm/debugfs: drop debugfs_init() for the
render and accel node v2
URL : https://patchwork.freedesktop.org/series/115793/
State : warning
== Summary ==
Error: dim checkpatch failed
ec995fc695c1 drm/debugfs: drop debugfs_init() for the ren
== Series Details ==
Series: drm/i915: Make utility pin asserts more accurate (rev2)
URL : https://patchwork.freedesktop.org/series/115741/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12936 -> Patchwork_115741v2
Summary
-
From: Ville Syrjälä
Replace the hardcoded final numbers in the AUX SYNC/precharge
setup, and derive those from numbers from the (e)DP specs.
The new functions can serve as the single point of truth for
the number of SYNC pulses we use.
Cc: Jouni Högander
Signed-off-by: Ville Syrjälä
---
driv
From: Ville Syrjälä
Fast wake should use 8 SYNC pulses for the preamble
and 10-16 SYNC pulses for the precharge. Recuce our
fast wake SYNC count to match the maximum value.
We also use the maximum precharge length for normal
AUX transactions.
Cc: Jouni Högander
Signed-off-by: Ville Syrjälä
---
== Series Details ==
Series: drm/i915: Make utility pin asserts more accurate (rev2)
URL : https://patchwork.freedesktop.org/series/115741/
State : warning
== Summary ==
Error: dim checkpatch failed
2cfb34bea1f1 drm/i915: Make utility pin asserts more accurate
-:12: WARNING:COMMIT_LOG_USE_LINK
From: Ville Syrjälä
Include the device and connector information in the SCDC
debugs. Makes it easier to figure out who did what.
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Robert Foss
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: Thierry Reding
Cc: Emma Anholt
Cc: Maxime Ri
The GSC notifies us of a proxy request via the HECI2 interrupt. The
interrupt must be enabled both in the HECI layer and in our usual gt irq
programming; for the latter, the interrupt is enabled via the same enable
register as the GSC CS, but it does have its own mask register. When the
interrupt i
The GSC uC needs to communicate with the CSME to perform certain
operations. Since the GSC can't perform this communication directly
on platforms where it is integrated in GT, i915 needs to transfer the
messages from GSC to CSME and back.
The proxy flow is as follow:
1 - i915 submits a request to G
From: Alexander Usyskin
GSC Proxy component is used for communication between the
Intel graphics driver and MEI driver.
Cc: Daniele Ceraolo Spurio
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Acked-by: Greg Kroah-Hartman
---
include/drm/i915_component.h
On platforms where the GSC is part of GT, it needs to communicate with
CSME for some of its operations. However, there is no direct HW
communication channel, so the i915 and mei drivers must carry the
messages back and forth between the 2 units. The protocol is fully
described in the i915 patch tha
From: Alexander Usyskin
Add GSC proxy driver. It to allows messaging between GSC component
on Intel on board graphics card and CSE device.
Cc: Daniele Ceraolo Spurio
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Acked-by: Greg Kroah-Hartman
---
drivers/misc/
== Series Details ==
Series: drm/i915/mtl: Add Support for C10 chips (rev2)
URL : https://patchwork.freedesktop.org/series/115664/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12936 -> Patchwork_115664v2
Summary
---
== Series Details ==
Series: Update DSC Bigjoiner BW check (rev2)
URL : https://patchwork.freedesktop.org/series/115773/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/115773/revisions/2/mbox/ not
applied
Applying: drm/i915/dp: Update Bigjoiner in
== Series Details ==
Series: drm/i915/mtl: Add Support for C10 chips (rev2)
URL : https://patchwork.freedesktop.org/series/115664/
State : warning
== Summary ==
Error: dim checkpatch failed
9a839bd9b6b9 drm/i915/mtl: Initial DDI port setup
febb42d9125a drm/i915/mtl: Add DP rates
7ad8892410b2 d
== Series Details ==
Series: drm/i915/mtl: Add Support for C10 chips (rev2)
URL : https://patchwork.freedesktop.org/series/115664/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On mercoledì 29 marzo 2023 09:32:11 CEST Zhao Liu wrote:
> From: Zhao Liu
>
> Hi list,
>
> Sorry for a long delay since v1 [1]. This patchset is based on 197b6b6
> (Linux 6.3-rc4).
>
> Welcome and thanks for your review and comments!
>
>
> # Purpose of this patchset
>
> The purpose of this p
On Wed, Mar 29, 2023 at 06:40:39PM +0300, Imre Deak wrote:
> On Mon, Mar 27, 2023 at 03:34:30PM +0300, Mika Kahola wrote:
> [...]
> > +}
> > +
> > +static int intel_cx0_wait_for_ack(struct drm_i915_private *i915, enum port
> > port, int lane, u32 *val)
> > +{
> > + enum phy phy = intel_port_to_
On Wed, Mar 29, 2023 at 09:49:44AM -0600, Alex Williamson wrote:
> > We could extend bind_iommufd to return the group id or introduce a
> > new ioctl to query it per dev_id.
>
> That would be ironic to go to all this trouble to remove groups from
> the API only to have them show up here.
Groups
On Wed, Mar 29, 2023 at 09:41:26AM +, Tian, Kevin wrote:
> We could extend bind_iommufd to return the group id or introduce a
> new ioctl to query it per dev_id.
> Once that is in place looks we don't need a new _INFO ioctl?
The iommu_group and the reset group are different things
The issue
On Wed, 29 Mar 2023 09:41:26 +
"Tian, Kevin" wrote:
> > From: Liu, Yi L
> > Sent: Wednesday, March 29, 2023 11:14 AM
> >
> > > From: Alex Williamson
> > > Sent: Wednesday, March 29, 2023 12:00 AM
> > >
> > >
> > > Personally I don't like the suggestion to fail with -EPERM if the user
> >
On Mon, Mar 27, 2023 at 03:34:30PM +0300, Mika Kahola wrote:
> From: Radhakrishna Sripada
>
> XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy
> has a dedicated PIPE 5.2 Message bus for configuration. This message
> bus is used to configure the phy internal registers.
>
> XE
Hi Thomas,
On Tue, Mar 28, 2023 at 01:14:20PM +0200, Thomas Zimmermann wrote:
> Initialize i915's fbdev client by giving an instance of struct
> drm_client_funcsi to drm_client_init(). Also clean up with
An extra i had sneaked in here
Sam
Ensure vblank >= psr2 vblank
where
Psr2 vblank = PSR2_CTL Block Count Number maximum line count.
Bspec: 71580, 49274
v2: Use calculated block count number maximum line count
Signed-off-by: Jouni Högander
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_psr.c | 9 +
1
Implement Display WA #1136 for Pre-ICL.
Bspec: 21664
v2: Handle disable psr in pre/post plane hooks
Signed-off-by: Jouni Högander
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 +++
drivers/gpu/drm/i915/display/skl_watermark.c | 5 -
2 files changed, 7
PSR WM optimization should be disabled based on any wm level being
disabled. Also same WA should be applied for ICL as well.
Bspec: 71580
v5:
- Set in pre plane hook and clear in post plane hook
v4:
- Handle mode change in psr enable/disable
- Handle wm_level_disable changes separately in pre
Add helpers to make it more clear how PSR2_CTL[Block Count Number]
is configured.
Signed-off-by: Jouni Högander
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_psr.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/di
pre/post hooks are doing things differently. Unify them.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
Wa_16013835468 is a separate from Wa_14015648006 and needs to be
applied for display version 12. Fix this by removing all the
references to Wa_14015648006 and apply Wa_16013835468 according to
Bspec.
Also move workaround into separate function as a preparation for
Wa_14015648006 implementation.
B
Fix/adjust Wa_16013835468 and implement Wa_14015648006. Implement Wa_1136 and
check for vblank being long enough for psr2.
v7:
- Apply Wa_14015648006 for display version 12 only
- Disable WM optimization in pre plane hook allow in post plane hook
v6:
- Handle mode change in psr enable/disable
== Series Details ==
Series: drm/i915: move DSC RC tables to drm_dsc_helper.c (rev4)
URL : https://patchwork.freedesktop.org/series/114473/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12931_full -> Patchwork_114473v4_full
== Series Details ==
Series: drm/i915: use ref_tracker library for tracking wakerefs (rev7)
URL : https://patchwork.freedesktop.org/series/100327/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12934 -> Patchwork_100327v7
Su
On Wed, Mar 29, 2023 at 04:44:12PM +0300, Lisovskiy, Stanislav wrote:
> On Wed, Mar 29, 2023 at 02:35:38PM +0300, Ville Syrjälä wrote:
> > On Wed, Mar 29, 2023 at 05:00:55PM +0530, Nautiyal, Ankit K wrote:
> > >
> > > On 3/29/2023 4:23 PM, Ville Syrjälä wrote:
> > > > On Wed, Mar 29, 2023 at 04:06
== Series Details ==
Series: drm/i915: use ref_tracker library for tracking wakerefs (rev7)
URL : https://patchwork.freedesktop.org/series/100327/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: use ref_tracker library for tracking wakerefs (rev7)
URL : https://patchwork.freedesktop.org/series/100327/
State : warning
== Summary ==
Error: dim checkpatch failed
a48ff8d4bbf3 lib/ref_tracker: add unlocked leak print helper
-:6: WARNING:COMMIT_LOG_LON
From: Ville Syrjälä
In order to validate LUT programming more thoroughly let's
do a state check for all color management updates as well.
Not sure we really want this outside CI. It is rather heavy
and color management updates could become rather common
with all the HDR/etc. stuff happening. May
From: Ville Syrjälä
Include the csc matrices in the state dump. The format being
hardware specific we just dump as hex for now. Might have
to think of some way to get a bit more human readable
output...
Signed-off-by: Ville Syrjälä
---
.../drm/i915/display/intel_crtc_state_dump.c | 43 +++
From: Ville Syrjälä
Read out the csc matrix on chv, and stash the result into the
correct spot in the crtc state.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 36 ++
1 file changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
From: Ville Syrjälä
Have the state checker validate that the csc matrices
look correct when read back from the hardware.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 21
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/i915/
From: Ville Syrjälä
Make sure the csc enable bit(s) match the way we're about to
fill the csc matrices.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_col
From: Ville Syrjälä
Read out the pipe/output csc matrices on ilk+ and stash the results
(in the hardware specific format) into the appropriate place
in the crtc state.
Note that on skl/glk/icl the pipe csc unit suffers from an issue
where *reads* of the coefficient/offset registers also disarm
t
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