== Series Details ==
Series: drm/i915/dg2: Fix platforms without display
URL : https://patchwork.freedesktop.org/series/113782/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12713_full -> Patchwork_113782v1_full
Summary
---
== Series Details ==
Series: series starting with [1/2] drm/i915: Populate wm.max_level for everyone
(rev2)
URL : https://patchwork.freedesktop.org/series/113808/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12718 -> Patchwork_113808v2
===
== Series Details ==
Series: series starting with [1/2] drm/i915: Populate wm.max_level for everyone
(rev2)
URL : https://patchwork.freedesktop.org/series/113808/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separat
== Series Details ==
Series: series starting with [1/2] drm/i915: Populate wm.max_level for everyone
URL : https://patchwork.freedesktop.org/series/113808/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12717 -> Patchwork_113808v1
===
On Tue, Feb 07, 2023 at 11:05:55AM -0800, Lucas De Marchi wrote:
On Mon, Feb 06, 2023 at 08:04:29PM +, Patchwork wrote:
== Series Details ==
Series: series starting with [v2,1/2] drm/i915: Fix GEN8_MISCCPCTL
URL : https://patchwork.freedesktop.org/series/113713/
State : failure
== Summar
From: Ville Syrjälä
Switch ilk+ and skl+ platforms to also setting up
wm.max_level and remove a bunch of if ladders as a result.
There will be a tiny change in the debugfs on CHV machines
that have DVFS disabled in the BIOS. Presviously debugfs
would show the latency for the DVFS level as well,
From: Ville Syrjälä
Replaces wm.max_level with wm.num_levels, since that generally
results in nicer looking code (for-loops can be in standard
form etc.).
Also get rid of the two different wrappers we have for this
(ilk_wm_max_level() and intel_wm_num_levels()). They don't
really do anything for
== Series Details ==
Series: drm: Add plane SIZE_HINTS property (rev2)
URL : https://patchwork.freedesktop.org/series/113758/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12716 -> Patchwork_113758v2
Summary
---
**SU
== Series Details ==
Series: drm/i915/dg2: Drop one PCI ID
URL : https://patchwork.freedesktop.org/series/113802/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12716 -> Patchwork_113802v1
Summary
---
**SUCCESS**
N
== Series Details ==
Series: series starting with [1/6] drm/gem: Remove BUG_ON in
drm_gem_private_object_init
URL : https://patchwork.freedesktop.org/series/113771/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12712_full -> Patchwork_113771v1_full
===
== Series Details ==
Series: Revert "drm/i915/hwmon: Enable PL1 power limit"
URL : https://patchwork.freedesktop.org/series/113793/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12716 -> Patchwork_113793v1
Summary
---
== Series Details ==
Series: Revert "drm/i915/hwmon: Enable PL1 power limit"
URL : https://patchwork.freedesktop.org/series/113793/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
On Wed, Feb 08, 2023 at 03:03:49PM +0200, Ville Syrjälä wrote:
> On Wed, Feb 08, 2023 at 02:13:12PM +0200, Pekka Paalanen wrote:
> > On Wed, 8 Feb 2023 06:09:10 +0200
> > Ville Syrjala wrote:
> >
> > > From: Ville Syrjälä
> > >
> > > Add a new immutable plane property by which a plane can adve
From: Ville Syrjälä
Add a new immutable plane property by which a plane can advertise
a handful of recommended plane sizes. This would be mostly exposed
by cursor planes as a slightly more capable replacement for
the DRM_CAP_CURSOR_WIDTH/HEIGHT caps, which can only declare
a one size fits all lim
On Wed, Feb 08, 2023 at 12:09:05PM -0800, Matt Roper wrote:
> The bspec was recently updated to remove PCI ID 0x5698; this ID is
> actually reserved for future use and should not be treated as DG2-G11.
>
> Bspec: 44477
> Fixes: 8618b8489ba6 ("drm/i915: DG2 and ATS-M device ID updates")
> Signed-of
The bspec was recently updated to remove PCI ID 0x5698; this ID is
actually reserved for future use and should not be treated as DG2-G11.
Bspec: 44477
Fixes: 8618b8489ba6 ("drm/i915: DG2 and ATS-M device ID updates")
Signed-off-by: Matt Roper
---
include/drm/i915_pciids.h | 1 -
1 file changed,
On Wed, Feb 08, 2023 at 11:03:12AM -0800, Ashutosh Dixit wrote:
> This reverts commit 0349c41b05968befaffa5fbb7e73d0ee6004f610.
>
> 0349c41b0596 ("drm/i915/hwmon: Enable PL1 power limit") is incorrect and
> caused a major regression on ATSM. The change enabled the PL1 power limit
> but FW sets the
On Wed, Feb 08, 2023 at 11:48:45AM +0200, Jani Nikula wrote:
> Add intel_wm_num_levels(), i9xx_wm_num_levels() and skl_wm_num_levels()
> functions.
>
> There's a difference between i9xx_wm_num_levels() and
> g4x_wm_num_levels(), but leave that unresolved for now to avoid
> functional changes.
Uff
== Series Details ==
Series: drm/i915: add guard page to ggtt->error_capture (rev6)
URL : https://patchwork.freedesktop.org/series/113560/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12715 -> Patchwork_113560v6
Summary
--
This reverts commit 0349c41b05968befaffa5fbb7e73d0ee6004f610.
0349c41b0596 ("drm/i915/hwmon: Enable PL1 power limit") is incorrect and
caused a major regression on ATSM. The change enabled the PL1 power limit
but FW sets the default value of the PL1 limit to 0 which implies HW now
works at minimum
== Series Details ==
Series: series starting with [1/4] drm/gem-vram: handle NULL bo->resource in
move callback
URL : https://patchwork.freedesktop.org/series/113788/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12713 -> Patchwork_113788v1
===
== Series Details ==
Series: mei: gsc proxy component
URL : https://patchwork.freedesktop.org/series/113786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12713 -> Patchwork_113786v1
Summary
---
**SUCCESS**
No reg
== Series Details ==
Series: drm/i915/dg2: Fix platforms without display
URL : https://patchwork.freedesktop.org/series/113782/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12713 -> Patchwork_113782v1
Summary
---
**
== Series Details ==
Series: drm/i915/display: Add a debugfs entry for fifo underruns
URL : https://patchwork.freedesktop.org/series/113781/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12713 -> Patchwork_113781v1
Summary
== Series Details ==
Series: drm/i915: add guard page to ggtt->error_capture (rev5)
URL : https://patchwork.freedesktop.org/series/113560/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12713 -> Patchwork_113560v5
Summary
--
== Series Details ==
Series: drm/i915/display: Communicate display configuration to pcode (rev2)
URL : https://patchwork.freedesktop.org/series/102678/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12712 -> Patchwork_102678v2
===
== Series Details ==
Series: series starting with [1/6] drm/gem: Remove BUG_ON in
drm_gem_private_object_init
URL : https://patchwork.freedesktop.org/series/113771/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12712 -> Patchwork_113771v1
=
On Wed, Feb 08, 2023 at 12:17:23PM -0500, Rodrigo Vivi wrote:
> On Wed, Feb 08, 2023 at 04:23:56PM +0200, Tomas Winkler wrote:
> > GSC Proxy component is used for communication between the
> > Intel graphics driver and MEI driver.
> >
> > Daniele, please ack so that drm part can be merged via Greg
On Wed, Feb 08, 2023 at 04:23:56PM +0200, Tomas Winkler wrote:
> GSC Proxy component is used for communication between the
> Intel graphics driver and MEI driver.
>
> Daniele, please ack so that drm part can be merged via Greg's tree.
Cc: Daniele, since he was missing on this submission.
He rais
On 2/7/23 23:09, Ville Syrjala wrote:
From: Ville Syrjälä
Add a new immutable plane property by which a plane can advertise
a handful of recommended plane sizes. This would be mostly exposed
by cursor planes as a slightly more capable replacement for
the DRM_CAP_CURSOR_WIDTH/HEIGHT caps, whi
On Wed, Feb 08, 2023 at 10:23:55AM -0500, Rodrigo Vivi wrote:
> On Tue, Feb 07, 2023 at 08:43:37AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Use the second backlight controller on ICP+ if the VBT asks
> > us to do so.
> >
> > On pre-MTP we also check the chicken bit to make sur
On Tue, Feb 07, 2023 at 08:43:37AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use the second backlight controller on ICP+ if the VBT asks
> us to do so.
>
> On pre-MTP we also check the chicken bit to make sure the
> pins have been correctly muxed by the firmware.
>
It looks like CC
== Series Details ==
Series: series starting with [1/4] drm/gem-vram: handle NULL bo->resource in
move callback
URL : https://patchwork.freedesktop.org/series/113788/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked sep
The ttm bo now initially has NULL bo->resource, and leaves the driver
the handle that. However it looks like we forgot to handle that for
radeon. It looks like this will just null-ptr-deref in
radeon_bo_move(), if bo->resource is NULL.
Fix this by calling move_null().
Fixes: 180253782038 ("drm/t
The ttm bo now initially has NULL bo->resource, and leaves the driver
the handle that. However it looks like we forgot to handle that for
vmwgfx. It looks like this will just null-ptr-deref in vmw_move(), if
bo->resource is NULL.
Fix this by calling move_null() if the new resource is TTM_PL_SYSTE
The ttm BO now initially has NULL bo->resource, and leaves the driver
the handle that. However it looks like we forgot to handle that for
ttm_bo_move_memcpy() users, like with vram-gem, since it just silently
returns zero. This seems to then trigger warnings like:
WARNING: CPU: 0 PID: 1 at drivers
The ttm bo now initially has NULL bo->resource, and leaves the driver
the handle that. However it looks like we forgot to handle that for qxl.
It looks like this will just null-ptr-deref in qxl_bo_move(), if
bo->resource is NULL.
Fix this by calling move_null() if the new resource is TTM_PL_SYSTEM
== Series Details ==
Series: mei: gsc proxy component
URL : https://patchwork.freedesktop.org/series/113786/
State : warning
== Summary ==
Error: dim checkpatch failed
18b0d2ae5b42 drm/i915/mtl: Define GSC Proxy component interface
Traceback (most recent call last):
File "scripts/spdxcheck.p
== Series Details ==
Series: drm/i915/dg2: Fix platforms without display
URL : https://patchwork.freedesktop.org/series/113782/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.
Hi Matt,
On Fri, Jan 27, 2023 at 04:03:21PM +, Matthew Auld wrote:
> At the very least, we have some tests that force the BAR size for
> testing purposes, which would result in different BAR size with
> stolen-lmem vs normal lmem, since the BAR is only resized as part of the
> normal lmem prob
Hello Matt Roper,
The patch 3100240bf846: "drm/i915/mtl: Add hardware-level lock for
steering" from Nov 28, 2022, leads to the following Smatch static
checker warning:
drivers/gpu/drm/i915/gt/intel_gt_mcr.c:379 intel_gt_mcr_lock() warn: sleeping
in atomic context
CALL TREE:
intel_engine_reset()
From: Alexander Usyskin
Add GSC proxy driver. It to allows messaging between GSC component
on Intel on board graphics card and CSE device.
Cc: Daniele Ceraolo Spurio
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
V2: refactor match function
use device i
From: Alexander Usyskin
GSC Proxy component is used for communication between the
Intel graphics driver and MEI driver.
Cc: Daniele Ceraolo Spurio
Cc: Alan Previn
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
V2: This patch was missing in the first series
V3: Don't mainta
GSC Proxy component is used for communication between the
Intel graphics driver and MEI driver.
Daniele, please ack so that drm part can be merged via Greg's tree.
V2:
1. Add missing patch from the series
2. Use device information instead of driver name
to identify the aggregate device.
V3:
1.
Hi Jani,
Thanks for the reviews. Please find my replies inline.
On 07-Feb-23 2:05 PM, Jani Nikula wrote:
On Tue, 07 Feb 2023, Suraj Kandpal wrote:
From: Swati Sharma
DSC_Output_Format_Sink_Support entry is added to i915_dsc_fec_support_show
to depict if sink supports DSC output formats (RGB
On Wed, Feb 08, 2023 at 11:48:40AM +0200, Jani Nikula wrote:
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index ee8f8d2d2a66..649c4d222f79 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> -
> +static void gen9_init_clock_
Hello Matthew Brost,
The patch cad46a332f3d: "drm/i915/guc: Suspend/resume implementation
for new interface" from Jul 26, 2021, leads to the following Smatch
static checker warning:
drivers/gpu/drm/i915/gt/uc/intel_guc.c:655 intel_guc_suspend()
error: passing non negative 26843545
On Wed, Feb 08, 2023 at 11:48:39AM +0200, Jani Nikula wrote:
> The memory frequency detection is a bit spread out here and
> there. Consolidate to intel_dram.c.
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/gt/intel_rps.c | 29 -
> drivers/gpu/drm/i915/i
On Wed, Feb 08, 2023 at 11:45:50AM +0200, Stanislav Lisovskiy wrote:
> From: Jigar Bhatt
>
> Display to communicate "display configuration" to Pcode for more accurate
> power accounting for DG2. Existing sequence is only sending the voltage
> value to the Pcode. Adding new sequence with current c
On Wed, Feb 08, 2023 at 11:48:42AM +0200, Jani Nikula wrote:
> Get rid of the if ladder in intel_modeset_setup_hw_state() and hide a
> number of functions by adding a .get_hw_state() hook to watermark
> functions. At least for now, combine the platform specific sanitization
> to the hw state readou
On Wed, Feb 08, 2023 at 02:13:12PM +0200, Pekka Paalanen wrote:
> On Wed, 8 Feb 2023 06:09:10 +0200
> Ville Syrjala wrote:
>
> > From: Ville Syrjälä
> >
> > Add a new immutable plane property by which a plane can advertise
> > a handful of recommended plane sizes. This would be mostly exposed
== Series Details ==
Series: drm/i915/wm: legacy watermark code shuffling
URL : https://patchwork.freedesktop.org/series/113775/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
CC [M] drivers/gpu/drm/i915/display/i9xx_wm.o
drivers/gpu/dr
On Tue, Feb 07, 2023 at 07:37:58PM -0300, Gustavo Sousa wrote:
> On Wed, Feb 01, 2023 at 02:28:31PM -0800, Matt Roper wrote:
> > Although register information in the bspec includes a field that is
> > supposed to reflect a register's reset characteristics (i.e., whether a
> > register maintains its
Hi Jani,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-i915-move-memory-frequency-detection-to-intel_dram-c/20230208-175057
base: git://anongit.freedesktop.org/drm/drm-tip
Hi Jani,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-i915-move-memory-frequency-detection-to-intel_dram-c/20230208-175057
base: git://anongit.freedesktop.org/drm/drm-tip
Hi Jani,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Jani-Nikula/drm-i915-move-memory-frequency-detection-to-intel_dram-c/20230208-175057
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
Hi Tvrtko,
one small nit, see below.
On 2023-02-03 at 11:16:34 +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> If output is redirected to a file, or a pipe, lets not repeat the headers
> because that can usually mean user is trying to parse the data later and
> so repeated headers are a
That finally starts to look sane. I'm going to make a few more
adjustments and then send this out.
Christian.
Am 08.02.23 um 10:01 schrieb Somalapuram Amaranath:
Change resource->start from pfn to bytes to
allow allocating objects smaller than a page.
Change all DRM drivers using ttm_resource
Am 08.02.23 um 10:01 schrieb Somalapuram Amaranath:
Use amdgpu_bo_in_cpu_visible_vram() instead.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdg
On Wed, 08 Feb 2023, Stanislav Lisovskiy wrote:
> From: Jigar Bhatt
>
> Display to communicate "display configuration" to Pcode for more accurate
> power accounting for DG2. Existing sequence is only sending the voltage
> value to the Pcode. Adding new sequence with current cdclk associate
> with
Detecting in intel_device_info_runtime_init() that the display is fused
off or not present should only zero intel_runtime_info::pipe_mask, while
the other related masks will be accordingly zeroed later in the
function. Remove the redundant zeroing of the related fields on GEN7/8.
Cc: Jani Nikula
If fbdev is not initialized for some reason - in practice on platforms
without display - suspending fbdev should be skipped during system
suspend, fix this up. While at it add an assert that suspending fbdev
only happens with the display present.
This fixes the following:
[ 91.227923] PM: suspe
DG1/DG2 and MTL+ has added a new display-present HW flag. Check this
flag and if cleared, disable the driver's display functionality.
So far the missing check resulted in running the display initialization
sequence, and the WARNs below, due to the display register accesses
timing out:
[3.9028
Determining whether the display engine is present on a platform happens
only in intel_device_info_runtime_init(). Initializing the display power
functionality depends on this condition, so move
intel_power_domains_init() later after the runtime init function has
been called.
The next patch fixing
This is v2 of [1] fixing DG2 platforms without display, addressing the
review comments from Jani and fixing one related issue noticed by the
bug reporter.
[1] https://patchwork.freedesktop.org/series/113711/
Cc: Jani Nikula
Imre Deak (4):
drm/i915: Fix system suspend without fbdev being initi
On 08/02/2023 11:29, Andrzej Hajda wrote:
On 08.02.2023 12:17, Andrzej Hajda wrote:
On 08.02.2023 12:03, Matthew Auld wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to pref
Hi Stanislav,
[...]
> +/**
> + * intel_display_to_pcode- inform pcode for display config
> + * @cdclk: current cdclk as per new or old state
> + * @voltage_level: current voltage_level send to Pcode
> + * @active_pipes: active pipes for more accurate power accounting
> + */
> +static void intel_d
On Tue, 07 Feb 2023, Ville Syrjälä wrote:
> On Tue, Feb 07, 2023 at 01:16:26PM +0200, Jani Nikula wrote:
>> With backlight controller set to -1 in intel_panel_init_alloc() to
>> distinguish uninitialized values, and controller later being set only if
>> it's present in VBT, we can end up with -1 f
Hi Swati,
[...]
> +static void intel_fifo_underrun_inc_count(struct intel_crtc *crtc,
> + bool is_cpu_fifo)
I'm not a big fan of the true/false parameters in functions. I
actually hate them because it's never clear from the caller what
the true/false means.
On 08.02.2023 12:17, Andrzej Hajda wrote:
On 08.02.2023 12:03, Matthew Auld wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie i
On 08.02.2023 12:03, Matthew Auld wrote:
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE in
On 08/02/2023 10:51, Andrzej Hajda wrote:
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE in GGTT.
If this PTE points to invalid address
From: Mohammed Khajapasha
Add a debugfs entry i915_fifo_underruns to indicate the count of
fifo underruns for each pipe.
Cc: Stanislav Lisovskiy
Signed-off-by: Mohammed Khajapasha
Signed-off-by: Swati Sharma
---
.../drm/i915/display/intel_display_debugfs.c | 28 ++
.../drm/i
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE in GGTT.
If this PTE points to invalid address DMAR errors will occur.
This behaviour was o
On Tue, 07 Feb 2023, Matt Roper wrote:
> On Tue, Feb 07, 2023 at 01:06:19PM +0200, Jani Nikula wrote:
>> The ucode part in the init, fini, suspend and resume function names is
>> just unnecessary. Drop it.
>>
>> Cc: Imre Deak
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Matt Roper
Thanks fo
== Series Details ==
Series: drm/i915/display: Communicate display configuration to pcode (rev2)
URL : https://patchwork.freedesktop.org/series/102678/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [1/6] drm/gem: Remove BUG_ON in
drm_gem_private_object_init
URL : https://patchwork.freedesktop.org/series/113771/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separ
The file was never really about pm types, and now it's even more
obvious. Move under display as intel_wm_types.h.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_core.h | 2 +-
drivers/gpu/drm/i915/display/intel_display_types.h | 2
Add intel_wm_num_levels(), i9xx_wm_num_levels() and skl_wm_num_levels()
functions.
There's a difference between i9xx_wm_num_levels() and
g4x_wm_num_levels(), but leave that unresolved for now to avoid
functional changes.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/dis
Rename intel_wm_num_levels() to g4x_wm_num_levels() to make the name
available for generic watermark code.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/g
Follow the new convention of placing debugfs with the code.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_debugfs.c | 224 +
drivers/gpu/drm/i915/display/intel_wm.c | 232 ++
drivers/gpu/drm/i915/display/intel_wm.h
Move the generic sanitize_watermarks() to intel_wm.[ch] and rename as
intel_wm_sanitize(). The slightly unfortunate downside is having to
expose intel_atomic_check() from intel_display.c, but this declutters
intel_display.c nicely.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/dr
Observe that most uses of ilk_wm_max_level() are more naturally
implemented using the number of levels, not the max level. Switch to the
*_wm_num_levels() functions. The SKL+ code can use skl_wm_num_levels()
directly, while others shall use the generic intel_wm_num_levels().
Make ilk_wm_max_level(
Get rid of the if ladder in intel_modeset_setup_hw_state() and hide a
number of functions by adding a .get_hw_state() hook to watermark
functions. At least for now, combine the platform specific sanitization
to the hw state readouts on the relevant platforms instead of adding a
separate hook for th
Move the wrappers to call watermark hooks into intel_wm.[ch]. This
declutters intel_display.c nicely.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 95 -
drivers/gpu/drm/i915/display/intel_wm.c | 105 +++
dr
The memory frequency detection is a bit spread out here and
there. Consolidate to intel_dram.c.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/intel_rps.c | 29 -
drivers/gpu/drm/i915/intel_pm.c | 101
drivers/gpu/drm/i915/soc/intel_dram.c
In short, move all watermark code out of intel_pm.c, and sprinkle a
bunch of cleanups around it.
Jani Nikula (10):
drm/i915: move memory frequency detection to intel_dram.c
drm/i915/wm: move remaining watermark code out of intel_pm.c
drm/i915/wm: move functions to call watermark hooks to int
From: Jigar Bhatt
Display to communicate "display configuration" to Pcode for more accurate
power accounting for DG2. Existing sequence is only sending the voltage
value to the Pcode. Adding new sequence with current cdclk associate
with voltage value masking. Adding pcode request when any power
Change the size of GDS, GWS and OA from pages to bytes.
The initialized gds_size, gws_size and oa_size in bytes,
remove PAGE_SHIFT in amdgpu_ttm_init_on_chip().
:
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c| 12 ++--
drivers/gpu/drm/amd/amdgpu/amdg
Change the ttm_range_man_alloc() allocation from pages to size in bytes.
Fix the dependent drm_mm_nodes start and size from pages to bytes.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/i915/i915_scatterlist.c | 6 +++---
drivers/gpu/drm/ttm/ttm_range_manager.c | 15 +++
Use amdgpu_bo_in_cpu_visible_vram() instead.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
i
Change the parameters of ttm_range_man_init_nocheck()
size from page size to byte size.
Cleanup the PAGE_SHIFT operation on the depended caller functions.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/drm_gem_vram_helper.c | 2 +-
dr
Change resource->start from pfn to bytes to
allow allocating objects smaller than a page.
Change all DRM drivers using ttm_resource start and size pfn to bytes.
Change amdgpu_res_first() cur->start, cur->size from pfn to bytes.
Replacing ttm_resource resource->start field with cursor.start.
Change
ttm_resource can allocate size in bytes to support less than page size.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/drm_gem.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 59a0bb5ebd85..ee8b5c2b6c60 100644
--- a/driv
== Series Details ==
Series: drm/i915: Prep work for vbt.ports[] nukage
URL : https://patchwork.freedesktop.org/series/113753/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12712_full -> Patchwork_113753v1_full
Summary
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