== Series Details ==
Series: drm/i915/mtl: Initial display workarounds
URL : https://patchwork.freedesktop.org/series/111592/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12463_full -> Patchwork_111592v1_full
Summary
-
== Series Details ==
Series: drm/i915/hwmon: Silence "mailbox access failed" warning in
snb_pcode_read
URL : https://patchwork.freedesktop.org/series/111599/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12463 -> Patchwork_111599v1
== Series Details ==
Series: drm/i915/hwmon: Silence "mailbox access failed" warning in
snb_pcode_read
URL : https://patchwork.freedesktop.org/series/111599/
State : warning
== Summary ==
Error: dim checkpatch failed
941c63ebf808 drm/i915/hwmon: Silence "mailbox access failed" warning in
snb
hwm_pcode_read_i1 is called during i915 load. This results in the following
warning from snb_pcode_read because POWER_SETUP_SUBCOMMAND_READ_I1 is
unsupported on DG1/DG2.
[drm:snb_pcode_read [i915]] warning: pcode (read from mbox 47c) \
mailbox access failed for snb_
== Series Details ==
Series: add guard padding around i915_vma (rev7)
URL : https://patchwork.freedesktop.org/series/110720/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12462_full -> Patchwork_110720v7_full
Summary
--
== Series Details ==
Series: drm/i915/guc: enable GuC GGTT invalidation from the start (rev2)
URL : https://patchwork.freedesktop.org/series/110772/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12463 -> Patchwork_110772v2
== Series Details ==
Series: drm/i915/guc: enable GuC GGTT invalidation from the start (rev2)
URL : https://patchwork.freedesktop.org/series/110772/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
++Rodrigo, Daniele, Jani.
Hey folks - any concerns with this approach?
i915->pxp--->[feature functions]
|---> [tee-backends-folder]
|--->mei-pxp transport functions (legacy)
|--->gsccs transport functions (mtl+)
tee backend folder basi
== Series Details ==
Series: series starting with [v8,1/1] drm/i915/pxp: Promote pxp subsystem to
top-level of i915
URL : https://patchwork.freedesktop.org/series/111598/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12463 -> Patchwork_111598v1
===
== Series Details ==
Series: series starting with [v8,1/1] drm/i915/pxp: Promote pxp subsystem to
top-level of i915
URL : https://patchwork.freedesktop.org/series/111598/
State : warning
== Summary ==
Error: dim checkpatch failed
bdc87ed76da1 drm/i915/pxp: Promote pxp subsystem to top-level o
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any tile. However, depending on the platform,
only one of the tiles is used for control events pe
== Series Details ==
Series: Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev8)
URL : https://patchwork.freedesktop.org/series/107550/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12462_full -> Patchwork_107550v8_full
==
== Series Details ==
Series: drm/i915/mtl: Check full IP version when applying hw steering semaphore
URL : https://patchwork.freedesktop.org/series/111595/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12463 -> Patchwork_111595v1
===
On Fri, Dec 02, 2022 at 02:35:28PM -0800, Matt Roper wrote:
> When determining whether the platform has a hardware-level steering
> semaphore (i.e., MTL and beyond), we need to use GRAPHICS_VER_FULL() to
> compare the full version rather than just the major version number
> returned by GRAPHICS_VER
When determining whether the platform has a hardware-level steering
semaphore (i.e., MTL and beyond), we need to use GRAPHICS_VER_FULL() to
compare the full version rather than just the major version number
returned by GRAPHICS_VER().
Reported-by: kernel test robot
Fixes: 3100240bf846 ("drm/i915/
On Tue, 29 Nov 2022 21:34:27 -0800, Riana Tauro wrote:
>
> diff --git a/drivers/gpu/drm/i915/selftests/libpower.c
> b/drivers/gpu/drm/i915/selftests/libpower.c
> index c66e993c5f85..3d4d2dc74a54 100644
> --- a/drivers/gpu/drm/i915/selftests/libpower.c
> +++ b/drivers/gpu/drm/i915/selftests/libpowe
On Tue, 29 Nov 2022 21:34:25 -0800, Riana Tauro wrote:
>
> Rename librapl files to libpower and replace librapl
> with libpower prefix. No functional changes
>
> v2: update commit message (Anshuman)
>
> Signed-off-by: Riana Tauro
> Reviewed-by: Anshuman Gupta
Reviewed-by: Ashutosh Dixit
On Tue, 29 Nov 2022 21:34:26 -0800, Riana Tauro wrote:
>
Hi Riana,
Mostly looks good but I have a little nit below.
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c
> b/drivers/gpu/drm/i915/i915_hwmon.c
> index c588a17f97e9..57d4e96d5c72 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/
On Fri, 2022-12-02 at 19:21 +, Teres Alexis, Alan Previn wrote:
>
>
> On Fri, 2022-12-02 at 11:22 -0500, Vivi, Rodrigo wrote:
> > On Thu, Dec 01, 2022 at 05:14:07PM -0800, Alan Previn wrote:
> > > Starting with MTL, there will be two GT-tiles, a render and media
> > > tile. PXP as a service f
On 12/1/2022 04:01, Tvrtko Ursulin wrote:
On 01/12/2022 11:56, Michal Wajdeczko wrote:
On 01.12.2022 01:41, John Harrison wrote:
On 11/23/2022 12:45, Michal Wajdeczko wrote:
On 23.11.2022 02:25, John Harrison wrote:
On 11/22/2022 09:54, Michal Wajdeczko wrote:
On 18.11.2022 02:58, john.c.har
On Fri, 2022-12-02 at 11:22 -0500, Vivi, Rodrigo wrote:
> On Thu, Dec 01, 2022 at 05:14:07PM -0800, Alan Previn wrote:
> > Starting with MTL, there will be two GT-tiles, a render and media
> > tile. PXP as a service for supporting workloads with protected
> > contexts and protected buffers can be
On Fri, Dec 02, 2022 at 08:51:43AM -0800, Matt Atwood wrote:
> From: Jouni Högander
>
> This patch introduces initial workarounds for mtl platform
It looks like this patch is only dealing with workarounds from past
platforms that carry forward to [some] MTL steppings. I assume the new
MTL-only
== Series Details ==
Series: series starting with [v7,1/1] drm/i915/pxp: Promote pxp subsystem to
top-level of i915
URL : https://patchwork.freedesktop.org/series/111569/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12461_full -> Patchwork_111569v1_full
=
On 11/10/2022 09:58, Daniele Ceraolo Spurio wrote:
Invalidating the GuC TLBs while GuC is not loaded does not have negative
consequences, so if we're starting the driver with GuC enabled we can
use the GGTT invalidation function from the get-go, iinstead of switching
to it when we initialize the
== Series Details ==
Series: drm/i915/mtl: Initial display workarounds
URL : https://patchwork.freedesktop.org/series/111592/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12463 -> Patchwork_111592v1
Summary
---
**SU
Hi Mauro,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-intel/for-linux-next-fixes drm-tip/drm-tip
drm/drm-next drm-misc/drm-misc-next linus/master v6.1-rc7 next-20221202]
[If your patch is applied to the
== Series Details ==
Series: drm/i915/mtl: Initial display workarounds
URL : https://patchwork.freedesktop.org/series/111592/
State : warning
== Summary ==
Error: dim checkpatch failed
8b2d9fc49c57 drm/i915/mtl: Initial display workarounds
-:125: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__
From: Jouni Högander
This patch introduces initial workarounds for mtl platform
v2: switch IS_MTL_DISPLAY_STEP to use IS_METEORLAKE from testing display
ver. (Tvrtko)
Bspec: 66624
Signed-off-by: Matt Atwood
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_fbc.c | 4 +++
On Thu, Dec 01, 2022 at 05:14:07PM -0800, Alan Previn wrote:
> Starting with MTL, there will be two GT-tiles, a render and media
> tile. PXP as a service for supporting workloads with protected
> contexts and protected buffers can be subscribed by process
> workloads on any tile. However, depending
== Series Details ==
Series: drm/i915/vrr: VRR fixes
URL : https://patchwork.freedesktop.org/series/111585/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12462 -> Patchwork_111585v1
Summary
---
**FAILURE**
Serious
== Series Details ==
Series: drm/i915/vrr: VRR fixes
URL : https://patchwork.freedesktop.org/series/111585/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: un
On 28.11.2022 15:30, Matt Roper wrote:
> Starting with MTL, the driver needs to not only protect the steering
> control register from simultaneous software accesses, but also protect
> against races with hardware/firmware agents. The hardware provides a
> dedicated locking mechanism to support thi
== Series Details ==
Series: add guard padding around i915_vma (rev7)
URL : https://patchwork.freedesktop.org/series/110720/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12462 -> Patchwork_110720v7
Summary
---
**SUC
== Series Details ==
Series: drm/i915/gen12: Apply recommended L3 hashing mask
URL : https://patchwork.freedesktop.org/series/111562/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12461_full -> Patchwork_111562v1_full
Summa
== Series Details ==
Series: add guard padding around i915_vma (rev7)
URL : https://patchwork.freedesktop.org/series/110720/
State : warning
== Summary ==
Error: dim checkpatch failed
c2fb33553511 drm/i915: Limit the display memory alignment to 32 bit instead of
64
33310e629b69 drm/i915: Wrap
== Series Details ==
Series: add guard padding around i915_vma (rev7)
URL : https://patchwork.freedesktop.org/series/110720/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [v6,1/3] drm/i915/migrate: Account for the
reserved_space
URL : https://patchwork.freedesktop.org/series/111583/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12462 -> Patchwork_111583v1
===
From: Ville Syrjälä
On mtl (at least) clearing the guardband bits in the same write
as the enable bit gets cleared seems to cause an immediate FIFO
underrun. Thus is seems that we need to first clear just the
enable bit, then wait for the VRR live status to indicate the
transcoder has exited VRR
From: Ville Syrjälä
On mtl it looks like disabling VRR after the transcoder has
been disabled can cause the pipe/transcoder to get stuck
when re-enabled in non-vrr mode. Reversing the order seems to
help.
Bspec is extremely confused about the VRR enable/disable sequence
anyway, and this now more
From: Ville Syrjälä
We are miscalculating both the guardband value, and the resulting
vblank exit length on adl+. This means that our start of vblank
(double buffered register latch point) is incorrect, and we also
think that it's not where it actually is (hence vblank evasion/etc.
may not work p
From: Ville Syrjälä
Account for the framestart delay when calculating the "pipeline full"
value for icl/tgl vrr. This puts the start of vblank (ie. where the
double bufferd registers get latched) to a consistent place regardless
of what framestart delay value is used. framestart delay does not
ch
From: Ville Syrjälä
Fix a bunch of VRR problems:
- inconsistent register latch point on icl/tgl
- bogus guardband/vblank exit length calculations on adl+
- adjustments to the vrr enable/disable seqeuence to avoid
pipe/transcoder getting stuck on mtl when switching from
vrr mode to non-vrr mod
== Series Details ==
Series: series starting with [v6,1/3] drm/i915/migrate: Account for the
reserved_space
URL : https://patchwork.freedesktop.org/series/111583/
State : warning
== Summary ==
Error: dim checkpatch failed
475d93799f92 drm/i915/migrate: Account for the reserved_space
e9b2c66ac
On 02/12/2022 12:19, Andrzej Hajda wrote:
On 02.12.2022 10:14, Tvrtko Ursulin wrote:
On 01/12/2022 16:36, Andrzej Hajda wrote:
On 01.12.2022 11:28, Tvrtko Ursulin wrote:
On 01/12/2022 00:22, John Harrison wrote:
On 11/29/2022 00:43, Tvrtko Ursulin wrote:
On 28/11/2022 16:52, Andrzej Hajd
On 02/12/2022 11:11, Andi Shyti wrote:
Hi Tvrtko,
On Fri, Dec 02, 2022 at 10:20:11AM +, Tvrtko Ursulin wrote:
On 01/12/2022 20:39, Andi Shyti wrote:
From: Chris Wilson
Introduce the concept of padding the i915_vma with guard pages before
and after. The major consequence is that all or
Probably a good idea to do an igt_flush_test() at the end of each
subtest, just to be sure the previous work has been flushed and doesn't
somehow interfere with the current subtest.
Signed-off-by: Matthew Auld
Cc: Chris Wilson
Cc: Andi Shyti
Cc: Andrzej Hajda
Cc: Nirmoy Das
---
drivers/gpu/d
Simple regression test to check that we don't trample the
rq->reserved_space when returning from emit_pte(), if the ring is nearly
full.
v2: Make spinner_kill() static
v3: Reduce the ring size further, which should mean we need to execute less
noops; hopefully this appeases bsw. Also add some
From: Chris Wilson
If the ring is nearly full when calling into emit_pte(), we might
incorrectly trample the reserved_space when constructing the packet to
emit the PTEs. This then triggers the GEM_BUG_ON(rq->reserved_space >
ring->space) when later submitting the request, since the request itsel
On 02.12.2022 10:14, Tvrtko Ursulin wrote:
On 01/12/2022 16:36, Andrzej Hajda wrote:
On 01.12.2022 11:28, Tvrtko Ursulin wrote:
On 01/12/2022 00:22, John Harrison wrote:
On 11/29/2022 00:43, Tvrtko Ursulin wrote:
On 28/11/2022 16:52, Andrzej Hajda wrote:
In case context is exiting preem
So we can use this across different tests.
v2
- Add docs for everything (Petri)
- Add missing copyright and fix headers slightly (Kamil)
Signed-off-by: Matthew Auld
Cc: Kamil Konieczny
Cc: Petri Latvala
Cc: Andrzej Hajda
Cc: Nirmoy Das
---
.../igt-gpu-tools/igt-gpu-tools-docs.xml |
With parallel submission it should be easy to get a fence array as the
output fence. Try importing this into dma-buf reservation object, to see
if anything explodes.
v2: (Kamil)
- Use ifdef __linux__ for linux headers
- Add igt_describe() for new test
References: https://gitlab.freedesktop.org/
== Series Details ==
Series: drm/i915/uc: Fix double free bug
URL : https://patchwork.freedesktop.org/series/111545/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12460_full -> Patchwork_111545v1_full
Summary
---
**F
== Series Details ==
Series: Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev8)
URL : https://patchwork.freedesktop.org/series/107550/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12462 -> Patchwork_107550v8
Hi Tvrtko,
On Fri, Dec 02, 2022 at 10:20:11AM +, Tvrtko Ursulin wrote:
>
> On 01/12/2022 20:39, Andi Shyti wrote:
> > From: Chris Wilson
> >
> > Introduce the concept of padding the i915_vma with guard pages before
> > and after. The major consequence is that all ordinary uses of i915_vma
>
Hi Matthew,
On 2022-12-01 at 16:49:43 +, Matthew Auld wrote:
> So we can use this across different tests.
>
> Signed-off-by: Matthew Auld
> Cc: Kamil Konieczny
> Cc: Andrzej Hajda
> Cc: Nirmoy Das
> ---
> lib/dmabuf_sync_file.c | 138 +++
> lib/dmabu
== Series Details ==
Series: series starting with [v5,1/3] drm/i915/migrate: Account for the
reserved_space
URL : https://patchwork.freedesktop.org/series/111577/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12462 -> Patchwork_111577v1
===
On 01/12/2022 20:39, Andi Shyti wrote:
From: Chris Wilson
Introduce the concept of padding the i915_vma with guard pages before
and after. The major consequence is that all ordinary uses of i915_vma
must use i915_vma_offset/i915_vma_size and not i915_vma.node.start/size
directly, as the drm_m
== Series Details ==
Series: series starting with [v5,1/3] drm/i915/migrate: Account for the
reserved_space
URL : https://patchwork.freedesktop.org/series/111577/
State : warning
== Summary ==
Error: dim checkpatch failed
977e2603928c drm/i915/migrate: Account for the reserved_space
-:36: WAR
During FRL bandwidth check for downstream HDMI2.1 sink,
the min BPC supported is incorrectly taken for DP, and the check does
not consider ybcr420 only modes.
This patch fixes the bandwidth calculation similar to the TMDS case, by
taking min 8Bpc and considering Ycbcr420 only modes.
v2: Rebase
S
Add a wrapper function to check dp_downstream clock/bandwidth
constraints. Based on whether the sink supports FRL/TMDS the wrapper
calls the appropriate FRL/TMDS functions.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 51 +++--
1 file changed, 2
Currently we use the highest input BPC supported by DP sink while using
DSC.In cases where PCON with HDMI2.1 as branch device, if PCON supports
DSC but HDMI2.1 sink does not supports DSC, The PCON tries to use same
input BPC that is used between Source and the PCON without DSC, which
might not work
Add an inline helper function to check if the sink_format is set to
YCBCR420 format.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++
drivers/gpu/drm/i915/display/intel_dp.c| 4 ++--
drivers/gpu/drm/i915/display/intel_hdmi.c |
Currently, DSC with YCBCR420 is not supported.
Return -EINVAL when trying with DSC with output_format as YCBCR420.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/
Use compressed bpp to calculate mode_rate during dp_mode_valid.
Check if this can be supported with max lane count and link rate
combination.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/dri
During modevalid step, the pipe bpp is computed assuming RGB output
format. When checking with DSC, consider the output_format and compute
the input bpp for DSC appropriately.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 32 +++--
1 file changed
Check for MODE_H_ILLEGAL before calculating max rates, lanes etc.
Move comments about compressed bpp U6.4 format closer to where it is used.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
Currently we compute the output format first and later try DSC if the
bandwidth without compression is not sufficient for that output format.
Since we do not support DSC with YCbCr420 format, this creates problem
for YCbCr420 only modes, that can be still be set if DFP has color
conversion and DSC
Start passing the sink_format, to all functions that take a bool
ycbcr420_output as parameter. This will make the functions generic,
and will serve as a slight step towards 4:2:2 support later.
Suggested-by: Ville Syrj_l_
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c
The decision to use DFP output format conversion capabilities should be
during compute_config phase.
This patch uses the members of intel_dp->dfp to only store the
format conversion capabilities of the DP device and uses the crtc_state
sink_format member, to program the protocol-converter for
colo
For YCbCr420 output, scaler is required for downsampling.
Scaler can be used only when source size smaller than 5120x4096.
So go for native YCbCr420 only if there are no scaler constraints.
v2: Corrected max-width based on Display Version.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/
New member to store the YCBCR20 Pass through capability of the DP sink.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/inte
The decision to use DFP output format conversion capabilities should be
during compute_config phase.
This patch adds new member to crtc_state to represent the final
output_format to the sink. In case of a DFP this can be different than
the output_format, as per the format conversion done via the P
This series fixes issues faced when an HDMI2.1 sink that does not
support DSC is connected via HDMI2.1PCON. It also includes other minor
HDMI2.1 PCON fixes/refactoring.
Patch 1-2 Have minor fixes/cleanups.
Patch 3-6 Pull the decision making to use DFP conversion capabilities
for every mode during
Simple regression test to check that we don't trample the
rq->reserved_space when returning from emit_pte(), if the ring is nearly
full.
v2: Make spinner_kill() static
v3: Reduce the ring size further, which should mean we need to execute less
noops; hopefully this appeases bsw. Also add some
Probably a good idea to do an igt_flush_test() at the end of each
subtest, just to be sure the previous work has been flushed and doesn't
somehow interfere with the current subtest.
Signed-off-by: Matthew Auld
Cc: Chris Wilson
Cc: Andi Shyti
Cc: Andrzej Hajda
Cc: Nirmoy Das
---
drivers/gpu/d
From: Chris Wilson
If the ring is nearly full when calling into emit_pte(), we might
incorrectly trample the reserved_space when constructing the packet to
emit the PTEs. This then triggers the GEM_BUG_ON(rq->reserved_space >
ring->space) when later submitting the request, since the request itsel
On Thu, Dec 01, 2022 at 04:49:43PM +, Matthew Auld wrote:
> So we can use this across different tests.
>
> Signed-off-by: Matthew Auld
> Cc: Kamil Konieczny
> Cc: Andrzej Hajda
> Cc: Nirmoy Das
> ---
> lib/dmabuf_sync_file.c | 138 +++
> lib/dmabuf_sy
== Series Details ==
Series: drm: Optimise for continuous memory allocation (rev3)
URL : https://patchwork.freedesktop.org/series/111542/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12460_full -> Patchwork_111542v3_full
S
On 01/12/2022 22:03, Zanoni, Paulo R wrote:
Hi
I was given a link to https://patchwork.freedesktop.org/series/111494/
but can't seem to find it on the mailing list, so I'll reply here.
On Thu, 2022-08-25 at 08:46 +0200, Maarten Lankhorst wrote:
Frontbuffer tracking in gem is used in old driv
On 01/12/2022 16:36, Andrzej Hajda wrote:
On 01.12.2022 11:28, Tvrtko Ursulin wrote:
On 01/12/2022 00:22, John Harrison wrote:
On 11/29/2022 00:43, Tvrtko Ursulin wrote:
On 28/11/2022 16:52, Andrzej Hajda wrote:
In case context is exiting preempt_timeout_ms is used for timeout,
but since i
On 01/12/2022 23:23, Matt Roper wrote:
On Thu, Dec 01, 2022 at 09:23:07AM -0800, Lucas De Marchi wrote:
On Thu, Dec 01, 2022 at 01:15:35PM +, Tvrtko Ursulin wrote:
On 30/11/2022 23:17, Matt Atwood wrote:
From: Matt Roper
This patch introduces initial workarounds for mtl platform
Bspe
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