[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Fix perf limit reasons bit positions

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915/gt: Fix perf limit reasons bit positions URL : https://patchwork.freedesktop.org/series/108277/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090_full -> Patchwork_108277v1_full Summa

Re: [Intel-gfx] [PATCH v2 01/15] vfio: Add helpers for unifying vfio_device life cycle

2022-09-07 Thread Tian, Kevin
> From: Eric Auger > Sent: Thursday, September 8, 2022 3:28 AM > > +/* > > + * Alloc and initialize vfio_device so it can be registered to vfio > > + * core. > > + * > > + * Drivers should use the wrapper vfio_alloc_device() for allocation. > > + * @size is the size of the structure to be allocate

[Intel-gfx] ✓ Fi.CI.BAT: success for i915: freq caps and perf_limit_reasons changes for MTL (rev2)

2022-09-07 Thread Patchwork
== Series Details == Series: i915: freq caps and perf_limit_reasons changes for MTL (rev2) URL : https://patchwork.freedesktop.org/series/108091/ State : success == Summary == CI Bug Log - changes from CI_DRM_12091 -> Patchwork_108091v2 Sum

[Intel-gfx] ✗ Fi.CI.IGT: failure for GSC support for XeHP SDV and DG2 (rev5)

2022-09-07 Thread Patchwork
== Series Details == Series: GSC support for XeHP SDV and DG2 (rev5) URL : https://patchwork.freedesktop.org/series/106638/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12090_full -> Patchwork_106638v5_full Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: freq caps and perf_limit_reasons changes for MTL (rev2)

2022-09-07 Thread Patchwork
== Series Details == Series: i915: freq caps and perf_limit_reasons changes for MTL (rev2) URL : https://patchwork.freedesktop.org/series/108091/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: freq caps and perf_limit_reasons changes for MTL (rev2)

2022-09-07 Thread Patchwork
== Series Details == Series: i915: freq caps and perf_limit_reasons changes for MTL (rev2) URL : https://patchwork.freedesktop.org/series/108091/ State : warning == Summary == Error: dim checkpatch failed 7c1612061058 drm/i915: Prepare more multi-GT initialization -:22: WARNING:TYPO_SPELLING:

Re: [Intel-gfx] [PATCH 4/6] drm/i915/debugfs: Add perf_limit_reasons in debugfs

2022-09-07 Thread Dixit, Ashutosh
On Tue, 06 Sep 2022 07:13:03 -0700, Rodrigo Vivi wrote: > Hi Rodrigo, > On Fri, Sep 02, 2022 at 04:53:00PM -0700, Ashutosh Dixit wrote: > > From: Tilak Tangudu > > > > Add perf_limit_reasons in debugfs. Unlike the lower 16 perf_limit_reasons > > status bits, the upper 16 log bits remain set unti

Re: [Intel-gfx] [PATCH 5/6] drm/i915/mtl: PERF_LIMIT_REASONS changes for MTL

2022-09-07 Thread Dixit, Ashutosh
On Mon, 05 Sep 2022 02:30:45 -0700, Jani Nikula wrote: > > On Fri, 02 Sep 2022, Ashutosh Dixit wrote: > > PERF_LIMIT_REASONS register for MTL media gt is different now. > > > > Cc: Badal Nilawar > > Signed-off-by: Ashutosh Dixit > > --- > > drivers/gpu/drm/i915/gt/intel_gt.h| 8

Re: [Intel-gfx] [PATCH 6/6] drm/i915/rps: Freq caps for MTL

2022-09-07 Thread Dixit, Ashutosh
On Mon, 05 Sep 2022 02:40:08 -0700, Jani Nikula wrote: > On Fri, 02 Sep 2022, Ashutosh Dixit wrote: > > For MTL, when reading from HW, RP0, RP1 (actuall RPe) and RPn freq use an > > entirely different set of registers with different fields, bitwidths and > > units. > > > > Cc: Badal Nilawar > > S

[Intel-gfx] [PATCH 8/8] drm/i915/rps: Freq caps for MTL

2022-09-07 Thread Ashutosh Dixit
For MTL, when reading from HW, RP0, RP1 (actuall RPe) and RPn freq use an entirely different set of registers with different fields, bitwidths and units. v2: Move MTL check into a separate function (Jani) Cc: Jani Nikula Cc: Badal Nilawar Signed-off-by: Ashutosh Dixit --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 7/8] drm/i915/mtl: PERF_LIMIT_REASONS changes for MTL

2022-09-07 Thread Ashutosh Dixit
PERF_LIMIT_REASONS register for MTL media gt is different now. v2: Avoid static inline for intel_gt_perf_limit_reasons_reg() (Jani) Cc: Jani Nikula Cc: Badal Nilawar Signed-off-by: Ashutosh Dixit --- drivers/gpu/drm/i915/gt/intel_gt.c| 6 ++ drivers/gpu/drm/i915/gt/intel_gt.h

[Intel-gfx] [PATCH 6/8] drm/i915/debugfs: Add perf_limit_reasons in debugfs

2022-09-07 Thread Ashutosh Dixit
From: Tilak Tangudu Add perf_limit_reasons in debugfs. The upper 16 perf_limit_reasons RW "log" bits are identical to the lower 16 RO "status" bits except that the "log" bits remain set until cleared, thereby ensuring the throttling occurrence is not missed. The clear fop clears the upper 16 "log

[Intel-gfx] [PATCH 5/8] drm/i915/gt: Fix perf limit reasons bit positions

2022-09-07 Thread Ashutosh Dixit
Perf limit reasons bit positions were off by one. Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces") Cc: sta...@vger.kernel.org # v5.18+ Cc: Sujaritha Sundaresan Cc: Andi Shyti Signed-off-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_reg.h | 16 1

[Intel-gfx] [PATCH 3/8] drm/i915/uncore: Add GSI offset to uncore

2022-09-07 Thread Ashutosh Dixit
From: Matt Roper DO NOT REVIEW, FOR COMPILING ONLY GT non-engine registers (referred to as "GSI" registers by the spec) have the same relative offsets on standalone media as they do on the primary GT, just with an additional "GSI offset" added to their MMIO address. If we store this GSI offset

[Intel-gfx] [PATCH 2/8] drm/i915: Rename and expose common GT early init routine

2022-09-07 Thread Ashutosh Dixit
From: Matt Roper DO NOT REVIEW, FOR COMPILING ONLY The common early GT init is needed for initialization of all GT types (root/primary, remote tile, standalone media). Since standalone media (coming in a future patch) will be implemented in a separate file, rename and expose the function for us

[Intel-gfx] [PATCH 4/8] drm/i915/xelpmp: Expose media as another GT

2022-09-07 Thread Ashutosh Dixit
From: Matt Roper DO NOT REVIEW, FOR COMPILING ONLY Xe_LPM+ platforms have "standalone media." I.e., the media unit is designed as an additional GT with its own engine list, GuC, forcewake, etc. Let's allow platforms to include media GTs in their device info. v2: - Simplify GSI register handl

[Intel-gfx] [PATCH 1/8] drm/i915: Prepare more multi-GT initialization

2022-09-07 Thread Ashutosh Dixit
From: Matt Roper DO NOT REVIEW, FOR COMPILING ONLY We're going to introduce an additional intel_gt for MTL's media unit soon. Let's provide a bit more multi-GT initialization framework in preparation for that. The initialization will pull the list of GTs for a platform from the device info str

[Intel-gfx] [PATCH 0/8] i915: freq caps and perf_limit_reasons changes for MTL

2022-09-07 Thread Ashutosh Dixit
This series includes freq caps and perf_limit_reasons changes for MTL. The series depends on: https://patchwork.freedesktop.org/series/107908/ We have included 4 patches from from the above series as part of this series in order for this series to compile. These are the first 4 patches authored b

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Document and future-proof preemption control policy

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915: Document and future-proof preemption control policy URL : https://patchwork.freedesktop.org/series/108275/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090_full -> Patchwork_108275v1_full ===

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses

2022-09-07 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses URL : https://patchwork.freedesktop.org/series/108269/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12090_full -> Patchwork_108269v1_full ==

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Invert if/else ladder for frequency read

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915: Invert if/else ladder for frequency read URL : https://patchwork.freedesktop.org/series/108268/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12090_full -> Patchwork_108268v1_full Summ

Re: [Intel-gfx] [PATCH v3 13/15] drm/i915/huc: better define HuC status getparam possible return values.

2022-09-07 Thread Teres Alexis, Alan Previn
Yup - simple stuff - LGTM: Reviewed-by: Alan Previn On Fri, 2022-08-19 at 15:53 -0700, Daniele Ceraolo Spurio wrote: > The current HuC status getparam return values are a bit confusing in > regards to what happens in some scenarios. In particular, most of the > error cases cause the ioctl to ret

[Intel-gfx] ✓ Fi.CI.BAT: success for Initial Meteorlake Support (rev8)

2022-09-07 Thread Patchwork
== Series Details == Series: Initial Meteorlake Support (rev8) URL : https://patchwork.freedesktop.org/series/106786/ State : success == Summary == CI Bug Log - changes from CI_DRM_12091 -> Patchwork_106786v8 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Initial Meteorlake Support (rev8)

2022-09-07 Thread Patchwork
== Series Details == Series: Initial Meteorlake Support (rev8) URL : https://patchwork.freedesktop.org/series/106786/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Initial Meteorlake Support (rev8)

2022-09-07 Thread Patchwork
== Series Details == Series: Initial Meteorlake Support (rev8) URL : https://patchwork.freedesktop.org/series/106786/ State : warning == Summary == Error: dim checkpatch failed 4b29e4a0d695 drm/i915: Move display and media IP version to runtime info -:34: CHECK:MACRO_ARG_REUSE: Macro argument

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Set correct domains values at _i915_vma_move_to_active

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915: Set correct domains values at _i915_vma_move_to_active URL : https://patchwork.freedesktop.org/series/108258/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12089_full -> Patchwork_108258v1_full

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915/dg2: extend Wa_1409120013 to DG2" (rev2)

2022-09-07 Thread Patchwork
== Series Details == Series: Revert "drm/i915/dg2: extend Wa_1409120013 to DG2" (rev2) URL : https://patchwork.freedesktop.org/series/108266/ State : success == Summary == CI Bug Log - changes from CI_DRM_12091 -> Patchwork_108266v2 Summary

Re: [Intel-gfx] [PATCH v9 15/16] drm/i915/gsc: allocate extended operational memory in LMEM

2022-09-07 Thread Teres Alexis, Alan Previn
I had provided rb on vers 7 and i see the only difference here in v9 is the usage of I915_BO_ALLOC_CPU_CLEAR in gsc_ext_om_alloc saving us a few lines for free. Thus: Reviewed-by: Alan Previn On Thu, 2022-09-08 at 00:51 +0300, Winkler, Tomas wrote: > GSC requires more operational memory than

Re: [Intel-gfx] [PATCH v9 10/16] mei: mkhi: add memory ready command

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 2:51 PM, Tomas Winkler wrote: Add GSC memory ready command. The command indicates to the firmware that extend operation memory was setup and the firmware may enter PXP mode. CC: Daniele Ceraolo Spurio Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Reviewed-by:

Re: [Intel-gfx] [PATCH v9 09/16] mei: bus: export common mkhi definitions into a separate header

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 2:51 PM, Tomas Winkler wrote: From: Vitaly Lubart Exported common mkhi definitions from bus-fixup.c into a separate header file mkhi.h for other driver usage. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Reviewed-by: Daniele Ce

Re: [Intel-gfx] [PATCH v9 08/16] mei: extend timeouts on slow devices

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 2:51 PM, Tomas Winkler wrote: From: Alexander Usyskin Parametrize operational timeouts in order to support slow firmware on some graphics devices. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler |Reviewed-by: Daniele Ceraolo Spurio Daniele | --- V8: 1. Updat

Re: [Intel-gfx] [v2][PATCH 1/1] drm/i915/dsc: convert dsc debugfs entry from output_bpp to input_bpc

2022-09-07 Thread Navare, Manasi
On Sat, Sep 03, 2022 at 12:36:58AM +0530, Swati Sharma wrote: > Convert dsc debugfs entry from output_bpp to input_bpc. The rationale > is to validate different input bpc across various platforms. > > v2: -improved commit message (Jani N) > -styling fixes (Jani N) > > Signed-off-by: Swati Sha

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Noop lrc_init_wa_ctx() on recent/future platforms

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915: Noop lrc_init_wa_ctx() on recent/future platforms URL : https://patchwork.freedesktop.org/series/108278/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090 -> Patchwork_108278v1 Summa

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSC

2022-09-07 Thread Matt Roper
On Fri, Sep 02, 2022 at 06:43:12PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSC > URL : https://patchwork.freedesktop.org/series/108076/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_12064_full

[Intel-gfx] [PATCH v4.1] drm/i915/mtl: Define engine context layouts

2022-09-07 Thread Radhakrishna Sripada
From: Matt Roper The part of the media and blitter engine contexts that we care about for setting up an initial state are the same on MTL as they were on DG2 (and PVC), so we need to update the driver conditions to re-use the DG2 context table. For render/compute engines, the part of the context

[Intel-gfx] [PATCH v4.1] drm/i915: Read graphics/media/display arch version from hw

2022-09-07 Thread Radhakrishna Sripada
From: Matt Roper Going forward, the hardware teams no longer consider new platforms to have a "generation" in the way we've defined it for past platforms. Instead, each IP block (graphics, media, display) will have their own architecture major.minor versions and stepping ID's which should be read

[Intel-gfx] [PATCH v2] Revert "drm/i915/dg2: extend Wa_1409120013 to DG2"

2022-09-07 Thread Lucas De Marchi
This reverts commit 487970e8bb776c989013bb59d6cbb22e45b9afc6. Updated bspec and workaround database note Wa_1409120013 is not needed for DG2 (or any Xe_LPD) platform. Simply check by display version 12. v2: Simplify condition check to display version (Matt Roper) Cc: Matt Atwood Cc: Clint Taylo

Re: [Intel-gfx] [PATCH] drm/i915: Invert if/else ladder for frequency read

2022-09-07 Thread Matt Roper
On Wed, Sep 07, 2022 at 01:30:41PM -0700, Lucas De Marchi wrote: > Continue converting the driver to the convention of last version first, > extending it to the future platforms. Now, any GRAPHICS_VER >= 11 will > be handled by the first branch. > > With the new ranges it's easier to see what plat

Re: [Intel-gfx] [PATCH] Revert "drm/i915/dg2: extend Wa_1409120013 to DG2"

2022-09-07 Thread Lucas De Marchi
On Wed, Sep 07, 2022 at 03:28:30PM -0700, Matt Roper wrote: On Wed, Sep 07, 2022 at 01:26:06PM -0700, Lucas De Marchi wrote: This reverts commit 487970e8bb776c989013bb59d6cbb22e45b9afc6. Updated bspec and workaround database note Wa_1409120013 is not needed for DG2 (or any Display 13) platform.

[Intel-gfx] [PATCH] drm/i915: Noop lrc_init_wa_ctx() on recent/future platforms

2022-09-07 Thread Lucas De Marchi
Except for graphics version 8 and 9, nothing is done in lrc_init_wa_ctx(). Assume this won't be needed on future platforms as well and remove the warning. Note that this function is not called for anything below version 8 since those don't use either guc or execlist, i.e. HAS_EXECLISTS() is false.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Fix perf limit reasons bit positions

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915/gt: Fix perf limit reasons bit positions URL : https://patchwork.freedesktop.org/series/108277/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090 -> Patchwork_108277v1 Summary ---

Re: [Intel-gfx] [PATCH v4 02/11] drm/i915: Read graphics/media/display arch version from hw

2022-09-07 Thread Sripada, Radhakrishna
Hi Lucas/Matt, > -Original Message- > From: De Marchi, Lucas > Sent: Wednesday, September 7, 2022 3:21 PM > To: Roper, Matthew D > Cc: Sripada, Radhakrishna ; intel- > g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Vivi, Rodrigo > > Subject: Re: [Intel-gfx] [PATCH v4 02/11

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/ttm: cleanup the resource of ghost objects after locking them

2022-09-07 Thread Patchwork
== Series Details == Series: drm/ttm: cleanup the resource of ghost objects after locking them URL : https://patchwork.freedesktop.org/series/108252/ State : success == Summary == CI Bug Log - changes from CI_DRM_12088_full -> Patchwork_108252v1_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for GSC support for XeHP SDV and DG2 (rev5)

2022-09-07 Thread Patchwork
== Series Details == Series: GSC support for XeHP SDV and DG2 (rev5) URL : https://patchwork.freedesktop.org/series/106638/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090 -> Patchwork_106638v5 Summary --- **SUCC

Re: [Intel-gfx] [PATCH] Revert "drm/i915/dg2: extend Wa_1409120013 to DG2"

2022-09-07 Thread Matt Roper
On Wed, Sep 07, 2022 at 01:26:06PM -0700, Lucas De Marchi wrote: > This reverts commit 487970e8bb776c989013bb59d6cbb22e45b9afc6. > > Updated bspec and workaround database note Wa_1409120013 is not needed > for DG2 (or any Display 13) platform. This should probably say "Xe_LPD" to use standard ter

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses

2022-09-07 Thread Lucas De Marchi
On Wed, Sep 07, 2022 at 03:18:00PM -0700, Matt Roper wrote: On Wed, Sep 07, 2022 at 01:39:10PM -0700, Lucas De Marchi wrote: Check for media IP version instead of graphics since this is figuring out the media engines' configuration. Currently the only platform with non-matching graphics/media ve

Re: [Intel-gfx] [PATCH v4 02/11] drm/i915: Read graphics/media/display arch version from hw

2022-09-07 Thread Lucas De Marchi
On Wed, Sep 07, 2022 at 03:13:31PM -0700, Matt Roper wrote: On Wed, Sep 07, 2022 at 01:49:25PM -0700, Lucas De Marchi wrote: On Thu, Sep 01, 2022 at 11:03:33PM -0700, Radhakrishna Sripada wrote: > From: Matt Roper > > Going forward, the hardware teams no longer consider new platforms to > have

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Extract function to apply media fuses

2022-09-07 Thread Matt Roper
On Wed, Sep 07, 2022 at 01:39:11PM -0700, Lucas De Marchi wrote: > Just like is done for compute and copy engines, extract a function to > handle media engines. While at it, be consistent on using or not the > uncore/gt/info variable aliases. > > Cc: Matt Roper > Signed-off-by: Lucas De Marchi

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for GSC support for XeHP SDV and DG2 (rev5)

2022-09-07 Thread Patchwork
== Series Details == Series: GSC support for XeHP SDV and DG2 (rev5) URL : https://patchwork.freedesktop.org/series/106638/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GSC support for XeHP SDV and DG2 (rev5)

2022-09-07 Thread Patchwork
== Series Details == Series: GSC support for XeHP SDV and DG2 (rev5) URL : https://patchwork.freedesktop.org/series/106638/ State : warning == Summary == Error: dim checkpatch failed 7c7d317c2214 drm/i915/gsc: skip irq initialization if using polling f704e2c4045b mei: add kdoc for struct mei_a

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses

2022-09-07 Thread Matt Roper
On Wed, Sep 07, 2022 at 01:39:10PM -0700, Lucas De Marchi wrote: > Check for media IP version instead of graphics since this is figuring > out the media engines' configuration. Currently the only platform with > non-matching graphics/media version is Meteor Lake: update the check in > gen11_vdbox_h

Re: [Intel-gfx] [PATCH v4 02/11] drm/i915: Read graphics/media/display arch version from hw

2022-09-07 Thread Matt Roper
On Wed, Sep 07, 2022 at 01:49:25PM -0700, Lucas De Marchi wrote: > On Thu, Sep 01, 2022 at 11:03:33PM -0700, Radhakrishna Sripada wrote: > > From: Matt Roper > > > > Going forward, the hardware teams no longer consider new platforms to > > have a "generation" in the way we've defined it for past

[Intel-gfx] [PATCH] drm/i915/gt: Fix perf limit reasons bit positions

2022-09-07 Thread Ashutosh Dixit
Perf limit reasons bit positions were off by one. Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces") Cc: Sujaritha Sundaresan Cc: Andi Shyti Signed-off-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_reg.h | 16 1 file changed, 8 insertions(+), 8 del

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Document and future-proof preemption control policy

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915: Document and future-proof preemption control policy URL : https://patchwork.freedesktop.org/series/108275/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090 -> Patchwork_108275v1 Sum

[Intel-gfx] [PATCH v9 16/16] HAX: drm/i915: force INTEL_MEI_GSC on for CI

2022-09-07 Thread Tomas Winkler
From: Daniele Ceraolo Spurio After the new config option is merged we'll enable it by default in the CI config, but for now just force it on via the i915 Kconfig so we can get pre-merge CI results for it. Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Alexander Usyskin Signed-off-by: Tom

[Intel-gfx] [PATCH v9 13/16] mei: drop ready bits check after start

2022-09-07 Thread Tomas Winkler
From: Alexander Usyskin The check that hardware and host ready bits are set after start is redundant and may fail and disable driver if there is back-to-back link reset issued right after start. This happens during pxp mode transitions when firmware undergo reset. Remove these checks to eliminate

[Intel-gfx] [PATCH v9 14/16] mei: debugfs: add pxp mode to devstate in debugfs

2022-09-07 Thread Tomas Winkler
Add pxp mode devstate to debugfs to monitor pxp state machine progress. This is useful to debug issues in scenarios in which the pxp state needs to be re-initialized, like during power transitions such as suspend/resume. With this debugfs the state could be monitored to ensure that pxp is in the re

[Intel-gfx] [PATCH v9 15/16] drm/i915/gsc: allocate extended operational memory in LMEM

2022-09-07 Thread Tomas Winkler
GSC requires more operational memory than available on chip. Reserve 4M of LMEM for GSC operation. The memory is provided to the GSC as struct resource to the auxiliary data of the child device. Cc: Alan Previn Cc: Matthew Auld Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Sign

[Intel-gfx] [PATCH v9 12/16] mei: gsc: add transition to PXP mode in resume flow

2022-09-07 Thread Tomas Winkler
From: Vitaly Lubart Added transition to PXP mode in resume flow. CC: Daniele Ceraolo Spurio Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Reviewed-by: Daniele Ceraolo Spurio --- V9: rebase drivers/misc/mei/gsc-me.c | 11 +++ 1 file chan

[Intel-gfx] [PATCH v9 11/16] mei: gsc: setup gsc extended operational memory

2022-09-07 Thread Tomas Winkler
1. Retrieve extended operational memory physical pointers from the auxiliary device info. 2. Setup memory registers. 3. Notify firmware that the memory is ready by sending the memory ready command. 4. Disable PXP device if GSC is not in PXP mode. CC: Daniele Ceraolo Spurio Signed-off-by: To

[Intel-gfx] [PATCH v9 10/16] mei: mkhi: add memory ready command

2022-09-07 Thread Tomas Winkler
Add GSC memory ready command. The command indicates to the firmware that extend operation memory was setup and the firmware may enter PXP mode. CC: Daniele Ceraolo Spurio Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- V9: Fix duplicated defines caused by wrong --amend drive

[Intel-gfx] [PATCH v9 09/16] mei: bus: export common mkhi definitions into a separate header

2022-09-07 Thread Tomas Winkler
From: Vitaly Lubart Exported common mkhi definitions from bus-fixup.c into a separate header file mkhi.h for other driver usage. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- V8: 1. is enough for mkhi header. 2. drop MCHI_GROUP_ID definition

[Intel-gfx] [PATCH v9 08/16] mei: extend timeouts on slow devices

2022-09-07 Thread Tomas Winkler
From: Alexander Usyskin Parametrize operational timeouts in order to support slow firmware on some graphics devices. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler --- V8: 1. Update copyright date 2. Fix pgi->d0i3 timeout in mei_me_d0i3_enter_sync() V9: 1. Revert mei_me_d0i3_en

[Intel-gfx] [PATCH v9 06/16] mei: gsc: use polling instead of interrupts

2022-09-07 Thread Tomas Winkler
A work-around for a HW issue in XEHPSDV that manifests itself when SW reads a gsc register when gsc is sending an interrupt. The work-around is to disable interrupts and to use polling instead. Cc: James Ausmus Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin Signed-off-by: Tomas

[Intel-gfx] [PATCH v9 07/16] mei: gsc: wait for reset thread on stop

2022-09-07 Thread Tomas Winkler
From: Alexander Usyskin Wait for reset work to complete before initiating stop reset flow sequence. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio --- V9: Rebase drivers/misc/mei/init.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(

[Intel-gfx] [PATCH v9 05/16] drm/i915/gsc: add GSC XeHP SDV platform definition

2022-09-07 Thread Tomas Winkler
From: Alexander Usyskin Define GSC on XeHP SDV (Intel(R) dGPU without display) XeHP SDV uses the same hardware settings as DG1, but uses polling instead of interrupts and runs the firmware in slow pace due to hardware limitations. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Sign

[Intel-gfx] [PATCH v9 04/16] drm/i915/gsc: add slow_firmware flag to the gsc device definition

2022-09-07 Thread Tomas Winkler
From: Alexander Usyskin Add slow_firmware flag to the gsc device definition and pass it to mei auxiliary device, this instructs the driver to use longer operation timeouts. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio --- V9: Rebase drive

[Intel-gfx] [PATCH v9 03/16] mei: add slow_firmware flag to the mei auxiliary device

2022-09-07 Thread Tomas Winkler
Add slow_firmware flag to the mei auxiliary device info to inform the mei driver about slow underlying firmware. Such firmware will require to use larger operation timeouts. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio --- V9: Rebase includ

[Intel-gfx] [PATCH v8 00/16] GSC support for XeHP SDV and DG2

2022-09-07 Thread Tomas Winkler
Add GSC support for XeHP SDV and DG2 platforms. The series includes changes for the mei driver: - add ability to use polling instead of interrupts - add ability to use extended timeouts - setup extended operational memory for GSC The series includes changes for the i915 driver: - allocate extende

[Intel-gfx] [PATCH v9 02/16] mei: add kdoc for struct mei_aux_device

2022-09-07 Thread Tomas Winkler
struct mei_aux_device is an interface structure requires proper documenation. Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio --- V9: Rebase include/linux/mei_aux.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/linux/mei_aux.h b/include/linux/mei_aux.h inde

[Intel-gfx] [PATCH v9 01/16] drm/i915/gsc: skip irq initialization if using polling

2022-09-07 Thread Tomas Winkler
From: Vitaly Lubart Some platforms require the host to poll on the GSC registers instead of relaying on the interrupts. For those platforms, irq initialization should be skipped Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Reviewed-by: Daniele Ce

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp_mst: Avoid deleting payloads for connectors staying enabled

2022-09-07 Thread Patchwork
== Series Details == Series: drm/dp_mst: Avoid deleting payloads for connectors staying enabled URL : https://patchwork.freedesktop.org/series/108250/ State : success == Summary == CI Bug Log - changes from CI_DRM_12088_full -> Patchwork_108250v1_full ==

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses

2022-09-07 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses URL : https://patchwork.freedesktop.org/series/108269/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090 -> Patchwork_108269v1

[Intel-gfx] [PATCH] drm/i915: Document and future-proof preemption control policy

2022-09-07 Thread Matt Roper
Intel hardware allows some preemption settings to be controlled either by the kernel-mode driver exclusively, or placed under control of the user-mode drivers; on Linux we always select the userspace control option. The various registers involved in this are not documented very clearly; let's add

Re: [Intel-gfx] [PATCH v8 13/16] mei: drop ready bits check after start

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: From: Alexander Usyskin The check that hardware and host ready bits are set after start is redundant and may fail and disable driver if there is back-to-back link reset issued right after start. This happens during pxp mode transitions when firmware

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Invert if/else ladder for frequency read

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915: Invert if/else ladder for frequency read URL : https://patchwork.freedesktop.org/series/108268/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090 -> Patchwork_108268v1 Summary --

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Invert if/else ladder for frequency read

2022-09-07 Thread Patchwork
== Series Details == Series: drm/i915: Invert if/else ladder for frequency read URL : https://patchwork.freedesktop.org/series/108268/ State : warning == Summary == Error: dim checkpatch failed 39d3d3166a72 drm/i915: Invert if/else ladder for frequency read -:120: WARNING:UNNECESSARY_ELSE: els

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915/dg2: extend Wa_1409120013 to DG2"

2022-09-07 Thread Patchwork
== Series Details == Series: Revert "drm/i915/dg2: extend Wa_1409120013 to DG2" URL : https://patchwork.freedesktop.org/series/108266/ State : success == Summary == CI Bug Log - changes from CI_DRM_12090 -> Patchwork_108266v1 Summary --

Re: [Intel-gfx] [PATCH v4 02/11] drm/i915: Read graphics/media/display arch version from hw

2022-09-07 Thread Lucas De Marchi
On Thu, Sep 01, 2022 at 11:03:33PM -0700, Radhakrishna Sripada wrote: From: Matt Roper Going forward, the hardware teams no longer consider new platforms to have a "generation" in the way we've defined it for past platforms. Instead, each IP block (graphics, media, display) will have their own

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Extract function to apply media fuses

2022-09-07 Thread Lucas De Marchi
Just like is done for compute and copy engines, extract a function to handle media engines. While at it, be consistent on using or not the uncore/gt/info variable aliases. Cc: Matt Roper Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 136 -- 1

[Intel-gfx] [PATCH 1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses

2022-09-07 Thread Lucas De Marchi
Check for media IP version instead of graphics since this is figuring out the media engines' configuration. Currently the only platform with non-matching graphics/media version is Meteor Lake: update the check in gen11_vdbox_has_sfc() so it considers not only version 12, but also any later version

[Intel-gfx] [PATCH] drm/i915: Invert if/else ladder for frequency read

2022-09-07 Thread Lucas De Marchi
Continue converting the driver to the convention of last version first, extending it to the future platforms. Now, any GRAPHICS_VER >= 11 will be handled by the first branch. With the new ranges it's easier to see what platform a branch started to be taken. Besides the >= 11 change, the branch tak

[Intel-gfx] [PATCH] Revert "drm/i915/dg2: extend Wa_1409120013 to DG2"

2022-09-07 Thread Lucas De Marchi
This reverts commit 487970e8bb776c989013bb59d6cbb22e45b9afc6. Updated bspec and workaround database note Wa_1409120013 is not needed for DG2 (or any Display 13) platform. Cc: Matt Roper Cc: Matt Atwood Cc: Clint Taylor Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_pm.c | 4 ++

Re: [Intel-gfx] [PATCH] drm/i915: Set correct domains values at _i915_vma_move_to_active

2022-09-07 Thread Andrzej Hajda
On 07.09.2022 19:26, Nirmoy Das wrote: Fix regression introduced by commit: "drm/i915: Individualize fences before adding to dma_resv obj" which sets obj->read_domains to 0 for both read and write paths. Also set obj->write_domain to 0 on read path which was removed by the commit. References:

Re: [Intel-gfx] [PATCH v8 09/16] mei: bus: export common mkhi definitions into a separate header

2022-09-07 Thread Winkler, Tomas
> > > > On 9/7/2022 8:58 AM, Tomas Winkler wrote: > > From: Vitaly Lubart > > > > Exported common mkhi definitions from bus-fixup.c into a separate > > header file mkhi.h for other driver usage. > > > > Signed-off-by: Vitaly Lubart > > Signed-off-by: Tomas Winkler > > Signed-off-by: Alexander

Re: [Intel-gfx] [PATCH v2 14/15] vfio: Rename vfio_device_put() and vfio_device_try_get()

2022-09-07 Thread Eric Auger
On 9/1/22 16:37, Kevin Tian wrote: > With the addition of vfio_put_device() now the names become confusing. > > vfio_put_device() is clear from object life cycle p.o.v given kref. > > vfio_device_put()/vfio_device_try_get() are helpers for tracking > users on a registered device. > > Now rename

Re: [Intel-gfx] [PATCH v2 12/15] vfio/amba: Use the new device life cycle helpers

2022-09-07 Thread Eric Auger
Hi Kevin, On 9/1/22 16:37, Kevin Tian wrote: > Implement amba's own vfio_device_ops. > > Remove vfio_platform_probe/remove_common() given no user now. > > Signed-off-by: Kevin Tian > Reviewed-by: Jason Gunthorpe > --- > drivers/vfio/platform/vfio_amba.c | 72 ++- > d

Re: [Intel-gfx] [PATCH v2 01/15] vfio: Add helpers for unifying vfio_device life cycle

2022-09-07 Thread Eric Auger
Hi Kevin, On 9/1/22 16:37, Kevin Tian wrote: > The idea is to let vfio core manage the vfio_device life cycle instead > of duplicating the logic cross drivers. This is also a preparatory > step for adding struct device into vfio_device. > > New pair of helpers together with a kref in vfio_device: >

Re: [Intel-gfx] [PATCH v2 11/15] vfio/platform: Use the new device life cycle helpers

2022-09-07 Thread Eric Auger
Hi kevin, On 9/1/22 16:37, Kevin Tian wrote: > Move vfio_device_ops from platform core to platform drivers so device > specific init/cleanup can be added. > > Introduce two new helpers vfio_platform_init/release_common() for the > use in driver @init/@release. > > vfio_platform_probe/remove_common

Re: [Intel-gfx] [PATCH v8 14/16] mei: debugfs: add pxp mode to devstate in debugfs

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: Add pxp mode devstate to debugfs to monitor pxp state machine progress. This is useful to debug issues in scenarios in which the pxp state needs to be re-initialized, like during power transitions such as suspend/resume. With this debugfs the state cou

Re: [Intel-gfx] [PATCH v8 12/16] mei: gsc: add transition to PXP mode in resume flow

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: From: Vitaly Lubart Added transition to PXP mode in resume flow. CC: Daniele Ceraolo Spurio Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin This is unchanged from the previously reviewed rev, so this

Re: [Intel-gfx] [PATCH v8 11/16] mei: gsc: setup gsc extended operational memory

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: 1. Retrieve extended operational memory physical pointers from the auxiliary device info. 2. Setup memory registers. 3. Notify firmware that the memory is ready by sending the memory ready command. 4. Disable PXP device if GSC is not in PXP mod

Re: [Intel-gfx] [PATCH v8 09/16] mei: bus: export common mkhi definitions into a separate header

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: From: Vitaly Lubart Exported common mkhi definitions from bus-fixup.c into a separate header file mkhi.h for other driver usage. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/misc/mei/bus

Re: [Intel-gfx] [PATCH v8 08/16] mei: extend timeouts on slow devices.

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: From: Alexander Usyskin Parametrize operational timeouts in order to support slow firmware on some graphics devices. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler --- drivers/misc/mei/bus-fixup.c | 5 ++--- drivers/misc/mei/cli

[Intel-gfx] ✓ Fi.CI.BAT: success for GSC support for XeHP SDV and DG2 (rev4)

2022-09-07 Thread Patchwork
== Series Details == Series: GSC support for XeHP SDV and DG2 (rev4) URL : https://patchwork.freedesktop.org/series/106638/ State : success == Summary == CI Bug Log - changes from CI_DRM_12089 -> Patchwork_106638v4 Summary --- **SUCC

Re: [Intel-gfx] [PATCH v8 07/16] mei: gsc: wait for reset thread on stop

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: From: Alexander Usyskin Wait for reset work to complete before initiating stop reset flow sequence. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler This is unchanged from the previously reviewed rev (apart from the fixed date in t

Re: [Intel-gfx] [PATCH v8 06/16] mei: gsc: use polling instead of interrupts

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: A work-around for a HW issue in XEHPSDV that manifests itself when SW reads a gsc register when gsc is sending an interrupt. The work-around is to disable interrupts and to use polling instead. Cc: James Ausmus Signed-off-by: Vitaly Lubart Signed-of

Re: [Intel-gfx] [PATCH v8 05/16] drm/i915/gsc: add GSC XeHP SDV platform definition

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:58 AM, Tomas Winkler wrote: From: Alexander Usyskin Define GSC on XeHP SDV (Intel(R) dGPU without display) XeHP SDV uses the same hardware settings as DG1, but uses polling instead of interrupts and runs the firmware in slow pace due to hardware limitations. Signed-off-by: Vi

Re: [Intel-gfx] [PATCH v8 02/16] mei: add kdoc for struct mei_aux_device

2022-09-07 Thread Ceraolo Spurio, Daniele
On 9/7/2022 8:57 AM, Tomas Winkler wrote: struct mei_aux_device is an interface structure requires proper documenation. Signed-off-by: Tomas Winkler This is unchanged from the previously reviewed rev, so this still applies: Reviewed-by: Daniele Ceraolo Spurio Daniele --- include/lin

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for GSC support for XeHP SDV and DG2 (rev4)

2022-09-07 Thread Patchwork
== Series Details == Series: GSC support for XeHP SDV and DG2 (rev4) URL : https://patchwork.freedesktop.org/series/106638/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

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