[Intel-gfx] ✓ Fi.CI.IGT: success for Add DP MST DSC support to i915 (rev11)

2022-09-01 Thread Patchwork
== Series Details == Series: Add DP MST DSC support to i915 (rev11) URL : https://patchwork.freedesktop.org/series/101492/ State : success == Summary == CI Bug Log - changes from CI_DRM_12058_full -> Patchwork_101492v11_full Summary ---

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Initial Meteorlake Support (rev5)

2022-09-01 Thread Patchwork
== Series Details == Series: Initial Meteorlake Support (rev5) URL : https://patchwork.freedesktop.org/series/106786/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/comp

[Intel-gfx] [PATCH v4 07/11] drm/i915/mtl: Add DP AUX support on TypeC ports

2022-09-01 Thread Radhakrishna Sripada
From: Imre Deak On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have changed wrt. previous platforms, adjust the code accordingly. Signed-off-by: Imre Deak Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_dp_aux.c | 45 - drivers/gpu/d

[Intel-gfx] [PATCH v4 08/11] drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox

2022-09-01 Thread Radhakrishna Sripada
>From Meteorlake, Latency Level, SAGV bloack time are read from LATENCY_SAGV register instead of the GT driver pcode mailbox. DDR type and QGV information are also to be read from Mem SS registers. v2: - Simplify MTL_MEM_SS_INFO_QGV_POINT macro(MattR) - Nit: Rearrange the bit def's from higher t

[Intel-gfx] [PATCH v4 10/11] drm/i915/mtl: Update CHICKEN_TRANS* register addresses

2022-09-01 Thread Radhakrishna Sripada
From: Madhumitha Tolakanahalli Pradeep In Display version 14, Transcoder Chicken Registers have updated address. This patch performs checks to use the right register when required. v2: Omit display version check in i915_reg.h(Jani) Bspec: 34387, 50054 Cc: Jani Nikula Signed-off-by: Madhumitha

[Intel-gfx] [PATCH v4 06/11] drm/i915/mtl: Add display power wells

2022-09-01 Thread Radhakrishna Sripada
From: Imre Deak Add support for display power wells on MTL. The differences from XE_LPD: - The AUX HW block is moved to the PICA block, where the registers are on an always-on power well and the functionality needs to be powered on/off via the AUX_CH_CTL register: [1], [2] - The DDI IO power

[Intel-gfx] [PATCH v4 09/11] drm/i915/mtl: Update MBUS_DBOX credits

2022-09-01 Thread Radhakrishna Sripada
Display version 14 platforms have different credits values compared to ADL-P. Update the credits based on pipe usage. v2: Simplify DBOX BW Credit definition(MattR) Bspec: 49213 Cc: Jose Roberto de Souza Cc: Matt Roper Original Author: Caz Yokoyama Signed-off-by: José Roberto de Souza Signed-o

[Intel-gfx] [PATCH v4 04/11] drm/i915/mtl: Define engine context layouts

2022-09-01 Thread Radhakrishna Sripada
From: Matt Roper The part of the media and blitter engine contexts that we care about for setting up an initial state are the same on MTL as they were on DG2 (and PVC), so we need to update the driver conditions to re-use the DG2 context table. For render/compute engines, the part of the context

[Intel-gfx] [PATCH v4 11/11] drm/i915/mtl: Do not update GV point, mask value

2022-09-01 Thread Radhakrishna Sripada
Display 14 and future platforms do not directly communicate to Pcode via mailbox the SAGV bandwidth information. PM Demand registers are used to communicate display power requirements to the PUnit which would include GV point and mask value. Skip programming GV point and mask values through legacy

[Intel-gfx] [PATCH v4 01/11] drm/i915: Move display and media IP version to runtime info

2022-09-01 Thread Radhakrishna Sripada
Future platforms can read the IP version from a register and the IP version numbers need not be hard coded in device info. Move the ip version for media and display to runtime info. On platforms where hard coding of IP version is required, update the IP version in __runtime under device_info. v2:

[Intel-gfx] [PATCH v4 05/11] drm/i915/mtl: Add gmbus and gpio support

2022-09-01 Thread Radhakrishna Sripada
Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC. >From spec we have registers GPIO_CTL[1-5] mapped to native display phys and GPIO_CTL[9-12] are mapped to TC ports. v2: - Drop unused GPIO pins(MattR) BSpec: 49306 Cc: Matt Roper Original Author: Brian J Lovin Signed-off-

[Intel-gfx] [PATCH v4 03/11] drm/i915: Parse and set stepping for platforms with GMD

2022-09-01 Thread Radhakrishna Sripada
From: José Roberto de Souza The GMD step field do not properly match the current stepping convention that we use(STEP_A0, STEP_A1, STEP_B0...). One platform could have { arch = 12, rel = 70, step = 1 } and the actual stepping is STEP_B0 but without the translation of the step field would mean ST

[Intel-gfx] [PATCH v4 00/11] Initial Meteorlake Support

2022-09-01 Thread Radhakrishna Sripada
The PCI Id's and platform definition are posted earlier. This series adds handful of early enablement patches including support for display power wells, VBT and AUX Channel mapping, PCH and gmbus support, dbus, mbus, sagv and memory bandwidth support. This series also add the support for a new way

[Intel-gfx] [PATCH v4 02/11] drm/i915: Read graphics/media/display arch version from hw

2022-09-01 Thread Radhakrishna Sripada
From: Matt Roper Going forward, the hardware teams no longer consider new platforms to have a "generation" in the way we've defined it for past platforms. Instead, each IP block (graphics, media, display) will have their own architecture major.minor versions and stepping ID's which should be read

Re: [Intel-gfx] [PATCH v3 04/17] drm/i915/dsi: Extract {vlv, bxt}_get_pclk()

2022-09-01 Thread Kahola, Mika
> -Original Message- > From: Intel-gfx On Behalf Of Ville > Syrjala > Sent: Monday, June 20, 2022 8:52 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v3 04/17] drm/i915/dsi: Extract {vlv, > bxt}_get_pclk() > > From: Ville Syrjälä > > Extract the state->freq comp

Re: [Intel-gfx] [RFC PATCH v3 10/17] drm/i915/vm_bind: Implement I915_GEM_EXECBUFFER3 ioctl

2022-09-01 Thread Niranjana Vishwanathapura
On Thu, Sep 01, 2022 at 08:58:57AM +0100, Tvrtko Ursulin wrote: On 01/09/2022 06:09, Niranjana Vishwanathapura wrote: On Wed, Aug 31, 2022 at 08:38:48AM +0100, Tvrtko Ursulin wrote: On 27/08/2022 20:43, Andi Shyti wrote: From: Niranjana Vishwanathapura Implement new execbuf3 ioctl (I915_G

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Prep work for explicit MCR handling

2022-09-01 Thread Patchwork
== Series Details == Series: i915: Prep work for explicit MCR handling URL : https://patchwork.freedesktop.org/series/108054/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12063 -> Patchwork_108054v1 Summary --- **FA

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Prep work for explicit MCR handling

2022-09-01 Thread Patchwork
== Series Details == Series: i915: Prep work for explicit MCR handling URL : https://patchwork.freedesktop.org/series/108054/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Prep work for explicit MCR handling

2022-09-01 Thread Patchwork
== Series Details == Series: i915: Prep work for explicit MCR handling URL : https://patchwork.freedesktop.org/series/108054/ State : warning == Summary == Error: dim checkpatch failed 3ce98ef46d9b drm/i915/gen8: Create separate reg definitions for new MCR registers -:266: WARNING:LONG_LINE:

[Intel-gfx] [PATCH 4/7] drm/i915/gt: Correct prefix on a few registers

2022-09-01 Thread Matt Roper
We have a few registers that have existed for several hardware generations, but are only used by the driver on Xe_HP and beyond. In cases where the Xe_HP version of the register is now replicated and uses multicast behavior, but earlier generations were singleton, let's change the register prefix

[Intel-gfx] [PATCH 6/7] drm/i915/gt: Always use MCR functions on multicast registers

2022-09-01 Thread Matt Roper
Rather than relying on the implicit behavior of intel_uncore_*() functions, let's always use the intel_gt_mcr_*() functions to operate on multicast/replicated registers. Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 +- drivers/gpu/drm/i915/gt/intel_gtt.c | 4

[Intel-gfx] [PATCH 5/7] drm/i915: Define MCR registers explicitly

2022-09-01 Thread Matt Roper
Rather than using the same _MMIO() macro to define MCR registers as singleton registers, let's use a new MCR_REG() macro to make it clear that these registers are special and should be handled accordingly. For now MCR_REG() will still generate an i915_reg_t with the given offset, but we'll change

[Intel-gfx] [PATCH 3/7] drm/i915/gt: Drop a few unused register definitions

2022-09-01 Thread Matt Roper
Let's drop a few register definitions that are unused anywhere in the driver today. Since the referenced offsets are part of what is now considered a multicast register region, the current definitions would not be correct for use on any future platform. Signed-off-by: Matt Roper --- drivers/gpu

[Intel-gfx] [PATCH 7/7] drm/i915/gt: Add MCR-specific workaround initializers

2022-09-01 Thread Matt Roper
Let's be more explicit about which of our workarounds are updating MCR registers. This will also allow us to record whether a workaround register has MCR behavior or not so that we'll only need to do a steering lookup for the registers that truly need it. Signed-off-by: Matt Roper --- drivers/g

[Intel-gfx] [PATCH 1/7] drm/i915/gen8: Create separate reg definitions for new MCR registers

2022-09-01 Thread Matt Roper
Gen8 was the first time our hardware had multicast registers (or at least the first time the multicast nature was exposed and MMIO accesses could be steered). There are some registers that transitioned from singleton behavior to multicast during the gen7 -> gen8 transition; let's duplicate the reg

[Intel-gfx] [PATCH 2/7] drm/i915/xehp: Create separate reg definitions for new MCR registers

2022-09-01 Thread Matt Roper
Starting in Xe_HP, several registers our driver works with have been converted from singleton registers into replicated registers with multicast behavior. Although the registers are still located at the same MMIO offsets as on previous platforms, let's duplicate the register definitions in prepara

[Intel-gfx] [PATCH 0/7] i915: Prep work for explicit MCR handling

2022-09-01 Thread Matt Roper
Steering of multicast/replicated registers becomes a bit more complicated on Meteor Lake. Whereas previously the control register we used to manage the steering was only used by our driver[*], software's control of steering has now been consolidated with the controls for various other hardware/fir

[Intel-gfx] ✓ Fi.CI.IGT: success for Tidy up vfio_device life cycle (rev4)

2022-09-01 Thread Patchwork
== Series Details == Series: Tidy up vfio_device life cycle (rev4) URL : https://patchwork.freedesktop.org/series/107838/ State : success == Summary == CI Bug Log - changes from CI_DRM_12058_full -> Patchwork_107838v4_full Summary ---

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] i915/pmu: Wire GuC backend to per-client busyness

2022-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] i915/pmu: Wire GuC backend to per-client busyness URL : https://patchwork.freedesktop.org/series/108053/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESC

Re: [Intel-gfx] [RFC PATCH 2/2] Fix per client busyness locking

2022-09-01 Thread Dixit, Ashutosh
On Wed, 31 Aug 2022 15:45:49 -0700, Umesh Nerlige Ramappa wrote: > Hi Umesh, I have updated my RFC patch based on your feedback so we can discuss again. > On Wed, Aug 31, 2022 at 12:33:55PM -0700, Ashutosh Dixit wrote: > > 1. Do all ce->stats updates and reads under guc->timestamp.lock > > Other

[Intel-gfx] [PATCH 1/2] i915/pmu: Wire GuC backend to per-client busyness

2022-09-01 Thread Ashutosh Dixit
From: John Harrison GuC provides engine_id and last_switch_in ticks for an active context in the pphwsp. The context image provides a 32 bit total ticks which is the accumulated by the context (a.k.a. context[CTX_TIMESTAMP]). This information is used to calculate the context busyness as follows:

[Intel-gfx] [RFC PATCH v2 2/2] Fix per client busyness locking

2022-09-01 Thread Ashutosh Dixit
1. Do all ce->stats updates and reads under guc->timestamp.lock 2. Pin context image before reading 3. Merge __guc_context_update_clks and guc_context_update_stats into a single function 4. Call lrc_update_runtime() unconditionally in guc_context_update_stats 5. Seems no need to update ce->stats

Re: [Intel-gfx] [PATCH 8/8] drm/i915/mtl: Hook up interrupts for standalone media

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/29/2022 10:02 AM, Matt Roper wrote: Top-level handling of standalone media interrupts will be processed as part of the primary GT's interrupt handler (since primary and media GTs share an MMIO space, unlike remote tile setups). When we get down to the point of handling engine interrupts,

Re: [Intel-gfx] [PATCH 7/8] drm/i915/mtl: Use primary GT's irq lock for media GT

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/29/2022 10:02 AM, Matt Roper wrote: When we hook up interrupts (in the next patch), interrupts for the media GT are still processed as part of the primary GT's interrupt flow. As such, we should share the same IRQ lock with the primary GT. Let's convert gt->irq_lock into a pointer and j

Re: [Intel-gfx] [PATCH 6/8] drm/i915/xelpmp: Expose media as another GT

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/29/2022 10:02 AM, Matt Roper wrote: Xe_LPM+ platforms have "standalone media." I.e., the media unit is designed as an additional GT with its own engine list, GuC, forcewake, etc. Let's allow platforms to include media GTs in their device info. Cc: Aravind Iddamsetty Signed-off-by: Mat

Re: [Intel-gfx] [PATCH v3 02/11] drm/i915: Read graphics/media/display arch version from hw

2022-09-01 Thread Sripada, Radhakrishna
Hi Jani, > -Original Message- > From: Jani Nikula > Sent: Thursday, September 1, 2022 12:58 AM > To: Sripada, Radhakrishna ; intel- > g...@lists.freedesktop.org > Cc: dri-de...@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH v3 02/11] drm/i915: Read > graphics/media/display > arc

Re: [Intel-gfx] [PATCH v7 13/15] mei: debugfs: add pxp mode to devstate in debugfs

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: Add pxp mode devstate to debugfs to monitor pxp state machine progress. This is useful to debug issues in scenarios in which the pxp state needs to be re-initialized, like during power transitions such as suspend/resume. With this debugfs the state cou

Re: [Intel-gfx] [PATCH v7 12/15] mei: gsc: add transition to PXP mode in resume flow

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: From: Vitaly Lubart Added transition to PXP mode in resume flow. CC: Daniele Ceraolo Spurio Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Reviewed-by: Daniele Ceraolo Spurio Daniele --- driver

Re: [Intel-gfx] [PATCH v7 11/15] mei: gsc: setup gsc extended operational memory

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: 1. Retrieve extended operational memory physical pointers from the auxiliary device info. 2. Setup memory registers. 3. Notify firmware that the memory is ready by sending the memory ready command. 4. Disable PXP device if GSC is not in PXP mod

Re: [Intel-gfx] [PATCH v7 10/15] mei: mkhi: add memory ready command

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: Add GSC memory ready command. The command indicates to the firmware that extend operation memory was setup and the firmware may enter PXP mode. CC: Daniele Ceraolo Spurio Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Copyright dat

Re: [Intel-gfx] [PATCH v7 09/15] mei: bus: export common mkhi definitions into a separate header

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: From: Vitaly Lubart Exported common mkhi definitions from bus-fixup.c into a separate header file mkhi.h for other driver usage. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/misc/mei/bus

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move some of the request decisions out of rps_boost function.

2022-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Move some of the request decisions out of rps_boost function. URL : https://patchwork.freedesktop.org/series/108048/ State : success == Summary == CI Bug Log - changes from CI_DRM_12062 -> Patchwork_108048v1 ===

Re: [Intel-gfx] [PATCH 2/9] drm/nouveau: convert to using is_hdmi and has_audio from display info

2022-09-01 Thread Lyude Paul
Reviewed-by: Lyude Paul Also, went ahead and tested this for you on one of my machines: Tested-by: Lyude Paul On Thu, 2022-09-01 at 15:47 +0300, Jani Nikula wrote: > Prefer the parsed results for is_hdmi and has_audio in display info over > calling drm_detect_hdmi_monitor() and drm_detect_moni

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Move some of the request decisions out of rps_boost function.

2022-09-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Move some of the request decisions out of rps_boost function. URL : https://patchwork.freedesktop.org/series/108048/ State : warning == Summary == Error: dim checkpatch failed a285a0d0be8a drm/i915: Move some of the request dec

[Intel-gfx] ✓ Fi.CI.IGT: success for Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev2)

2022-09-01 Thread Patchwork
== Series Details == Series: Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev2) URL : https://patchwork.freedesktop.org/series/107550/ State : success == Summary == CI Bug Log - changes from CI_DRM_12058_full -> Patchwork_107550v2_full ==

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rename ggtt_view as gtt_view

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Rename ggtt_view as gtt_view URL : https://patchwork.freedesktop.org/series/108045/ State : success == Summary == CI Bug Log - changes from CI_DRM_12062 -> Patchwork_108045v1 Summary --- **SUCCE

Re: [Intel-gfx] [RFC PATCH v3 04/17] drm/i915: Implement bind and unbind of object

2022-09-01 Thread Niranjana Vishwanathapura
On Thu, Sep 01, 2022 at 03:31:13PM +1000, Dave Airlie wrote: On Sun, 28 Aug 2022 at 05:45, Andi Shyti wrote: From: Niranjana Vishwanathapura Implement the bind and unbind of an object at the specified GPU virtual addresses. Signed-off-by: Niranjana Vishwanathapura Signed-off-by: Prathap Ku

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Rename ggtt_view as gtt_view

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Rename ggtt_view as gtt_view URL : https://patchwork.freedesktop.org/series/108045/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Rename ggtt_view as gtt_view

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Rename ggtt_view as gtt_view URL : https://patchwork.freedesktop.org/series/108045/ State : warning == Summary == Error: dim checkpatch failed 62ab50381b9f drm/i915: Rename ggtt_view as gtt_view -:831: WARNING:DEEP_INDENTATION: Too many leading tabs - con

[Intel-gfx] [PATCH 2/2] drm/i915: Don't try to disable host RPS when this was never enabled.

2022-09-01 Thread Rodrigo Vivi
Specially in GT reset case this could be triggered and try to disable things that had never been enabled. Let's add some protection here. Cc: Ashutosh Dixit Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/gt/intel_rps.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 1/2] drm/i915: Move some of the request decisions out of rps_boost function.

2022-09-01 Thread Rodrigo Vivi
Ideally all the decisions should be made before calling the boost function. And rps functions only receiving the rps struct. At least lets move most of the decisions to the request component, but still leave the test and set of the fence flag boost inside the rps because that might be time sensitiv

[Intel-gfx] [PATCH] drm/i915: Rename ggtt_view as gtt_view

2022-09-01 Thread Niranjana Vishwanathapura
So far, different views (normal, partial, rotated and remapped) into the same object are only supported for GGTT mappings. But with the upcoming VM_BIND feature, PPGTT will also use the partial view mapping. Hence rename ggtt_view to more generic gtt_view. Signed-off-by: Niranjana Vishwanathapura

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ttm: Abort suspend on i915_ttm_backup failure (rev3)

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915/ttm: Abort suspend on i915_ttm_backup failure (rev3) URL : https://patchwork.freedesktop.org/series/107877/ State : success == Summary == CI Bug Log - changes from CI_DRM_12061 -> Patchwork_107877v3 Sum

Re: [Intel-gfx] [PATCH] drm/i915/dp_mst: Fix mst_mgr lookup during atomic check

2022-09-01 Thread Lyude Paul
Reviewed-by: Lyude Paul Thanks for catching this! On Thu, 2022-09-01 at 19:19 +0300, Imre Deak wrote: > If an MST connector was disabled in the old state during a commit, the > connector's best_encoder will be NULL, so we can't look up mst_mgr via > it. Do the lookup instead via intel_connector-

Re: [Intel-gfx] [PATCH 1/3] drm/i915: audit bo->resource usage

2022-09-01 Thread Thomas Hellström
On Wed, 2022-08-31 at 15:34 +0200, Christian König wrote: > Am 31.08.22 um 14:50 schrieb Matthew Auld: > > On 31/08/2022 13:35, Christian König wrote: > > > Am 31.08.22 um 14:06 schrieb Matthew Auld: > > > > On 31/08/2022 12:03, Christian König wrote: > > > > > Am 31.08.22 um 12:37 schrieb Matthew

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev7)

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev7) URL : https://patchwork.freedesktop.org/series/107766/ State : success == Summary == CI Bug Log - changes from CI_DRM_12058_full -> Patchwork_107766v7_full ==

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp_mst: Fix mst_mgr lookup during atomic check

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915/dp_mst: Fix mst_mgr lookup during atomic check URL : https://patchwork.freedesktop.org/series/108040/ State : success == Summary == CI Bug Log - changes from CI_DRM_12061 -> Patchwork_108040v1 Summary -

Re: [Intel-gfx] [PATCH] drm/i915/ttm: Abort suspend on i915_ttm_backup failure

2022-09-01 Thread Das, Nirmoy
On 9/1/2022 5:57 PM, Andrzej Hajda wrote: On 31.08.2022 18:18, Nirmoy Das wrote: On system suspend when system memory is low then i915_gem_obj_copy_ttm() could fail trying to backup a lmem obj. GEM_WARN_ON() is not enough, suspend shouldn't continue if i915_ttm_backup() throws an error. Refer

[Intel-gfx] [PATCH v3] drm/i915/ttm: Abort suspend on i915_ttm_backup failure

2022-09-01 Thread Nirmoy Das
On system suspend when system memory is low then i915_gem_obj_copy_ttm() could fail trying to backup a lmem obj. GEM_WARN_ON() is not enough, suspend shouldn't continue if i915_ttm_backup() throws an error. v2: Keep the fdo issue till we have a igt test(Matt). v3: Use %pe(Andrzej) References: htt

Re: [Intel-gfx] [PATCH] drm/i915: prevent integer overflow in query_engine_info()

2022-09-01 Thread Andrzej Hajda
On 01.09.2022 17:38, Dan Carpenter wrote: This code uses struct_size() but it stores the result in an int so the integer overflow checks are not effective. Record the types as size_t to prevent the size from being truncated. Fixes: bf3c50837506 ("drm/i915/query: Use struct_size() helper") Signe

Re: [Intel-gfx] [PATCH v7 08/15] mei: extend timeouts on slow devices.

2022-09-01 Thread Ceraolo Spurio, Daniele
@@ -990,7 +991,6 @@ static int mei_me_d0i3_enter(struct mei_device *dev) static int mei_me_d0i3_exit_sync(struct mei_device *dev) { struct mei_me_hw *hw = to_me_hw(dev); - unsigned long timeout = mei_secs_to_jiffies(MEI_D0I3_TIMEOUT); int ret; u32 reg; @@ -1

Re: [Intel-gfx] [PATCH] drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC

2022-09-01 Thread Rodrigo Vivi
On Wed, Aug 31, 2022 at 03:17:26PM -0700, Dixit, Ashutosh wrote: > On Wed, 31 Aug 2022 14:45:38 -0700, Rodrigo Vivi wrote: > > > > Hi Rodrigo, > > > We need to inform PCODE of a desired ring frequencies so PCODE update > > the memory frequencies to us. rps->min_freq and rps->max_freq are the > >

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: prevent integer overflow in query_engine_info()

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915: prevent integer overflow in query_engine_info() URL : https://patchwork.freedesktop.org/series/108038/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12061 -> Patchwork_108038v1 Summary

Re: [Intel-gfx] [PATCH v7 14/15] drm/i915/gsc: allocate extended operational memory in LMEM

2022-09-01 Thread Teres Alexis, Alan Previn
This patch hasnt changed since v5 and i already provided the R-b then so re-posting rb so patchworks can pick it up: Reviewed-by: Alan Previn On Sat, 2022-08-06 at 15:26 +0300, Winkler, Tomas wrote: > GSC requires more operational memory than available on chip. > Reserve 4M of LMEM for GSC ope

[Intel-gfx] [PATCH] drm/i915/dp_mst: Fix mst_mgr lookup during atomic check

2022-09-01 Thread Imre Deak
If an MST connector was disabled in the old state during a commit, the connector's best_encoder will be NULL, so we can't look up mst_mgr via it. Do the lookup instead via intel_connector->mst_port which always points to the primary encoder. This fixes the following: [ 58.922866] BUG: kernel NUL

Re: [Intel-gfx] [PATCH v7 07/15] mei: gsc: wait for reset thread on stop

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: From: Alexander Usyskin Wait for reset work to complete before initiating stop reset flow sequence. Signed-off-by: Alexander Usyskin Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio Daniele --- drivers/misc/mei/init.c | 2 +

Re: [Intel-gfx] [PATCH v7 06/15] mei: gsc: use polling instead of interrupts

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: A work-around for a HW issue in XEHPSDV that manifests itself when SW reads a gsc register when gsc is sending an interrupt. The work-around is to disable interrupts and to use polling instead. Cc: James Ausmus Signed-off-by: Vitaly Lubart Signed-of

Re: [Intel-gfx] [PATCH] drm/i915/ttm: Abort suspend on i915_ttm_backup failure

2022-09-01 Thread Andrzej Hajda
On 31.08.2022 18:18, Nirmoy Das wrote: On system suspend when system memory is low then i915_gem_obj_copy_ttm() could fail trying to backup a lmem obj. GEM_WARN_ON() is not enough, suspend shouldn't continue if i915_ttm_backup() throws an error. References: https://gitlab.freedesktop.org/drm/int

Re: [Intel-gfx] [PATCH] Revert "drm/i915/guc: Add delay to disable scheduling after pin count goes to zero"

2022-09-01 Thread Teres Alexis, Alan Previn
I think i found the problem - will trybot next before reposting a new rev. was a terribly careless typo when rebasing from internal for drmtip: guc_context_sched_disable called do_sched_disable which was supposed to call __guc_context_sched_disable (if the context was really meant to be finally d

[Intel-gfx] [PATCH] drm/i915: prevent integer overflow in query_engine_info()

2022-09-01 Thread Dan Carpenter
This code uses struct_size() but it stores the result in an int so the integer overflow checks are not effective. Record the types as size_t to prevent the size from being truncated. Fixes: bf3c50837506 ("drm/i915/query: Use struct_size() helper") Signed-off-by: Dan Carpenter --- I do not know i

Re: [Intel-gfx] [PATCH v7 05/15] drm/i915/gsc: add GSC XeHP SDV platform definition

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: From: Alexander Usyskin Define GSC on XeHP SDV (Intel(R) dGPU without display) XeHP SDV uses the same hardware settings as DG1, but uses polling instead of interrupts and runs the firmware in slow pace due to hardware limitations. Signed-off-by: Vi

Re: [Intel-gfx] [PATCH v7 02/15] mei: add kdoc for struct mei_aux_device

2022-09-01 Thread Ceraolo Spurio, Daniele
On 8/6/2022 5:26 AM, Tomas Winkler wrote: struct mei_aux_device is an interface structure requires proper documenation. Signed-off-by: Tomas Winkler Reviewed-by: Daniele Ceraolo Spurio Daniele --- include/linux/mei_aux.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/incl

Re: [Intel-gfx] [PATCH v7 00/15] GSC support for XeHP SDV and DG2

2022-09-01 Thread Greg Kroah-Hartman
On Sat, Aug 06, 2022 at 03:26:21PM +0300, Tomas Winkler wrote: > Add GSC support for XeHP SDV and DG2 platforms. > > The series includes changes for the mei driver: > - add ability to use polling instead of interrupts > - add ability to use extended timeouts > - setup extended operational memory f

Re: [Intel-gfx] [PATCH v7 10/15] mei: mkhi: add memory ready command

2022-09-01 Thread Greg Kroah-Hartman
On Sat, Aug 06, 2022 at 03:26:31PM +0300, Tomas Winkler wrote: > Add GSC memory ready command. > The command indicates to the firmware that extend operation > memory was setup and the firmware may enter PXP mode. > > CC: Daniele Ceraolo Spurio > Signed-off-by: Tomas Winkler > Signed-off-by: Alex

Re: [Intel-gfx] [PATCH v3 02/15] mei: add support to GSC extended header

2022-09-01 Thread Greg Kroah-Hartman
On Fri, Aug 19, 2022 at 03:53:22PM -0700, Daniele Ceraolo Spurio wrote: > --- a/drivers/misc/mei/hw-me.c > +++ b/drivers/misc/mei/hw-me.c > @@ -590,7 +590,10 @@ static int mei_me_hbuf_write(struct mei_device *dev, > u32 dw_cnt; > int empty_slots; > > - if (WARN_ON(!hdr || !data ||

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Abort suspend on i915_ttm_backup failure (rev2)

2022-09-01 Thread Das, Nirmoy
On 9/1/2022 2:29 PM, Patchwork wrote: Project List - Patchwork *Patch Details* *Series:* drm/i915/ttm: Abort suspend on i915_ttm_backup failure (rev2) *URL:* https://patchwork.freedesktop.org/series/107877/ *State:*failure *Details:* https://intel-gfx-ci.01.org/tree/drm-tip/Patch

Re: [Intel-gfx] [PATCH v4 06/21] drm/i915: Prepare to dynamic dma-buf locking specification

2022-09-01 Thread Ruhl, Michael J
>-Original Message- >From: Dmitry Osipenko >Sent: Wednesday, August 31, 2022 11:38 AM >To: David Airlie ; Gerd Hoffmann ; >Gurchetan Singh ; Chia-I Wu >; Daniel Vetter ; Daniel Almeida >; Gert Wollny ; >Gustavo Padovan ; Daniel Stone >; Tomeu Vizoso ; >Maarten Lankhorst ; Maxime Ripard >;

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: convert to using is_hdmi and has_audio from display info

2022-09-01 Thread Patchwork
== Series Details == Series: drm: convert to using is_hdmi and has_audio from display info URL : https://patchwork.freedesktop.org/series/108024/ State : success == Summary == CI Bug Log - changes from CI_DRM_12061 -> Patchwork_108024v1 Sum

[Intel-gfx] [PULL] drm-intel-fixes

2022-09-01 Thread Rodrigo Vivi
Hi Dave and Daniel, Here goes drm-intel-fixes-2022-09-01: - GVT fixes including fix for a CommetLake regression in mmio table and misc doc and typo fixes (Julia, Jiapeng, Colin, Alex) - Fix CCS handling (Matt) - Fix for guc requests after reset (Daniele) - Display DSI related fixes (Jani) - Dis

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: convert to using is_hdmi and has_audio from display info

2022-09-01 Thread Patchwork
== Series Details == Series: drm: convert to using is_hdmi and has_audio from display info URL : https://patchwork.freedesktop.org/series/108024/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Start using REG_BIT* macros

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Start using REG_BIT* macros URL : https://patchwork.freedesktop.org/series/108021/ State : success == Summary == CI Bug Log - changes from CI_DRM_12061 -> Patchwork_108021v1 Summary --- **SUCCES

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Start using REG_BIT* macros

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915: Start using REG_BIT* macros URL : https://patchwork.freedesktop.org/series/108021/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 1/3] drm/i915: audit bo->resource usage

2022-09-01 Thread Matthew Auld
On 01/09/2022 09:00, Christian König wrote: Am 31.08.22 um 18:32 schrieb Matthew Auld: On 31/08/2022 15:53, Matthew Auld wrote: On 31/08/2022 14:34, Christian König wrote: Am 31.08.22 um 14:50 schrieb Matthew Auld: On 31/08/2022 13:35, Christian König wrote: Am 31.08.22 um 14:06 schrieb Matt

[Intel-gfx] [PATCH 9/9] drm/rockchip: convert to using has_audio from display_info

2022-09-01 Thread Jani Nikula
Prefer the parsed results for has_audio in display info over calling drm_detect_monitor_audio(). Cc: Sandy Huang Cc: Heiko Stübner Signed-off-by: Jani Nikula --- drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 ++-- drivers/gpu/drm/rockchip/inno_hdmi.c | 3 ++- 2 files changed, 4 insertions(+), 3

[Intel-gfx] [PATCH 8/9] drm/rockchip: cdn-dp: call drm_connector_update_edid_property() unconditionally

2022-09-01 Thread Jani Nikula
Calling drm_connector_update_edid_property() should be done unconditionally instead of depending on the number of modes added. Also match the call order in inno_hdmi and rk3066_hdmi. Cc: Sandy Huang Cc: Heiko Stübner Signed-off-by: Jani Nikula --- drivers/gpu/drm/rockchip/cdn-dp-core.c | 5 ++-

[Intel-gfx] [PATCH 7/9] drm/sti/sti_hdmi: convert to using is_hdmi from display info

2022-09-01 Thread Jani Nikula
Prefer the parsed results for is_hdmi in display info over calling drm_detect_hdmi_monitor(). Remove the now redundant hdmi_monitor member from struct sti_hdmi. Cc: Alain Volmat Signed-off-by: Jani Nikula --- drivers/gpu/drm/sti/sti_hdmi.c | 11 ++- drivers/gpu/drm/sti/sti_hdmi.h | 2 -

[Intel-gfx] [PATCH 6/9] drm/i2c/tda998x: convert to using has_audio from display_info

2022-09-01 Thread Jani Nikula
Prefer the parsed results for has_audio in display info over calling drm_detect_monitor_audio(). Cc: Russell King Signed-off-by: Jani Nikula --- drivers/gpu/drm/i2c/tda998x_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu

[Intel-gfx] [PATCH 5/9] drm/exynos: convert to using is_hdmi from display info

2022-09-01 Thread Jani Nikula
Prefer the parsed results for is_hdmi in display info over calling drm_detect_hdmi_monitor(). Cc: Inki Dae Cc: Seung-Woo Kim Cc: Kyungmin Park Signed-off-by: Jani Nikula --- drivers/gpu/drm/exynos/exynos_hdmi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/g

[Intel-gfx] [PATCH 4/9] drm/tegra: convert to using is_hdmi from display info

2022-09-01 Thread Jani Nikula
Prefer the parsed results for is_hdmi in display info over calling drm_detect_hdmi_monitor(). Cc: Thierry Reding Cc: linux-te...@vger.kernel.org Signed-off-by: Jani Nikula --- drivers/gpu/drm/tegra/hdmi.c | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpu/dr

[Intel-gfx] [PATCH 3/9] drm/radeon: convert to using is_hdmi and has_audio from display info

2022-09-01 Thread Jani Nikula
Prefer the parsed results for is_hdmi and has_audio in display info over calling drm_detect_hdmi_monitor() and drm_detect_monitor_audio(), respectively. Cc: Alex Deucher Cc: Christian König Cc: "Pan, Xinhui" Cc: amd-...@lists.freedesktop.org Signed-off-by: Jani Nikula --- drivers/gpu/drm/rade

[Intel-gfx] [PATCH 2/9] drm/nouveau: convert to using is_hdmi and has_audio from display info

2022-09-01 Thread Jani Nikula
Prefer the parsed results for is_hdmi and has_audio in display info over calling drm_detect_hdmi_monitor() and drm_detect_monitor_audio(), respectively. Cc: Ben Skeggs Cc: Karol Herbst Cc: Lyude Paul Cc: nouv...@lists.freedesktop.org Signed-off-by: Jani Nikula --- drivers/gpu/drm/nouveau/disp

[Intel-gfx] [PATCH 1/9] drm/edid: parse display info has_audio similar to is_hdmi

2022-09-01 Thread Jani Nikula
Since we already iterate everything that's needed for determining audio, reduce the need to call drm_detect_monitor_audio() by storing has_audio to connector info. Signed-off-by: Jani Nikula --- drivers/gpu/drm/drm_edid.c | 6 ++ include/drm/drm_connector.h | 8 2 files changed, 14

[Intel-gfx] [PATCH 0/9] drm: convert to using is_hdmi and has_audio from display info

2022-09-01 Thread Jani Nikula
The low-hanging fruit of the drm todo item "Replace drm_detect_hdmi_monitor() with drm_display_info.is_hdmi", with has_audio changes on top. I'm afraid not all of these have been even build tested, let alone actually tested. BR, Jani. Cc: Laurent Pinchart Cc: Sandy Huang Cc: Heiko Stübner

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ttm: Abort suspend on i915_ttm_backup failure (rev2)

2022-09-01 Thread Patchwork
== Series Details == Series: drm/i915/ttm: Abort suspend on i915_ttm_backup failure (rev2) URL : https://patchwork.freedesktop.org/series/107877/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12057_full -> Patchwork_107877v2_full ===

Re: [Intel-gfx] [PATCH] drm/i915: Start using REG_BIT* macros

2022-09-01 Thread Jani Nikula
On Thu, 01 Sep 2022, Stanislav Lisovskiy wrote: > Lets start to use REG_BIT* macros, instead of (x << 0) like expressions. Please be more specific in the commit subject, it's not like we haven't started using REG_BIT in general, ever since we introduced it! ;) So refer to CDCLK_CTL. Please just

[Intel-gfx] [PATCH] drm/i915: Start using REG_BIT* macros

2022-09-01 Thread Stanislav Lisovskiy
Lets start to use REG_BIT* macros, instead of (x << 0) like expressions. Signed-off-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/i915_reg.h | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_r

[Intel-gfx] ✓ Fi.CI.IGT: success for Modify debugfs entry from dsc compressed bpp to input bpc

2022-09-01 Thread Patchwork
== Series Details == Series: Modify debugfs entry from dsc compressed bpp to input bpc URL : https://patchwork.freedesktop.org/series/107972/ State : success == Summary == CI Bug Log - changes from CI_DRM_12057_full -> Patchwork_107972v1_full ===

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Fix warning callstack for imbalance wakeref (rev7)

2022-09-01 Thread Imre Deak
On Wed, Aug 31, 2022 at 03:02:10PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/display: Fix warning callstack for imbalance wakeref (rev7) > URL : https://patchwork.freedesktop.org/series/107211/ > State : success Thanks for the patch, pushed to drm-intel-next. > > ==

[Intel-gfx] ✓ Fi.CI.BAT: success for Add DP MST DSC support to i915 (rev11)

2022-09-01 Thread Patchwork
== Series Details == Series: Add DP MST DSC support to i915 (rev11) URL : https://patchwork.freedesktop.org/series/101492/ State : success == Summary == CI Bug Log - changes from CI_DRM_12058 -> Patchwork_101492v11 Summary --- **SUCC

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add DP MST DSC support to i915 (rev11)

2022-09-01 Thread Patchwork
== Series Details == Series: Add DP MST DSC support to i915 (rev11) URL : https://patchwork.freedesktop.org/series/101492/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117

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