Re: [Intel-gfx] [PATCH] drm/i915: Skip Bit12 fw domain reset for gen12+

2022-08-23 Thread Gwan-gyeong Mun
On 8/18/22 3:00 PM, Matt Roper wrote: On Wed, Aug 17, 2022 at 03:43:04PM -0700, Radhakrishna Sripada wrote: Bit12 of the Forcewake request register should not be cleared post gen12. Do not touch this bit while clearing during fw domain reset. Bspec: 52542 Signed-off-by: Sushma Venkatesh Red

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: compute config for audio

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915/display: compute config for audio URL : https://patchwork.freedesktop.org/series/107647/ State : success == Summary == CI Bug Log - changes from CI_DRM_12018 -> Patchwork_107647v1 Summary --- **S

[Intel-gfx] ✓ Fi.CI.IGT: success for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation

2022-08-23 Thread Patchwork
== Series Details == Series: Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation URL : https://patchwork.freedesktop.org/series/107615/ State : success == Summary == CI Bug Log - changes from CI_DRM_12014_full -> Patchwork_1076

[Intel-gfx] [PATCH] drm/i915/display: compute config for audio

2022-08-23 Thread Borah, Chaitanya Kumar
In certain scenarios, we might have to filter out some audio configuration depending on HW limitation. For example, in GLK DP port more than 2 channels are not supported for audio. A monitor provides information of it's supported audio configurations through SAD (Short Audio Descriptors) which are

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop modifying "const" device info (rev3)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915: stop modifying "const" device info (rev3) URL : https://patchwork.freedesktop.org/series/105358/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12014_full -> Patchwork_105358v3_full Sum

Re: [Intel-gfx] [PATCHv3] drm/i915: Support Async Flip on Linear buffers

2022-08-23 Thread Murthy, Arun R
> -Original Message- > From: Ville Syrjälä > Sent: Tuesday, August 23, 2022 6:27 PM > To: Murthy, Arun R > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma > Subject: Re: [PATCHv3] drm/i915: Support Async Flip on Linear buffers > > On Mon, Jul 04, 2022 at 09:45:48PM +0530, Arun R Murth

Re: [Intel-gfx] [PATCH v3 01/14] drm/i915/guc: remove runtime info printing from time stamp logging

2022-08-23 Thread John Harrison
On 8/19/2022 05:02, Jani Nikula wrote: Commit 368d179adbac ("drm/i915/guc: Add GuC <-> kernel time stamp translation information") added intel_device_info_print_runtime() in the time info dump for no obvious reason or explanation in the commit message. It only logs the rawclk freq. Remove it. Cc

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add DG2 OA support (rev2)

2022-08-23 Thread Patchwork
== Series Details == Series: Add DG2 OA support (rev2) URL : https://patchwork.freedesktop.org/series/107584/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DG2 OA support (rev2)

2022-08-23 Thread Patchwork
== Series Details == Series: Add DG2 OA support (rev2) URL : https://patchwork.freedesktop.org/series/107584/ State : warning == Summary == Error: dim checkpatch failed 52bc7af769a8 drm/i915/perf: Fix OA filtering logic for GuC mode -:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit

Re: [Intel-gfx] [PATCH v6 3/4] drm/i915/display: add hotplug.suspended flag

2022-08-23 Thread Andrzej Hajda
On 22.08.2022 19:27, Imre Deak wrote: On Fri, Jul 22, 2022 at 02:51:42PM +0200, Andrzej Hajda wrote: HPD events during driver removal can be generated by hardware and software frameworks - drm_dp_mst, the former we can avoid by disabling interrupts, the latter can be triggered by any drm_dp_m

[Intel-gfx] [PATCH 19/19] drm/i915/perf: Enable OA for DG2

2022-08-23 Thread Umesh Nerlige Ramappa
OA was disabled for DG2 as support was missing. Enable it back now. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_perf.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index ce1b6ad4d107..f109aeeec

[Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2

2022-08-23 Thread Umesh Nerlige Ramappa
Add new OA formats for DG2. Some of the newer OA formats are not multples of 64 bytes and are not powers of 2. For those formats, adjust hw_tail accordingly when checking for new reports. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_perf.c | 63 -

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK tuning

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK tuning URL : https://patchwork.freedesktop.org/series/107638/ State : success == Summary == CI Bug Log - changes from CI_DRM_12017 -> Patchwork_107638v1 ===

Re: [Intel-gfx] [RFC v4 00/17] drm/display/dp_mst: Drop Radeon MST support, make MST atomic-only

2022-08-23 Thread Lyude Paul
Actually, talked with airlied and they suggested at this point I should just go ahead and push. So, pushed! Have fun getting nice DSC support everyone :) On Tue, 2022-08-23 at 13:26 -0400, Lyude Paul wrote: > Would anyone have any issues if I merged this today? The whole series is > acked, but I'm

[Intel-gfx] [PATCH 11/19] drm/i915/perf: Store a pointer to oa_format in oa_buffer

2022-08-23 Thread Umesh Nerlige Ramappa
DG2 introduces OA reports with 64 bit report header fields. Perf OA would need more information about the OA format in order to process such reports. Store all OA format info in oa_buffer instead of just the size and format-id. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_p

[Intel-gfx] [PATCH 09/19] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops

2022-08-23 Thread Umesh Nerlige Ramappa
With multi-gt, user can access multiple OA buffers concurrently. Use stream->lock instead of gt->perf.lock to serialize file operations. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_perf.c | 31 -- drivers/gpu/drm/i915/i915_perf_types.h | 5 ++

[Intel-gfx] [PATCH 13/19] drm/i915/perf: Add Wa_16010703925:dg2

2022-08-23 Thread Umesh Nerlige Ramappa
On DG2 A0, the OAR report format is buggy. Workaround is to not use it for A0. For A0, remove the OAR format from the bitmask of supported formats. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_perf.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH 07/19] drm/i915/perf: Simply use stream->ctx

2022-08-23 Thread Umesh Nerlige Ramappa
Earlier code used exclusive_stream to check for user passed context. Simplify this by accessing stream->ctx. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_perf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/driver

[Intel-gfx] [PATCH 18/19] drm/i915/guc: Support OA when Wa_16011777198 is enabled

2022-08-23 Thread Umesh Nerlige Ramappa
From: Vinay Belgaumkar There is a w/a to reset RCS/CCS before it goes into RC6. This breaks OA. Fix it by disabling RC6. Signed-off-by: Vinay Belgaumkar --- .../drm/i915/gt/uc/abi/guc_actions_slpc_abi.h | 9 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 45 +++ drivers/

[Intel-gfx] [PATCH 17/19] drm/i915/perf: Save/restore EU flex counters across reset

2022-08-23 Thread Umesh Nerlige Ramappa
If a drm client is killed, then hw contexts used by the client are reset immediately. This reset clears the EU flex counter configuration. If an OA use case is running in parallel, it would start seeing zeroed eu counter values following the reset even if the drm client is restarted. Save/restore t

[Intel-gfx] [PATCH 16/19] drm/i915/perf: Apply Wa_18013179988

2022-08-23 Thread Umesh Nerlige Ramappa
OA reports in the OA buffer contain an OA timestamp field that helps user calculate delta between 2 OA reports. The calculation relies on the CS timestamp frequency to convert the timestamp value to nanoseconds. The CS timestamp frequency is a function of the CTC_SHIFT value in RPM_CONFIG0. In DG2

[Intel-gfx] [PATCH 10/19] drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers

2022-08-23 Thread Umesh Nerlige Ramappa
User passes uabi engine class and instance to the perf OA interface. Use gt corresponding to the engine to pin the buffers to the right ggtt. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_perf.c | 21 +++-- 1 file changed, 19 insertions(+), 2 deletions(-) di

[Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2

2022-08-23 Thread Umesh Nerlige Ramappa
DG2 introduces 64 bit counters and OA reports that have 64 bit values for fields in the report header - report_id, timestamp, context_id and gpu ticks. i915 uses report_id, timestamp and context_id to check for valid reports. In some DG2 variants, only the lower dwords for timestamp, report_id and

[Intel-gfx] [PATCH 03/19] drm/i915/perf: Fix noa wait predication for DG2

2022-08-23 Thread Umesh Nerlige Ramappa
Predication for batch buffer commands changed in XEHPSDV. MI_BATCH_BUFFER_START predicates based on MI_SET_PREDICATE_RESULT register. The MI_SET_PREDICATE_RESULT register can only be modified with MI_SET_PREDICATE command. When configured, the MI_SET_PREDICATE command sets MI_SET_PREDICATE_RESULT b

[Intel-gfx] [PATCH 08/19] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf

2022-08-23 Thread Umesh Nerlige Ramappa
Make perf part of gt as the OAG buffer is specific to a gt. The refactor eventually simplifies programming the right OA buffer and the right HW registers when supporting multiple gts. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH 04/19] drm/i915/perf: Determine gen12 oa ctx offset at runtime

2022-08-23 Thread Umesh Nerlige Ramappa
Some SKUs of same gen12 platform may have different oactxctrl offsets. For gen12, determine oactxctrl offsets at runtime. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_perf.c | 149 ++- drivers/gpu/drm/i915/i915_perf_oa_regs.h | 2 +- 2 files ch

[Intel-gfx] [PATCH 15/19] drm/i915/perf: Add Wa_1508761755:dg2

2022-08-23 Thread Umesh Nerlige Ramappa
Disable Clock gating in EU when gathering the events so that EU events are not lost. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/i915_perf.c| 23 +++ 2 files changed, 24 insertions(+) diff --git a/driv

[Intel-gfx] [PATCH 06/19] drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size

2022-08-23 Thread Umesh Nerlige Ramappa
DG2 has a new feature to supports OA buffer sizes up to 128Mb by toggling a bit in OA_DEBUG. This would eventually be a user configurable parameter. Use OA buffer vma size in all calculations with some helpers. v2: Let compiler decide inline (Jani) Signed-off-by: Umesh Nerlige Ramappa --- drive

[Intel-gfx] [PATCH 12/19] drm/i915/perf: Parse 64bit report header formats correctly

2022-08-23 Thread Umesh Nerlige Ramappa
Now that OA formats come in flavor of 64 bit reports, the report header has 64 bit report-id, timestamp, context-id and gpu-ticks fields. When filtering these reports, use the right width for these fields. v2: Let compiler decide on inline (Jani) Signed-off-by: Umesh Nerlige Ramappa --- drivers

[Intel-gfx] [PATCH 05/19] drm/i915/perf: Enable commands per clock reporting in OA

2022-08-23 Thread Umesh Nerlige Ramappa
XEHPSDV and DG2 provide a way to configure bytes per clock vs commands per clock reporting. Enable command per clock setting on enabling OA. Signed-off-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_pci.c | 1 + drivers/gpu/dr

[Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode

2022-08-23 Thread Umesh Nerlige Ramappa
With GuC mode of submission, GuC is in control of defining the context id field that is part of the OA reports. To filter reports, UMD and KMD must know what sw context id was chosen by GuC. There is not interface between KMD and GuC to determine this, so read the upper-dword of EXECLIST_STATUS to

[Intel-gfx] [PATCH 00/19] Add DG2 OA support

2022-08-23 Thread Umesh Nerlige Ramappa
Add OA format support for DG2 and various fixes for DG2. The below 2 patches have uapi changes: drm/i915/perf: Add OA formats for DG2 drm/i915/perf: Apply Wa_18013179988 v2: - Drop inline (Jani) - Repost as some patches did not make it to the ML - Update Test-with id Test-with: 20220823183036.52

[Intel-gfx] [PATCH] drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK tuning

2022-08-23 Thread Matt Roper
Although register tuning settings are generally implemented via the workaround infrastructure, it turns out that the DRAW_WATERMARK register is not properly saved/restored by hardware around power events (i.e., RC6 entry) so updates to the value cannot be applied in the usual manner. New workaroun

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable Pipewriteback Framework (rev2)

2022-08-23 Thread Patchwork
== Series Details == Series: Enable Pipewriteback Framework (rev2) URL : https://patchwork.freedesktop.org/series/107573/ State : success == Summary == CI Bug Log - changes from CI_DRM_12017 -> Patchwork_107573v2 Summary --- **SUCCES

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable Pipewriteback Framework (rev2)

2022-08-23 Thread Patchwork
== Series Details == Series: Enable Pipewriteback Framework (rev2) URL : https://patchwork.freedesktop.org/series/107573/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable Pipewriteback Framework (rev2)

2022-08-23 Thread Patchwork
== Series Details == Series: Enable Pipewriteback Framework (rev2) URL : https://patchwork.freedesktop.org/series/107573/ State : warning == Summary == Error: dim checkpatch failed 695a3429a39e drm/i915: Define WD trancoder for i915 -:68: CHECK:LINE_SPACING: Please don't use multiple blank lin

[Intel-gfx] [PATCH v2 3/3] drm/i915: Enabling WD Transcoder

2022-08-23 Thread Kandpal, Suraj
From: Suraj Kandpal Adding support for writeback transcoder to start capturing frames using interrupt mechanism Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_acpi.c | 1 + drivers/gpu/drm/i915/display/intel_crtc

[Intel-gfx] [PATCH v2 2/3] drm/i915 : Changing intel_connector iterators

2022-08-23 Thread Kandpal, Suraj
From: Suraj Kandpal Changing intel_connector iterators as with writeback introduction not all drm_connector will be embedded within intel_connector. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.h | 7 ++--- .../drm/i915/display/intel_display_types.h| 26 +++

[Intel-gfx] [PATCH v2 1/3] drm/i915: Define WD trancoder for i915

2022-08-23 Thread Kandpal, Suraj
From: Suraj Kandpal Adding WD Types, WD transcoder to enum list and WD Transcoder offsets. Adding i915 register definitions related to WD transcoder Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.h | 6 + .../drm/i915/display/intel_display_types.h| 1 + dr

[Intel-gfx] [PATCH v2 0/3] Enable Pipewriteback Framework

2022-08-23 Thread Kandpal, Suraj
A patch series was floated in the drm mailing list which aimed to change the drm_connector and drm_encoder fields to pointer in the drm_connector_writeback structure, this received a huge pushback from the community but since i915 expects each connector present in the drm_device list to be a intel_

[Intel-gfx] [PATCH v2 3/3] drm/i915: Enabling WD Transcoder

2022-08-23 Thread Kandpal, Suraj
From: Suraj Kandpal Adding support for writeback transcoder to start capturing frames using interrupt mechanism Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_acpi.c | 1 + drivers/gpu/drm/i915/display/intel_crtc

[Intel-gfx] [PATCH v2 2/3] drm/i915 : Changing intel_connector iterators

2022-08-23 Thread Kandpal, Suraj
From: Suraj Kandpal Changing intel_connector iterators as with writeback introduction not all drm_connector will be embedded within intel_connector. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.h | 7 ++--- .../drm/i915/display/intel_display_types.h| 26 +++

[Intel-gfx] [PATCH v2 1/3] drm/i915: Define WD trancoder for i915

2022-08-23 Thread Kandpal, Suraj
From: Suraj Kandpal Adding WD Types, WD transcoder to enum list and WD Transcoder offsets. Adding i915 register definitions related to WD transcoder Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.h | 6 + .../drm/i915/display/intel_display_types.h| 1 + dr

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: fix null pointer dereference (rev4)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915: fix null pointer dereference (rev4) URL : https://patchwork.freedesktop.org/series/99621/ State : success == Summary == CI Bug Log - changes from CI_DRM_12017 -> Patchwork_99621v4 Summary --- **

Re: [Intel-gfx] [RFC v4 00/17] drm/display/dp_mst: Drop Radeon MST support, make MST atomic-only

2022-08-23 Thread Lyude Paul
Would anyone have any issues if I merged this today? The whole series is acked, but I'm not sure if we would like to wait for R-b's? On Wed, 2022-08-17 at 15:38 -0400, Lyude Paul wrote: > For quite a while we've been carrying around a lot of legacy modesetting > code in the MST helpers that has b

Re: [Intel-gfx] [PATCH] drm/edid: Handle EDID 1.4 range descriptor h/vfreq offsets

2022-08-23 Thread Jani Nikula
On Fri, 19 Aug 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > EDID 1.4 introduced some extra flags in the range > descriptor to support min/max h/vfreq >= 255. Consult them > to correctly parse the vfreq limits. > > Cc: sta...@vger.kernel.org > Closes: https://gitlab.freedesktop.org/drm/int

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/edid: Handle EDID 1.4 range descriptor h/vfreq offsets

2022-08-23 Thread Patchwork
== Series Details == Series: drm/edid: Handle EDID 1.4 range descriptor h/vfreq offsets URL : https://patchwork.freedesktop.org/series/107620/ State : success == Summary == CI Bug Log - changes from CI_DRM_12015 -> Patchwork_107620v1 Summar

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-23 Thread Jani Nikula
On Tue, 23 Aug 2022, "Nilawar, Badal" wrote: > On 23-08-2022 19:05, Jani Nikula wrote: >> On Tue, 23 Aug 2022, Guenter Roeck wrote: >>> On Tue, Aug 23, 2022 at 12:46:14PM +0300, Jani Nikula wrote: >>> [ ... ] >> >> So why not do this in i915 Kconfig: >> >> config DRM_I915 >>

Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-23 Thread Jani Nikula
On Tue, 23 Aug 2022, Mitul Golani wrote: > While executing i915_selftest, wakeref imbalance warning is seen > with i915_selftest failure. > > Currently when Driver is suspended, while doing unregister > it is taking wakeref without resuming the device. > This patch is resuming the device, if drive

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-23 Thread Nilawar, Badal
On 23-08-2022 19:05, Jani Nikula wrote: On Tue, 23 Aug 2022, Guenter Roeck wrote: On Tue, Aug 23, 2022 at 12:46:14PM +0300, Jani Nikula wrote: [ ... ] So why not do this in i915 Kconfig: config DRM_I915 ... depends on HWMON || HWMON=n With this change I am getting recursi

Re: [Intel-gfx] [PATCH] drm/i915/backlight: Disable pps power hook for aux based backlight

2022-08-23 Thread Jani Nikula
On Tue, 23 Aug 2022, Jani Nikula wrote: > On Mon, 22 Aug 2022, Jouni Högander wrote: >> Pps power hook seems to be problematic for backlight controlled via >> aux channel. Disable it for such cases. >> >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3657 >> Signed-off-by: Jouni Högan

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Fix warning callstack for imbalance wakeref (rev5)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915/display: Fix warning callstack for imbalance wakeref (rev5) URL : https://patchwork.freedesktop.org/series/107211/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12014 -> Patchwork_107211v5 ==

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-23 Thread Jani Nikula
On Tue, 23 Aug 2022, Guenter Roeck wrote: > On Tue, Aug 23, 2022 at 12:46:14PM +0300, Jani Nikula wrote: > [ ... ] >> >> >> >> So why not do this in i915 Kconfig: >> >> >> >> config DRM_I915 >> >> ... >> >> depends on HWMON || HWMON=n >> > With this change I am getting recursive dependancy e

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc/slpc: Allow SLPC to use efficient frequency (rev5)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915/guc/slpc: Allow SLPC to use efficient frequency (rev5) URL : https://patchwork.freedesktop.org/series/107101/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12011_full -> Patchwork_107101v5_full =

Re: [Intel-gfx] [PATCH] drm/i915/pps: added get_pps_idx() hook as part of pps_get_register() cleanup

2022-08-23 Thread Ville Syrjälä
On Wed, Aug 03, 2022 at 11:13:38AM +0300, Jani Nikula wrote: > On Wed, 03 Aug 2022, Animesh Manna wrote: > > To support dual LFP two instances of pps added from display gen12 onwards. > > Few older platform like VLV also has dual pps support but handling is > > different. So added separate hook ge

[Intel-gfx] [PATCH 2/2] drm/i915/bios: Use hardcoded fp_timing size for generating LFP data pointers

2022-08-23 Thread Ville Syrjala
From: Ville Syrjälä The current scheme for generating the LFP data table pointers (when the block including them is missing from the VBT) expects the 0x sequence to only appear in the fp_timing terminator entries. However some VBTs also have extra 0x sequences elsewhere in the LFP data. W

[Intel-gfx] [PATCH] drm/edid: Handle EDID 1.4 range descriptor h/vfreq offsets

2022-08-23 Thread Ville Syrjala
From: Ville Syrjälä EDID 1.4 introduced some extra flags in the range descriptor to support min/max h/vfreq >= 255. Consult them to correctly parse the vfreq limits. Cc: sta...@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6519 Signed-off-by: Ville Syrjälä --- drive

[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes for damage clips handling (rev2)

2022-08-23 Thread Patchwork
== Series Details == Series: Fixes for damage clips handling (rev2) URL : https://patchwork.freedesktop.org/series/106388/ State : success == Summary == CI Bug Log - changes from CI_DRM_12014 -> Patchwork_106388v2 Summary --- **SUCCE

Re: [Intel-gfx] [PATCHv3] drm/i915: Support Async Flip on Linear buffers

2022-08-23 Thread Ville Syrjälä
On Mon, Jul 04, 2022 at 09:45:48PM +0530, Arun R Murthy wrote: > Intel Gen do support Async Flip is supported on linear buffers. Since we > didn't had a use case, it was not enabled. Now that as part of hybrid > graphics for unsupported hardware pixel formats, its being converted to > linear memory

Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-23 Thread Golani, Mitulkumar Ajitkumar
> Hi Imre, > > > On Fri, Aug 12, 2022 at 10:17:24AM +0530, Mitul Golani wrote: > > > While executing i915_selftest, wakeref imbalance warning is seen > > > with i915_selftest failure. > > > > > > When device is already suspended, wakeref is acquired by > > > disable_rpm_wakeref_asserts and rpm own

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fixes for damage clips handling (rev2)

2022-08-23 Thread Patchwork
== Series Details == Series: Fixes for damage clips handling (rev2) URL : https://patchwork.freedesktop.org/series/106388/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./arch/x86/include/asm/bitops.h:1

[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation

2022-08-23 Thread Patchwork
== Series Details == Series: Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation URL : https://patchwork.freedesktop.org/series/107615/ State : success == Summary == CI Bug Log - changes from CI_DRM_12014 -> Patchwork_107615v1

Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-23 Thread Golani, Mitulkumar Ajitkumar
Hi Imre, > On Fri, Aug 12, 2022 at 10:17:24AM +0530, Mitul Golani wrote: > > While executing i915_selftest, wakeref imbalance warning is seen with > > i915_selftest failure. > > > > When device is already suspended, wakeref is acquired by > > disable_rpm_wakeref_asserts and rpm ownership is trans

Re: [Intel-gfx] [PATCH v8 1/8] overflow: Move and add few utility macros into overflow

2022-08-23 Thread Andrzej Hajda
On 23.08.2022 12:17, Gwan-gyeong Mun wrote: It moves overflows_type utility macro into overflow header from i915_utils header. The overflows_type can be used to catch the truncaion (overflow) between different data types. And it adds check_assign() macro which performs an assigning source value i

Re: [Intel-gfx] [PATCH] drm/i915/utils: remove unused KBps/MBps/GBps macros

2022-08-23 Thread Matthew Auld
On Mon, 15 Aug 2022 at 09:09, Jani Nikula wrote: > > Remove unused macros. If needed again, such macros belong in > . > > Signed-off-by: Jani Nikula Reviewed-by: Matthew Auld > --- > drivers/gpu/drm/i915/i915_utils.h | 4 > 1 file changed, 4 deletions(-) > > diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-23 Thread Mitul Golani
While executing i915_selftest, wakeref imbalance warning is seen with i915_selftest failure. Currently when Driver is suspended, while doing unregister it is taking wakeref without resuming the device. This patch is resuming the device, if driver is already suspended and doing unregister process.

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-23 Thread Guenter Roeck
On Tue, Aug 23, 2022 at 12:46:14PM +0300, Jani Nikula wrote: [ ... ] > >> > >> So why not do this in i915 Kconfig: > >> > >> config DRM_I915 > >>... > >>depends on HWMON || HWMON=n > > With this change I am getting recursive dependancy error when I run make > > oldconfig > > > > badal@bn

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation

2022-08-23 Thread Patchwork
== Series Details == Series: Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation URL : https://patchwork.freedesktop.org/series/107615/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode use

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation

2022-08-23 Thread Patchwork
== Series Details == Series: Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation URL : https://patchwork.freedesktop.org/series/107615/ State : warning == Summary == Error: dim checkpatch failed 5b7f7fd11ece overflow: Move and

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: stop modifying "const" device info (rev3)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915: stop modifying "const" device info (rev3) URL : https://patchwork.freedesktop.org/series/105358/ State : success == Summary == CI Bug Log - changes from CI_DRM_12014 -> Patchwork_105358v3 Summary -

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/backlight: Disable pps power hook for aux based backlight

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915/backlight: Disable pps power hook for aux based backlight URL : https://patchwork.freedesktop.org/series/107555/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12011_full -> Patchwork_107555v1_full ==

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: stop modifying "const" device info (rev3)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915: stop modifying "const" device info (rev3) URL : https://patchwork.freedesktop.org/series/105358/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: stop modifying "const" device info (rev3)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915: stop modifying "const" device info (rev3) URL : https://patchwork.freedesktop.org/series/105358/ State : warning == Summary == Error: dim checkpatch failed b0d2dc3296d2 drm/i915/guc: remove runtime info printing from time stamp logging ca2ba90a7f98 drm/i9

[Intel-gfx] [PATCH v2 4/4] drm/tests: Set also mock plane src_x, src_y, src_w and src_h

2022-08-23 Thread Jouni Högander
We need to set also src_x, src_y, src_w and src_h for the mock plane. After fix for drm_atomic_helper_damage_iter_init we are using these when iterating damage_clips. Signed-off-by: Jouni Högander --- drivers/gpu/drm/tests/drm_damage_helper_test.c | 5 + 1 file changed, 5 insertions(+) diff

[Intel-gfx] [PATCH v2 3/4] drm/i915/display: Use drm helper instead of own loop for damage clips

2022-08-23 Thread Jouni Högander
Use existing drm_atomic_helper_damage_merged from generic drm code instead of implementing own loop to iterate over damage_clips. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 17 + 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/driv

[Intel-gfx] [PATCH v2 1/4] drm: Use original src rect while initializing damage iterator

2022-08-23 Thread Jouni Högander
drm_plane_state->src might be modified by the driver. This is done e.g. in i915 driver when there is bigger framebuffer than the plane and there is some offset within framebuffer. I915 driver calculates separate offset and adjusts src rect coords to be relative to this offset. Damage clips are stil

[Intel-gfx] [PATCH v2 2/4] drm/i915/display: Use original src in psr2 sel fetch area calculation

2022-08-23 Thread Jouni Högander
drm_plane_state->src is modified when offset is calculated: before calculation: src.x1 = 8192, src.y1 = 8192 after calculation (pitch = 65536, cpp = 4, alignment = 262144) src.x1 = 8192, src.y1 = 0, offset = 0x2000 Damage clips are relative to original coodrdinates provided by user-space. To

[Intel-gfx] [PATCH v2 0/4] Fixes for damage clips handling

2022-08-23 Thread Jouni Högander
Currently damage clips handling is broken for planes when using big framebuffer + offset in case kms driver adjusts drm_plane_state.src coords. This is because damage clips are using coords relative to original coords from user-space. This patchset is fixing this by using original coords from user

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: fix null pointer dereference (rev3)

2022-08-23 Thread Patchwork
== Series Details == Series: drm/i915: fix null pointer dereference (rev3) URL : https://patchwork.freedesktop.org/series/99621/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12014 -> Patchwork_99621v3 Summary --- **

Re: [Intel-gfx] [PATCH v3 11/15] drm/i915/huc: track delayed HuC load with a fence

2022-08-23 Thread Jani Nikula
On Fri, 19 Aug 2022, Daniele Ceraolo Spurio wrote: > Given that HuC load is delayed on DG2, this patch adds support for a fence > that can be used to wait for load completion. No waiters are added in this > patch (they're coming up in the next one), to keep the focus of the > patch on the trackin

Re: [Intel-gfx] [PATCH v3 09/15] drm/i915/pxp: add huc authentication and loading command

2022-08-23 Thread Jani Nikula
On Fri, 19 Aug 2022, Daniele Ceraolo Spurio wrote: > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.h > b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.h > new file mode 100644 > index ..6cf2d00548c0 > --- /dev/null > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.h > @@ -0,0 +1,15 @@ >

Re: [Intel-gfx] [PATCH v3 05/15] mei: pxp: add command streamer API to the PXP driver

2022-08-23 Thread Jani Nikula
On Fri, 19 Aug 2022, Daniele Ceraolo Spurio wrote: > From: Vitaly Lubart > > The discrete graphics card with GSC firmware > using command streamer API hence it requires to enhance > pxp module with the new gsc_command() handler. > > The handler is implemented via mei_pxp_gsc_command() which is >

Re: [Intel-gfx] [PATCH 3/5] drm/i915/dp: Fix DFP RGB->YCBCR conversion

2022-08-23 Thread Jani Nikula
On Mon, 22 Aug 2022, Ankit Nautiyal wrote: > The decision to use DFP output format conversion capabilities should be > during compute_config phase. > > This patch: > -uses the members of intel_dp->dfp to only store the > format conversion capabilities of the DP device. > -adds new members to crtc_

Re: [Intel-gfx] [PATCH 1/5] drm/i915/dp: Add helper to check DSC1.2 for HDMI2.1 DFP

2022-08-23 Thread Jani Nikula
On Mon, 22 Aug 2022, Ankit Nautiyal wrote: > Add helper function to check if Downstream HDMI 2.1 sink supports > DSC1.2. If we do this, are we going to add helpers for all the details in display_info, when there's no conversions being done? I think the answer should be "no". i.e. why do we reall

Re: [Intel-gfx] [PATCH] drm/i915/display: Fix warning callstack for imbalance wakeref

2022-08-23 Thread Jani Nikula
On Tue, 23 Aug 2022, Mitul Golani wrote: > While executing i915_selftest, wakeref imbalance warning is seen > with i915_selftest failure. > > Currently when Driver is suspended, while doing unregister > it is taking wakeref without resuming the device. > This patch is resuming the device, if drive

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Move display pcode requests to intel_de

2022-08-23 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de URL : https://patchwork.freedesktop.org/series/107610/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12014 -> Patchwork_107610v1 =

[Intel-gfx] [PATCH v8 7/8] drm/i915: Use error code as -E2BIG when the size of gem ttm object is too large

2022-08-23 Thread Gwan-gyeong Mun
The ttm_bo_init_reserved() functions returns -ENOSPC if the size is too big to add vma. The direct function that returns -ENOSPC is drm_mm_insert_node_in_range(). To handle the same error as other code returning -E2BIG when the size is too large, it converts return value to -E2BIG. Signed-off-by:

[Intel-gfx] [PATCH v8 8/8] drm/i915: Remove truncation warning for large objects

2022-08-23 Thread Gwan-gyeong Mun
From: Chris Wilson Having addressed the issues surrounding incorrect types for local variables and potential integer truncation in using the scatterlist API, we have closed all the loop holes we had previously identified with dangerously large object creation. As such, we can eliminate the warnin

[Intel-gfx] [PATCH v8 6/8] drm/i915: Check if the size is too big while creating shmem file

2022-08-23 Thread Gwan-gyeong Mun
The __shmem_file_setup() function returns -EINVAL if size is greater than MAX_LFS_FILESIZE. To handle the same error as other code that returns -E2BIG when the size is too large, it add a code that returns -E2BIG when the size is larger than the size that can be handled. v4: If BITS_PER_LONG is 32

[Intel-gfx] [PATCH v8 3/8] drm/i915/gem: Typecheck page lookups

2022-08-23 Thread Gwan-gyeong Mun
From: Chris Wilson We need to check that we avoid integer overflows when looking up a page, and so fix all the instances where we have mistakenly used a plain integer instead of a more suitable long. Be pedantic and add integer typechecking to the lookup so that we can be sure that we are safe. A

[Intel-gfx] [PATCH v8 5/8] drm/i915: Check for integer truncation on the configuration of ttm place

2022-08-23 Thread Gwan-gyeong Mun
There is an impedance mismatch between the first/last valid page frame number of ttm place in unsigned and our memory/page accounting in unsigned long. As the object size is under the control of userspace, we have to be prudent and catch the conversion errors. To catch the implicit truncation as we

[Intel-gfx] [PATCH v8 4/8] drm/i915: Check for integer truncation on scatterlist creation

2022-08-23 Thread Gwan-gyeong Mun
From: Chris Wilson There is an impedance mismatch between the scatterlist API using unsigned int and our memory/page accounting in unsigned long. That is we may try to create a scatterlist for a large object that overflows returning a small table into which we try to fit very many pages. As the o

[Intel-gfx] [PATCH v8 1/8] overflow: Move and add few utility macros into overflow

2022-08-23 Thread Gwan-gyeong Mun
It moves overflows_type utility macro into overflow header from i915_utils header. The overflows_type can be used to catch the truncaion (overflow) between different data types. And it adds check_assign() macro which performs an assigning source value into destination ptr along with an overflow che

[Intel-gfx] [PATCH v8 2/8] util_macros: Add exact_type macro to catch type mis-match while compiling

2022-08-23 Thread Gwan-gyeong Mun
It adds exact_type and exactly_pgoff_t macro to catch type mis-match while compiling. The existing typecheck() macro outputs build warnings, but the newly added exact_type() macro uses the BUILD_BUG_ON() macro to generate a build break when the types are different and can be used to detect explicit

[Intel-gfx] [PATCH v8 0/8] Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation

2022-08-23 Thread Gwan-gyeong Mun
This patch series fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation, etc. We need to check that we avoid integer overflows when looking up a page, and so fix all the instances where we have mistakenly used a plain integer instead o

Re: [Intel-gfx] [PATCH 3/7] drm/i915/guc: Add GuC <-> kernel time stamp translation information

2022-08-23 Thread Jani Nikula
On Fri, 19 Aug 2022, John Harrison wrote: > On 8/19/2022 03:45, Jani Nikula wrote: >> On Wed, 27 Jul 2022, john.c.harri...@intel.com wrote: >>> From: John Harrison >>> >>> It is useful to be able to match GuC events to kernel events when >>> looking at the GuC log. That requires being able to con

[Intel-gfx] [PATCH v3 11/14] drm/i915: move pipe_mask and cpu_transcoder_mask to runtime info

2022-08-23 Thread Jani Nikula
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula Reviewed-by: Maarten Lankhort --- drivers/gpu/drm/i915/display/intel_display.h | 4 +- drivers/gpu/drm/i915/i915_drv.h | 6 +- drivers/gpu/drm/i915/i915_pci.c | 66 ++-- drivers/g

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de

2022-08-23 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de URL : https://patchwork.freedesktop.org/series/107610/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separatel

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Move display pcode requests to intel_de

2022-08-23 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Move display pcode requests to intel_de URL : https://patchwork.freedesktop.org/series/107610/ State : warning == Summary == Error: dim checkpatch failed 8882eb8fcb3c drm/i915: Move display pcode requests to intel_de -:226: CHE

Re: [Intel-gfx] [PATCH 1/7] drm/i915/hwmon: Add HWMON infrastructure

2022-08-23 Thread Jani Nikula
On Tue, 23 Aug 2022, "Nilawar, Badal" wrote: > On 19-08-2022 16:05, Jani Nikula wrote: >> On Fri, 19 Aug 2022, Badal Nilawar wrote: >>> From: Dale B Stimson >>> >>> The i915 HWMON module will be used to expose voltage, power and energy >>> values for dGfx. Here we set up i915 hwmon infrastructur

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