Re: [Intel-gfx] [PATCH v2 3/7] vfio/mdev: Pass in a struct vfio_device * to vfio_pin/unpin_pages()

On Fri, Apr 22, 2022 at 05:56:51PM -0300, Jason Gunthorpe wrote: > On Fri, Apr 22, 2022 at 08:22:32AM +0200, Christoph Hellwig wrote: > > Nit: why do some of these patches that don't touch the mdev code > > mdev in the subject? > > I consider these APIs to be 'mdev apis' because only mdev drivers

[Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Turn on compute engine support (rev3)

== Series Details == Series: i915: Turn on compute engine support (rev3) URL : https://patchwork.freedesktop.org/series/103011/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11544_full -> Patchwork_103011v3_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/fbc: Consult hw.crtc instead of uapi.crtc (rev4)

== Series Details == Series: series starting with [1/2] drm/i915/fbc: Consult hw.crtc instead of uapi.crtc (rev4) URL : https://patchwork.freedesktop.org/series/102657/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11544_full -> Patchwork_102657v4_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for i915: Turn on compute engine support (rev3)

== Series Details == Series: i915: Turn on compute engine support (rev3) URL : https://patchwork.freedesktop.org/series/103011/ State : success == Summary == CI Bug Log - changes from CI_DRM_11544 -> Patchwork_103011v3 Summary --- **

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/rc6: Access RC6 regs with forcewake

== Series Details == Series: drm/i915/rc6: Access RC6 regs with forcewake URL : https://patchwork.freedesktop.org/series/102995/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11544_full -> Patchwork_102995v1_full Summary --

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Turn on compute engine support (rev3)

== Series Details == Series: i915: Turn on compute engine support (rev3) URL : https://patchwork.freedesktop.org/series/103011/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Turn on compute engine support (rev2)

On Fri, Apr 22, 2022 at 10:07:00PM +, Patchwork wrote: > == Series Details == > > Series: i915: Turn on compute engine support (rev2) > URL : https://patchwork.freedesktop.org/series/103011/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_11544 -> Patchwork_103011v

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Turn on compute engine support (rev2)

== Series Details == Series: i915: Turn on compute engine support (rev2) URL : https://patchwork.freedesktop.org/series/103011/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11544 -> Patchwork_103011v2 Summary --- **

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Turn on compute engine support (rev2)

== Series Details == Series: i915: Turn on compute engine support (rev2) URL : https://patchwork.freedesktop.org/series/103011/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915: Turn on compute engine support

== Series Details == Series: i915: Turn on compute engine support URL : https://patchwork.freedesktop.org/series/103011/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11544 -> Patchwork_103011v1 Summary --- **FAILURE

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Turn on compute engine support

== Series Details == Series: i915: Turn on compute engine support URL : https://patchwork.freedesktop.org/series/103011/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/fbc: Consult hw.crtc instead of uapi.crtc (rev4)

== Series Details == Series: series starting with [1/2] drm/i915/fbc: Consult hw.crtc instead of uapi.crtc (rev4) URL : https://patchwork.freedesktop.org/series/102657/ State : success == Summary == CI Bug Log - changes from CI_DRM_11544 -> Patchwork_102657v4 =

[Intel-gfx] [PATCH 2/2] drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines

From: Daniele Ceraolo Spurio Cc: Vinay Belgaumkar Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Matt Roper Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/i915_pci.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gp

[Intel-gfx] [PATCH 0/2] i915: Turn on compute engine support

Now that the necessary GuC-based hardware workarounds have landed, we're finally ready to actually enable compute engines for use by userspace. All of the "under-the-hood" heavy lifting already landed a while back in other series so all that remains now is to add I915_ENGINE_CLASS_COMPUTE to the ua

[Intel-gfx] [PATCH 1/2] drm/i915/xehp: Add compute engine ABI

We're now ready to start exposing compute engines to userspace. While we're at it, let's extend the kerneldoc description for the other engine types as well. Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Cc: Vinay Belgaumkar Cc: Jordan Justen Cc: Szymon Morek UMD (mesa): https://gitlab.freed

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/rc6: Access RC6 regs with forcewake

== Series Details == Series: drm/i915/rc6: Access RC6 regs with forcewake URL : https://patchwork.freedesktop.org/series/102995/ State : success == Summary == CI Bug Log - changes from CI_DRM_11544 -> Patchwork_102995v1 Summary --- *

[Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Add first set of DG2 PCI IDs

== Series Details == Series: i915: Add first set of DG2 PCI IDs URL : https://patchwork.freedesktop.org/series/103003/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/103003/revisions/1/mbox/ not applied Applying: i915: Add first set of DG2 PCI IDs

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

== Series Details == Series: drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses URL : https://patchwork.freedesktop.org/series/102941/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11537_full -> Patchwork_102941v1_full =

Re: [Intel-gfx] [PATCH] i915: Add first set of DG2 PCI IDs

On Fri, Apr 22, 2022 at 10:12:29AM -0700, Lucas De Marchi wrote: > On Fri, Apr 22, 2022 at 09:55:35AM -0700, Matt Roper wrote: > > The IDs added here are the subset reserved for 'motherboard down' > > designs of DG2. We have all the necessary support upstream to enable > > these now (although they

Re: [Intel-gfx] [PATCH] i915: Add first set of DG2 PCI IDs

On Fri, Apr 22, 2022 at 09:55:35AM -0700, Matt Roper wrote: The IDs added here are the subset reserved for 'motherboard down' designs of DG2. We have all the necessary support upstream to enable these now (although they'll continue to require force_probe until the usual requirements are met).

Re: [Intel-gfx] [PATCH] i915: Add first set of DG2 PCI IDs

Looks like I somehow lost the "drm/" at the beginning of the subject line prefix...that wasn't intentional. Matt On Fri, Apr 22, 2022 at 09:55:35AM -0700, Matt Roper wrote: > The IDs added here are the subset reserved for 'motherboard down' > designs of DG2. We have all the necessary support up

[Intel-gfx] [PATCH] i915: Add first set of DG2 PCI IDs

The IDs added here are the subset reserved for 'motherboard down' designs of DG2. We have all the necessary support upstream to enable these now (although they'll continue to require force_probe until the usual requirements are met). The remaining DG2 IDs for add-in cards will come in a future pa

Re: [Intel-gfx] [RFC] drm/i915/rc6: Access RC6 regs with forcewake

On Fri, Apr 22, 2022 at 07:07:52PM +0530, Badal Nilawar wrote: > To access RC6 related MMIO regs use intel_uncore_write(), which grabs > forcewake if reg requires a forcewake. > > Signed-off-by: Badal Nilawar > --- > drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +- > 1 file changed, 1 insertion(+), 1

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

== Series Details == Series: drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses URL : https://patchwork.freedesktop.org/series/102941/ State : success == Summary == CI Bug Log - changes from CI_DRM_11537 -> Patchwork_102941v1 Summa

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

== Series Details == Series: drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses URL : https://patchwork.freedesktop.org/series/102941/ State : success == Summary == CI Bug Log - changes from CI_DRM_11537 -> Patchwork_102941v1 Summa

[Intel-gfx] [RFC] drm/i915/rc6: Access RC6 regs with forcewake

To access RC6 related MMIO regs use intel_uncore_write(), which grabs forcewake if reg requires a forcewake. Signed-off-by: Badal Nilawar --- drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

== Series Details == Series: drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses URL : https://patchwork.freedesktop.org/series/102941/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11537 -> Patchwork_102941v1 Summa

[Intel-gfx] ✗ Fi.CI.BAT: failure for Attach and Set vrr_enabled property

== Series Details == Series: Attach and Set vrr_enabled property URL : https://patchwork.freedesktop.org/series/102978/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11540 -> Patchwork_102978v1 Summary --- **FAILURE*

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Attach and Set vrr_enabled property

== Series Details == Series: Attach and Set vrr_enabled property URL : https://patchwork.freedesktop.org/series/102978/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./drivers/gpu/drm/amd/amdgpu/../amdg

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

Hi Lakshmi, On Thu, Apr 21, 2022 at 09:08:29PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses > URL : https://patchwork.freedesktop.org/series/102941/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_D

[Intel-gfx] [PULL] drm-misc-fixes

Hi Daniel, Dave, Here's this week drm-misc-fixes PR. The two reverts for devm_drm_of_get_bridge are likely to bring more reverts in the future. Indeed, it introduced some code to fetch the panel automatically on device tree child nodes as well, but that broke any driver with a child node that wa

Re: [Intel-gfx] [PATCH 3/4] drm/i915/gt: Extend doc on Flat-CCS obj eviction

On 2022-04-21 at 19:07:29 +0530, Hellstrom, Thomas wrote: > On Thu, 2022-04-21 at 17:08 +0530, Ramalingam C wrote: > > Capture the eviction details for Flat-CCS capable lmem only objects > > and > > lmem objects with smem residency. This also captures the impact of > > eviction on object's memory

[Intel-gfx] [RFC 2/2] drm/i915/vrr: Attach and set drm crtc vrr_enabled property

This function attaches & sets the vrr_enabled property for crtc based on the platform support and the request from userspace. Cc: Ville Syrjälä Cc: Manasi Navare Signed-off-by: Bhanuprakash Modem --- drivers/gpu/drm/i915/display/intel_crtc.c | 3 +++ drivers/gpu/drm/i915/display/intel_vrr.c |

[Intel-gfx] [RFC 1/2] drm/vrr: Attach vrr_enabled property to the drm crtc

Modern display hardware is capable of supporting variable refresh rates. This patch introduces helpers to attach and set "vrr_enabled" property on the crtc to allow userspace to query VRR enabled status on that crtc. Atomic drivers should attach this property to crtcs those are capable of driving

[Intel-gfx] [RFC 0/2] Attach and Set vrr_enabled property

This series will add a support to attach & set the vrr_enabled property for crtc based on the platform support and the request from userspace. And userspace can also query to get the status of "vrr_enabled". Test-with: 20220422075223.2792586-2-bhanuprakash.mo...@intel.com Bhanuprakash Modem (2):