== Series Details ==
Series: drm/i915: Media freq factor and per-gt enhancements/fixes
URL : https://patchwork.freedesktop.org/series/102665/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11523 -> Patchwork_102665v1
Summary
On Wed, Apr 20, 2022 at 08:13:47AM +0300, Kalle Valo wrote:
> + linux-wireless, netdev
>
> Jani Nikula writes:
>
> > On Thu, 14 Apr 2022, Greg Kroah-Hartman wrote:
> >> On Thu, Apr 14, 2022 at 03:30:32PM +0300, Jani Nikula wrote:
> >>> Hey, I've sent this before, ages ago, but haven't really fo
Hi Karol,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on linus/master v5.18-rc3 next-20220419]
[cannot apply to drm-intel/for-linux-next linux/master]
[If your patch is applied to the wrong git tree, kindly drop us a note
Each gt contains an independent instance of pcode. Extend pcode functions
to interface with pcode on different gt's. Previous (GT0) pcode read/write
interfaces are preserved.
Cc: Rodrigo Vivi
Cc: Mike Ruhl
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/intel_pcode.c | 108 +
Convert appropriate callers to use per-gt pcode functions. Callers using
pcode functions at "global scope", including *all* display functions are
not converted, they continue to use the legacy pcode interface.
Cc: Andi Shyti
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: Ashutosh Dixit
---
d
Create a gt/gtN/.defaults directory (similar to
engine//.defaults) to expose default parameter values for each
gt in sysfs. Populate the .defaults directory with RPS parameter default
values in order to allow userspace to revert to default values when needed.
This patch adds the following sysfs fi
All kmalloc'd kobjects need a kobject_put() to free memory. For example in
previous code, kobj_gt_release() never gets called. The requirement of
kobject_put() now results in a slightly different code organization.
Cc: Andi Shyti
Cc: Andrzej Hajda
Cc: Rodrigo Vivi
Fixes: b770bcfae9ad ("drm/i915
Expose new sysfs to program and retrieve media freq factor. Factor values
of 0 (dynamic), 0.5 and 1.0 are supported via a u8.8 fixed point
representation (corresponding to integer values of 0, 128 and 256
respectively).
Media freq factor is converted to media_ratio_mode for GuC. It is
programmed i
From: Dale B Stimson
Add a couple of helpers to help formatting pcode commands and improve code
readability.
v2: Fixed commit author (Rodrigo)
Cc: Mike Ruhl
Cc: Rodrigo Vivi
Signed-off-by: Dale B Stimson
Signed-off-by: Ashutosh Dixit
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915
Some recent Intel dGfx platforms allow media IP to work at a different
frequency from the base GT. This patch series exposes sysfs controls for
this functionality in the new per-gt sysfs. Some enhancements and fixes to
previous per-gt functionality are also included to complete the new
functionalit
From: Dale B Stimson
Retrieve RP0 and RPn freq for media IP from PCODE and display in per-gt
sysfs. This patch adds the following files to gt/gtN sysfs:
* media_RP0_freq_mhz
* media_RPn_freq_mhz
v2: Fixed commit author (Rodrigo)
Cc: Rodrigo Vivi
Cc: Joonas Lahtinen
Signed-off-by: Dale B Stims
Media ratio mode (the ability for media IP to work at a different frequency
from the GT) is available for a subset of dGfx platforms supporting
GuC/SLPC. Introduce 'has_media_ratio_mode' flag in intel_device_info to
identify these platforms and set it for XEHPSDV and DG2/ATS-M.
Cc: Rodrigo Vivi
S
Add the following sysfs file to gt/gtN/.defaults:
* media_freq_factor
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 18 ++
drivers/gpu/drm/i915/gt/intel_gt_types.h| 1 +
drivers/gpu/drm/i915/gt/uc/intel
Hi all,
After merging the drm-misc tree, today's linux-next build (htmldocs)
produced this warning:
drivers/gpu/drm/drm_edid.c:2136: warning: Function parameter or member
'read_block' not described in 'drm_do_get_edid'
drivers/gpu/drm/drm_edid.c:2136: warning: Function parameter or member
'cont
On Fri, 15 Apr 2022 03:21:26 -0700, Rodrigo Vivi wrote:
> On Thu, Apr 14, 2022 at 03:31:07PM -0700, Dixit, Ashutosh wrote:
> > On Thu, 14 Apr 2022 06:28:57 -0700, Jani Nikula wrote:
> > >
> > > On Wed, 13 Apr 2022, Ashutosh Dixit wrote:
> > > > Each gt contains an independent instance of pcode. Ex
From: Dale B Stimson
Retrieve RP0 and RPn freq for media IP from PCODE and display in per-gt
sysfs. This patch adds the following files to gt/gtN sysfs:
* media_RP0_freq_mhz
* media_RPn_freq_mhz
v2: Fixed commit author (Rodrigo)
Cc: Rodrigo Vivi
Cc: Joonas Lahtinen
Signed-off-by: Dale B Stims
From: Dale B Stimson
Add a couple of helpers to help formatting pcode commands and improve code
readability.
v2: Fixed commit author (Rodrigo)
Cc: Mike Ruhl
Cc: Rodrigo Vivi
Signed-off-by: Dale B Stimson
Signed-off-by: Ashutosh Dixit
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915
Expose new sysfs to program and retrieve media freq factor. Factor values
of 0 (dynamic), 0.5 and 1.0 are supported via a u8.8 fixed point
representation (corresponding to integer values of 0, 128 and 256
respectively).
Media freq factor is converted to media_ratio_mode for GuC. It is
programmed i
Each gt contains an independent instance of pcode. Extend pcode functions
to interface with pcode on different gt's. Previous (GT0) pcode read/write
interfaces are preserved.
Cc: Rodrigo Vivi
Cc: Mike Ruhl
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/intel_pcode.c | 108 +
All kmalloc'd kobjects need a kobject_put() to free memory. For example in
previous code, kobj_gt_release() never gets called. The requirement of
kobject_put() now results in a slightly different code organization.
Cc: Andi Shyti
Cc: Andrzej Hajda
Cc: Rodrigo Vivi
Fixes: b770bcfae9ad ("drm/i915
Add the following sysfs file to gt/gtN/.defaults:
* media_freq_factor
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 18 ++
drivers/gpu/drm/i915/gt/intel_gt_types.h| 1 +
drivers/gpu/drm/i915/gt/uc/intel
Convert appropriate callers to use per-gt pcode functions. Callers using
pcode functions at "global scope", including *all* display functions are
not converted, they continue to use the legacy pcode interface.
Cc: Andi Shyti
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: Ashutosh Dixit
---
d
Media ratio mode (the ability for media IP to work at a different frequency
from the GT) is available for a subset of dGfx platforms supporting
GuC/SLPC. Introduce 'has_media_ratio_mode' flag in intel_device_info to
identify these platforms and set it for XEHPSDV and DG2/ATS-M.
Cc: Rodrigo Vivi
S
Create a gt/gtN/.defaults directory (similar to
engine//.defaults) to expose default parameter values for each
gt in sysfs. Populate the .defaults directory with RPS parameter default
values in order to allow userspace to revert to default values when needed.
This patch adds the following sysfs fi
Some recent Intel dGfx platforms allow media IP to work at a different
frequency from the base GT. This patch series exposes sysfs controls for
this functionality in the new per-gt sysfs. Some enhancements and fixes to
previous per-gt functionality are also included to complete the new
functionalit
On Thu, 2022-04-07 at 10:59 +0200, Christian König wrote:
> Rework the internals of the dma_resv object to allow adding more than
> one
> write fence and remember for each fence what purpose it had.
>
> This allows removing the workaround from amdgpu which used a container
> for
> this instead.
>
== Series Details ==
Series: drm/i915: Fix race in __i915_vma_remove_closed
URL : https://patchwork.freedesktop.org/series/102845/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/g
== Series Details ==
Series: GSC support (rev7)
URL : https://patchwork.freedesktop.org/series/102160/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11520_full -> Patchwork_102160v7_full
Summary
---
**FAILURE**
Se
On Mon, Apr 18, 2022 at 09:09:22AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/rpl-p: Add PCI IDs (rev2)
> URL : https://patchwork.freedesktop.org/series/102701/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11509_full -> Patchwork_102701v2_fu
== Series Details ==
Series: series starting with [1/2] drm/i915/dg2: Add workaround 18019627453
URL : https://patchwork.freedesktop.org/series/102826/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11520_full -> Patchwork_102826v1_full
=
The following changes since commit 681281e49fb6778831370e5d94e6e1d97f0752d6:
amdgpu: update PSP 13.0.8 firmware (2022-03-18 07:35:54 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware guc_v70.1.1
for you to fetch changes up to ab0d8c137d4235dbb09ac
i915_vma_reopen checked if the vma is closed before without taking the
lock. So multiple threads could attempt removing the vma.
Instead the lock needs to be taken before actually checking.
Cc: Chris Wilson
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Closes: https://g
On Tue, Apr 19, 2022 at 11:27:53AM -0700, José Roberto de Souza wrote:
> A new DG2 workaround added to fix some corner cases hangs.
>
> v2:
> - implementing the second and preferred option for this workaround
>
> BSpec: 54077
> BSpec: 68173
> BSpec: 71488
> Cc: Matt Roper
> Signed-off-by: José R
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Add workaround
22014263786 (rev2)
URL : https://patchwork.freedesktop.org/series/102835/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11520 -> Patchwork_102835v2
Imre, I have addressed the failure and re-reported.
-Original Message-
From: Deak, Imre
Sent: Tuesday, April 19, 2022 1:28 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
Subject: Re: ✗ Fi.CI.IGT: failure for series starting with [CI,v2,01/18]
drm/i915: Move per-platfor
== Series Details ==
Series: series starting with [CI,v2,01/18] drm/i915: Move per-platform power
well hooks to intel_display_power_well.c (rev2)
URL : https://patchwork.freedesktop.org/series/102719/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11504_full -> Patchwork_10271
On Tue, 2022-04-19 at 20:25 +, Patchwork wrote:
Patch Details
Series: series starting with [v2,1/2] drm/i915/display: Add workaround
22014263786 (rev2)
URL:https://patchwork.freedesktop.org/series/102835/
State: failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_1
== Series Details ==
Series: GSC support (rev7)
URL : https://patchwork.freedesktop.org/series/102160/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11520 -> Patchwork_102160v7
Summary
---
**WARNING**
Minor unknow
== Series Details ==
Series: GSC support (rev7)
URL : https://patchwork.freedesktop.org/series/102160/
State : warning
== Summary ==
Error: dim checkpatch failed
e80211ebb993 drm/i915/gsc: add gsc as a mei auxiliary device
Traceback (most recent call last):
File "scripts/spdxcheck.py", line
The Board of Directors election and the vote on the By-laws concluded at
23:59 UTC on 18 April 2022. There are 80 current Members of the X.Org
Foundation, and 52 Members cast votes. This is a 65.0% turn out.
In the election of the Directors to the Board of the X.Org Foundation,
the results were th
Hi Lakshmi,
On Fri, Apr 15, 2022 at 10:24:03AM +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [CI,v2,01/18] drm/i915: Move per-platform power
> well hooks to intel_display_power_well.c (rev2)
> URL : https://patchwork.freedesktop.org/series/102719/
> State : fa
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Add workaround
22014263786 (rev2)
URL : https://patchwork.freedesktop.org/series/102835/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11520 -> Patchwork_102835v2
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Add workaround
22014263786 (rev2)
URL : https://patchwork.freedesktop.org/series/102835/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked sepa
From: Tomas Winkler
Implement runtime handlers for mei-gsc, to track
idle state of the device properly.
CC: Rodrigo Vivi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
Reviewed-by: Rodrigo Vivi
---
drivers/misc/mei/gsc-me.c | 67 ++-
1 file
After the new config option is merged we'll enable it by default in the
CI config, but for now just force it on via the i915 Kconfig so we can
get pre-merge CI results for it.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Kconfig.debug | 1 +
1 file changed, 1 insertion(+)
diff
From: Tomas Winkler
DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).
v2 (Daniele): Rebased to before the ATS patches
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Reviewed-by: Daniele Ceraolo Spurio #v1
Signed-off-by: Daniele Ceraolo Spurio
Reviewed-by
From: Alexander Usyskin
Add a hook to retrieve the firmware version of the
GSC devices to bus-fixup.
GSC has a different MKHI clients GUIDs but the same message structure
to retrieve the firmware version as MEI so mei_fwver() can be reused.
CC: Ashutosh Dixit
Signed-off-by: Alexander Usyskin
S
From: Tomas Winkler
GSC is a graphics system controller, based on CSE, it provides
a chassis controller for graphics discrete cards, as well as it
supports media protection on selected devices.
mei_gsc binds to a auxiliary devices exposed by Intel discrete
driver i915.
v2: fix error check in me
From: Alexander Usyskin
Setup char device in spite of firmware handshake failure.
In order to provide host access to the firmware status registers and other
information required for the manufacturing process.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Reviewed-by: Daniele Ce
Same as the previous rev, with the only thing changed being the
MODULE_LICENSE for mei-gsc, from "GPL v2" to "GPL"; these both map to
GPL v2, but the second option is preferred (see [1]) and checkpatch will
complain if we use the first one.
I've discussed the changes with Rodrigo before applying th
From: Tomas Winkler
GSC is a graphics system controller, it provides
a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000.
GSC is a GT Engine (class 4: instance 6). HECI1 inte
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Add workaround
22014263786
URL : https://patchwork.freedesktop.org/series/102835/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11520 -> Patchwork_102835v1
===
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Add workaround
22014263786
URL : https://patchwork.freedesktop.org/series/102835/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [1/2] drm/i915/dg2: Add workaround 18019627453
URL : https://patchwork.freedesktop.org/series/102826/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11520 -> Patchwork_102826v1
===
== Series Details ==
Series: series starting with [1/2] drm/i915/dg2: Add workaround 18019627453
URL : https://patchwork.freedesktop.org/series/102826/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
A new DG2 workaround added to fix some corner cases hangs.
v2:
- implementing the second and preferred option for this workaround
BSpec: 54077
BSpec: 68173
BSpec: 71488
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 4
1 file changed,
This workaround fixes screen flickers with FBC.
BSpec: 33450
BSpec: 52890
BSpec: 54369
BSpec: 66624
Reviewed-by: Matt Roper
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 9 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files ch
On 4/18/2022 17:07, Daniele Ceraolo Spurio wrote:
From: Tomas Winkler
DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).
v2 (Daniele): Rebased to before the ATS patches
Have checked that the rebase looks good. I don't really know much about
the GSC code but I can verify t
On Tue, Apr 19, 2022 at 07:44:54AM -0700, José Roberto de Souza wrote:
> This workaround fixes screen flickers with FBC.
>
> BSpec: 33450
> BSpec: 52890
> BSpec: 54369
> BSpec: 66624
> Cc: Matt Roper
> Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/
On Tue, Apr 19, 2022 at 07:44:53AM -0700, José Roberto de Souza wrote:
> A new DG2 workaround added to some corner cases hangs.
>
> BSpec: 54077
> BSpec: 68173
> BSpec: 71488
> Cc: Matt Roper
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
> dri
On Tue, Apr 19, 2022 at 09:01:34AM +0200, Takashi Iwai wrote:
On Sat, 16 Apr 2022 08:44:18 +0200,
Lucas De Marchi wrote:
pci_get_class() will already unref the pci device passed as argument.
So if it's unconditionally unref'ed, even if the loop is not stopped,
there will be one too many unref f
This workaround fixes screen flickers with FBC.
BSpec: 33450
BSpec: 52890
BSpec: 54369
BSpec: 66624
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 9 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 10 insertions(+)
A new DG2 workaround added to some corner cases hangs.
BSpec: 54077
BSpec: 68173
BSpec: 71488
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
2 files changed, 4 insertions(+)
diff --
== Series Details ==
Series: drm/i915: Check EDID for HDR static metadata when choosing blc
URL : https://patchwork.freedesktop.org/series/102645/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11497_full -> Patchwork_102645v1_full
==
On 18/04/22 16:33, Balasubramani Vivekanandan wrote:
> On 16.03.2022 18:26, Mullati Siva wrote:
>> From: Siva Mullati
>>
>> Convert slpc shared data to use iosys_map rather than
>> plain pointer and save it in the intel_guc_slpc struct.
>> This will help with in read and update slpc shared data
On Sat, 16 Apr 2022 08:44:18 +0200,
Lucas De Marchi wrote:
>
> pci_get_class() will already unref the pci device passed as argument.
> So if it's unconditionally unref'ed, even if the loop is not stopped,
> there will be one too many unref for each device not matched.
>
> Cc: Kai Vehmanen
> Cc:
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