Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Convert ct buffer to iosys_map

On Tue, Mar 08, 2022 at 05:38:45PM -0800, Lucas De Marchi wrote: and in some other places too. I will try to finish the review later. getting back to the rest now. tail = (tail + 1) % size; } GEM_BUG_ON(tail > size); @@ -442,13 +471,14 @@ static int ct_write

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Convert ct buffer to iosys_map

On Mon, Mar 14, 2022 at 11:23:07AM +0530, Siva Mullati wrote: On 09/03/22 07:08, Lucas De Marchi wrote: On Tue, Mar 08, 2022 at 03:08:05PM +0530, Mullati Siva wrote: From: Siva Mullati Convert CT commands and descriptors to use iosys_map rather than plain pointer and save it in the intel_guc

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Fix renamed struct field

== Series Details == Series: series starting with [1/2] drm/i915: Fix renamed struct field URL : https://patchwork.freedesktop.org/series/101448/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11372_full -> Patchwork_22590_full ==

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3)

== Series Details == Series: drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3) URL : https://patchwork.freedesktop.org/series/101219/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11372_full -> Patchwork_22589_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Add smem fallback allocation for dpt

== Series Details == Series: drm/i915/display: Add smem fallback allocation for dpt URL : https://patchwork.freedesktop.org/series/101443/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11372_full -> Patchwork_22588_full Sum

Re: [Intel-gfx] [PATCH v11 2/5] mei: add support for graphics system controller (gsc) devices

On 3/15/2022 6:11 AM, Alexander Usyskin wrote: From: Tomas Winkler GSC is a graphics system controller, based on CSE, it provides a chassis controller for graphics discrete cards, as well as it supports media protection on selected devices. mei_gsc binds to a auxiliary devices exposed by In

Re: [Intel-gfx] [PATCH v11 1/5] drm/i915/gsc: add gsc as a mei auxiliary device

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ddbc7a685a50..63c56d668963 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -976,6 +976,8 @@ #define GEN12_COMPUTE2_RING_BASE 0x1e000 #define GEN12_COMPUTE3_RING_BA

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Fix renamed struct field

== Series Details == Series: series starting with [1/2] drm/i915: Fix renamed struct field URL : https://patchwork.freedesktop.org/series/101448/ State : success == Summary == CI Bug Log - changes from CI_DRM_11372 -> Patchwork_22590 Summar

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add logical mapping for video decode engines

On Wed, Mar 16, 2022 at 04:45:38PM -0700, Lucas De Marchi wrote: > From: Matthew Brost > > Add logical mapping for VDBOXs. This mapping is required for > split-frame workloads, which otherwise fail with > > -F8C53528: [GUC] 0441-INVALID_ENGINE_SUBMIT_MASK > > ... if the applicatio

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3)

== Series Details == Series: drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3) URL : https://patchwork.freedesktop.org/series/101219/ State : success == Summary == CI Bug Log - changes from CI_DRM_11372 -> Patchwork_22589 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Fix renamed struct field

== Series Details == Series: series starting with [1/2] drm/i915: Fix renamed struct field URL : https://patchwork.freedesktop.org/series/101448/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Fix renamed struct field

== Series Details == Series: series starting with [1/2] drm/i915: Fix renamed struct field URL : https://patchwork.freedesktop.org/series/101448/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4e997aa6f37e drm/i915: Fix renamed struct field -:27: CHECK:MACRO_ARG_REUSE: Macro arg

[Intel-gfx] [PATCH 1/2] drm/i915: Fix renamed struct field

Earlier versions of commit a5b7ef27da60 ("drm/i915: Add struct to hold IP version") named "ver" as "arch" and then when it was renamed it missed the rename on MEDIA_VER_FULL() since it it's currently not used. Fixes: a5b7ef27da60 ("drm/i915: Add struct to hold IP version") Cc: José Roberto de Souz

[Intel-gfx] [PATCH 2/2] drm/i915: Add logical mapping for video decode engines

From: Matthew Brost Add logical mapping for VDBOXs. This mapping is required for split-frame workloads, which otherwise fail with -F8C53528: [GUC] 0441-INVALID_ENGINE_SUBMIT_MASK ... if the application is using the logical id to reorder the engines and then using it for the batc

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add smem fallback allocation for dpt

== Series Details == Series: drm/i915/display: Add smem fallback allocation for dpt URL : https://patchwork.freedesktop.org/series/101443/ State : success == Summary == CI Bug Log - changes from CI_DRM_11372 -> Patchwork_22588 Summary -

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3)

== Series Details == Series: drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3) URL : https://patchwork.freedesktop.org/series/101219/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3)

== Series Details == Series: drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev3) URL : https://patchwork.freedesktop.org/series/101219/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6da9e3d1f502 drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES -:131: CHECK:SPACING:

[Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES

Newer platforms have DSS that aren't necessarily available for both geometry and compute, two queries will need to exist. This introduces the first, when passing a valid engine class and engine instance in the flags returns a topology describing geometry. v2: fix white space errors v3: change flag

[Intel-gfx] [PATCH] drm/i915/display: Add smem fallback allocation for dpt

Add fallback smem allocation for dpt if stolen memory allocation failed. Signed-off-by: Juha-Pekka Heikkila --- drivers/gpu/drm/i915/display/intel_dpt.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] (rev2)

== Series Details == Series: drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] (rev2) URL : https://patchwork.freedesktop.org/series/101426/ State : success == Summary == CI Bug Log - changes from CI_DRM_11370_full -> Patchwork_22587_full ===

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: preempt and reset based on reset domain

Hi Tejas, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-tip/drm-tip] [cannot apply to drm-intel/for-linux-next v5.17-rc8 next-20220316] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use

[Intel-gfx] 2022 X.Org Foundation Membership deadline for voting in the election

The 2022 X.Org Foundation elections are rapidly approaching. We will be forwarding the election schedule and nominating process to the membership shortly. Please note that only current members can vote in the upcoming election, and that the deadline for new memberships or renewals to vote in the u

[Intel-gfx] 2022 X.Org Board of Directors Elections Nomination period is NOW

The Board consists of directors elected from the membership. Each year, an election is held to bring the total number of directors to eight. The four members receiving the highest vote totals will serve as directors for two year terms. The directors who received two year terms starting in 2021 we

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] (rev2)

== Series Details == Series: drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] (rev2) URL : https://patchwork.freedesktop.org/series/101426/ State : success == Summary == CI Bug Log - changes from CI_DRM_11370 -> Patchwork_22587 =

Re: [Intel-gfx] [PATCH] drm/i915: avoid concurrent writes to aux_inv

>> diff --git a/drivers/gpu/drm/i915/gt/gen2_engine_cs.c >> b/drivers/gpu/drm/i915/gt/gen2_engine_cs.c >> index 1c82caf525c3..0ec4986e4805 100644 >> --- a/drivers/gpu/drm/i915/gt/gen2_engine_cs.c >> +++ b/drivers/gpu/drm/i915/gt/gen2_engine_cs.c >> @@ -37,6 +37,9 @@ int gen2_emit_flush(struct i915

Re: [Intel-gfx] [PATCH v2 6/8] drm/i915: Fix PSF GV point mask when SAGV is not possible

On Wed, Mar 09, 2022 at 09:34:58PM +0200, Lisovskiy, Stanislav wrote: > On Wed, Mar 09, 2022 at 09:08:12PM +0200, Ville Syrjälä wrote: > > On Wed, Mar 09, 2022 at 08:59:59PM +0200, Lisovskiy, Stanislav wrote: > > > On Wed, Mar 09, 2022 at 06:49:46PM +0200, Ville Syrjala wrote: > > > > From: Ville S

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] (rev2)

== Series Details == Series: drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] (rev2) URL : https://patchwork.freedesktop.org/series/101426/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be

Re: [Intel-gfx] [PATCH v2 4/8] drm/i915: Reject excessive SAGV block time

On Wed, Mar 09, 2022 at 06:49:44PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > If the mailbox returns an exceesively large SAGV block time let's just > reject it. This avoids having to worry about overflows when we add the > SAGV block time to the wm0 latency. > > We shall put the limi

Re: [Intel-gfx] [PATCH v2 8/8] drm/i915: Rename QGV request/response bits

On Wed, Mar 09, 2022 at 06:49:48PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Name all the ICL_PCODE_SAGV_DE_MEM_SS_CONFIG request/response > bits in a manner that we can actually understand what they're > doing. > > Signed-off-by: Ville Syrjälä Reviewed-by: Stanislav Lisovskiy >

Re: [Intel-gfx] [PATCH v2 3/8] drm/i915: Probe whether SAGV works on pre-icl

On Wed, Mar 09, 2022 at 06:49:43PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Instead of leaving the SAGV enable/disable to the first commit > let's try to disable it first thing to see if we can do it or > not (disabling SAGV is a safe thing to at any time). This avoids > running the

Re: [Intel-gfx] [PATCH v2 5/8] drm/i915: Rename pre-icl SAGV enable/disable functions

On Wed, Mar 09, 2022 at 06:49:45PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Give the pre-icl SAGV control functions a skl_ prefix instead > of the intel_ prefix to make it a bit more clear that they > are not some kind of universal things that can be called on > any platform. Also ma

Re: [Intel-gfx] [PATCH v2 7/8] drm/i915: Unconfuses QGV vs. PSF point masks

On Wed, Mar 09, 2022 at 06:49:47PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Use separate bitmasks for QGV vs. PSF GV points during > the computation. Makes the whole thing a lot less confusing. > > Signed-off-by: Ville Syrjälä Reviewed-by: Stanislav Lisovskiy > --- > drivers/gp

Re: [Intel-gfx] [PATCH v2 2/8] drm/i915: Rework SAGV block time probing

On Wed, Mar 09, 2022 at 06:49:42PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > I'd like to see the SAGV block time we got from the mailbox > in the logs regardless of whether other factors prevent the > use of SAGV. > > So let's adjust the code to always query the SAGV block time, > lo

Re: [Intel-gfx] [PATCH v2 1/8] drm/i915: Treat SAGV block time 0 as SAGV disabled

On Wed, Mar 09, 2022 at 06:49:41PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > For modern platforms the spec explicitly states that a > SAGV block time of zero means that SAGV is not supported. > Let's extend that to all platforms. Supposedly there should > be no systems where this isn'

Re: [Intel-gfx] [PATCH] drm/i915/display/: Refactor hsw_crtc_enable for bigjoiner cleanup

On Wed, Mar 16, 2022 at 09:48:17AM +0200, Jani Nikula wrote: > On Tue, 15 Mar 2022, Manasi Navare wrote: > > This patch abstracts pieces of hsw_crtc_enable corresponding to different > > Bspec enable sequence steps into separate functions. > > This helps to call them in a specific order for bigjoi

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/7] drm/i915/lmem: don't treat small BAR as an error

I have re-opened this issue and re-reported. https://gitlab.freedesktop.org/drm/intel/-/issues/2995 Lakshmi. -Original Message- From: Auld, Matthew Sent: Wednesday, March 16, 2022 2:15 AM To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana Subject: Re: ✗ Fi.CI.IGT: failure for

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/7] drm/i915/lmem: don't treat small BAR as an error

== Series Details == Series: series starting with [CI,1/7] drm/i915/lmem: don't treat small BAR as an error URL : https://patchwork.freedesktop.org/series/101398/ State : success == Summary == CI Bug Log - changes from CI_DRM_11365_full -> Patchwork_22576_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Refactor slpc shared data access to use iosys_map

== Series Details == Series: drm/i915/guc: Refactor slpc shared data access to use iosys_map URL : https://patchwork.freedesktop.org/series/101430/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11368_full -> Patchwork_22585_full

Re: [Intel-gfx] [RFC PATCH 5/7] drm/ttm: add range busy check for range manager

On 16/03/2022 14:39, Christian König wrote: Am 16.03.22 um 15:26 schrieb Robert Beckett: [SNIP] this is where I replace an existing range check via drm_mm with the range check I added in this patch. Mhm, I still don't get the use case from the code, but I don't think it matters any more.

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/gt: preempt engine to idle before reset

== Series Details == Series: series starting with [1/2] drm/i915/gt: preempt engine to idle before reset URL : https://patchwork.freedesktop.org/series/101432/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11368 -> Patchwork_22586 =

Re: [Intel-gfx] [PATCH] drm/i915: Reject unsupported TMDS rates on ICL+

> -Original Message- > From: Intel-gfx On Behalf Of Ville > Syrjala > Sent: Friday, March 11, 2022 11:29 PM > To: intel-gfx@lists.freedesktop.org > Cc: sta...@vger.kernel.org > Subject: [Intel-gfx] [PATCH] drm/i915: Reject unsupported TMDS rates on ICL+ > > From: Ville Syrjälä > > ICL+

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gt: preempt engine to idle before reset

== Series Details == Series: series starting with [1/2] drm/i915/gt: preempt engine to idle before reset URL : https://patchwork.freedesktop.org/series/101432/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked

Re: [Intel-gfx] [RFC PATCH 5/7] drm/ttm: add range busy check for range manager

On 16/03/2022 13:43, Christian König wrote: Am 16.03.22 um 14:19 schrieb Robert Beckett: On 16/03/2022 09:54, Christian König wrote: Am 15.03.22 um 19:04 schrieb Robert Beckett: RFC: do we want this to become a generic interface in ttm_resource_manager_func? RFC: would we prefer a differ

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Refactor slpc shared data access to use iosys_map

== Series Details == Series: drm/i915/guc: Refactor slpc shared data access to use iosys_map URL : https://patchwork.freedesktop.org/series/101430/ State : success == Summary == CI Bug Log - changes from CI_DRM_11368 -> Patchwork_22585 Summ

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: Refactor slpc shared data access to use iosys_map

== Series Details == Series: drm/i915/guc: Refactor slpc shared data access to use iosys_map URL : https://patchwork.freedesktop.org/series/101430/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v6 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v9)

On 16/03/2022 07:37, Kasireddy, Vivek wrote: Hi Tvrtko, On 15/03/2022 07:28, Kasireddy, Vivek wrote: Hi Tvrtko, Daniel, On 11/03/2022 09:39, Daniel Vetter wrote: On Mon, 7 Mar 2022 at 21:38, Vivek Kasireddy wrote: On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or

[Intel-gfx] [PATCH 2/2] drm/i915/gt: preempt and reset based on reset domain

When we have shared reset domains, as we the engine may be indirectly coupled to the stalled engine, and we need to idle the current context to prevent collateral damage. Suggested-by: Chris Wilson Signed-off-by: Tejas Upadhyay --- drivers/gpu/drm/i915/gt/intel_engine.h | 3 ++- d

[Intel-gfx] [PATCH 1/2] drm/i915/gt: preempt engine to idle before reset

From: Chris Wilson We need to be able to suspend execution along an engine and flush any active contexts away from the HW, back into the execution queue. This is done using a preempt-to-idle, disabling the submission backed while sending a preemption request to ELSP. Unpon completion of the conte

Re: [Intel-gfx] [RFC PATCH 5/7] drm/ttm: add range busy check for range manager

On 16/03/2022 09:54, Christian König wrote: Am 15.03.22 um 19:04 schrieb Robert Beckett: RFC: do we want this to become a generic interface in ttm_resource_manager_func? RFC: would we prefer a different interface? e.g. for_each_resource_in_range or for_each_bo_in_range Well completely NAK

Re: [Intel-gfx] [PATCH 07/22] drm/gma500: Use drm_mode_copy()

On Fri, Feb 18, 2022 at 11:04 AM Ville Syrjala wrote: > > From: Ville Syrjälä > > struct drm_display_mode embeds a list head, so overwriting > the full struct with another one will corrupt the list > (if the destination mode is on a list). Use drm_mode_copy() > instead which explicitly preserves

[Intel-gfx] [PATCH 1/1] drm/i915/guc: Convert slpc to iosys_map

From: Siva Mullati Convert slpc shared data to use iosys_map rather than plain pointer and save it in the intel_guc_slpc struct. This will help with in read and update slpc shared data after the slpc init by abstracting the IO vs system memory. Signed-off-by: Siva Mullati --- drivers/gpu/drm/i

[Intel-gfx] [PATCH 0/1] drm/i915/guc: Refactor slpc shared data access to use iosys_map

From: Siva Mullati This is continuation to the original patch series to use iosys map APIs to use slpc shared data commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (1): drm/i915/guc: Convert slpc to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c

Re: [Intel-gfx] [PATCH v2] drm: Fix a infinite loop condition when order becomes 0

On 16/03/2022 06:34, Arunpravin Paneer Selvam wrote: handle a situation in the condition order-- == min_order, when order = 0 and min_order = 0, leading to order = -1, it now won't exit the loop. To avoid this problem, added a order check in the same condition, (i.e) when order is 0, we return -E

Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES

Quoting Tvrtko Ursulin (2022-03-14 17:35:17) > > On 12/03/2022 04:16, Matt Atwood wrote: > > On Thu, Mar 10, 2022 at 12:26:12PM +, Tvrtko Ursulin wrote: > >> > >> On 10/03/2022 05:18, Matt Atwood wrote: > >>> Newer platforms have DSS that aren't necessarily available for both > >>> geometry an

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Fix a infinite loop condition when order becomes 0 (rev2)

== Series Details == Series: drm: Fix a infinite loop condition when order becomes 0 (rev2) URL : https://patchwork.freedesktop.org/series/101360/ State : success == Summary == CI Bug Log - changes from CI_DRM_11367_full -> Patchwork_22582_full =

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch]

== Series Details == Series: drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] URL : https://patchwork.freedesktop.org/series/101426/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11368 -> Patchwork_22584

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch]

== Series Details == Series: drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] URL : https://patchwork.freedesktop.org/series/101426/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] ✗ Fi.CI.BAT: failure for i915 writeback private framework

== Series Details == Series: i915 writeback private framework URL : https://patchwork.freedesktop.org/series/101425/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11368 -> Patchwork_22583 Summary --- **FAILURE** S

Re: [Intel-gfx] [PATCH] drm/i915: avoid concurrent writes to aux_inv

On 04/03/2022 22:14, fei.y...@intel.com wrote: From: Fei Yang GPU hangs have been observed when multiple engines write to the same aux_inv register at the same time. To avoid this each engine should only invalidate its own auxiliary table. The function gen12_emit_flush_xcs() currently invalid

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915 writeback private framework

== Series Details == Series: i915 writeback private framework URL : https://patchwork.freedesktop.org/series/101425/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 writeback private framework

== Series Details == Series: i915 writeback private framework URL : https://patchwork.freedesktop.org/series/101425/ State : warning == Summary == $ dim checkpatch origin/drm-tip 91a1acb1ae9e drm/i915: Creating writeback pipeline to bypass drm_writeback framework -:25: WARNING:FILE_PATH_CHANG

[Intel-gfx] [PATCH v2] drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch]

Move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch] as a i915_gem_object function related to tiling. Also un-inline while at it; does not seem like this is a function needed in hot paths. v2: i915_gem_tiling.[ch] instead of intel_ggtt_fencing.[ch] (Chris) Cc: Tvrtko Ursulin Signed

[Intel-gfx] [RFC PATCH 3/3] drm/i915: Enabling WD Transcoder

Adding support for writeback transcoder to start capturing frames using interrupt mechanism Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_acpi.c | 1 + drivers/gpu/drm/i915/display/intel_display.c | 85 +- drive

[Intel-gfx] [RFC PATCH 2/3] drm/i915: Define WD trancoder for i915

Adding WD Types, WD transcoder to enum list and WD Transcoder offsets Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.h | 6 ++ drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/i915_reg.h| 2 ++ 3 files chang

[Intel-gfx] [RFC PATCH 1/3] drm/i915: Creating writeback pipeline to bypass drm_writeback framework

Changes to create a i915 private pipeline to enable the WD transcoder without relying on the current drm_writeback framework. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/Makefile | 1 + .../gpu/drm/i915/display/intel_wb_connector.c | 296 ++ .../gpu/dr

[Intel-gfx] [RFC PATCH 0/3] i915 writeback private framework

A patch series was floated in the drm mailing list which aimed to change the drm_connector and drm_encoder fields to pointer in the drm_connector_writeback structure, this received a huge pushback from the community but since i915 expects each connector present in the drm_device list to be a intel_

Re: [Intel-gfx] [PATCH v3 4/6] drm/i915/opregion: Cond dgfx opregion func registration

On Sun, 20 Feb 2022, Anshuman Gupta wrote: > DGFX ASLS and OPROM OpRegion are only supported on the GFX Cards, > which supports Display Engine. Register opregion function accordingly > using the HAS_DISPLAY(). And early return intel_opregion_setup() > if no opregion func to avoid NULL pointer oops

Re: [Intel-gfx] [PATCH v3 2/6] drm/i915/opregion: Abstract opregion function

On Sun, 20 Feb 2022, Anshuman Gupta wrote: > Abstract opregion operations like get opregion base, get rvda and > opregion cleanup in form of i915_opregion_ops. > This will be required to converge igfx and dgfx opregion. > > v2: > - Keep only function pointer abstraction stuff. [Jani] > - Add alloc

Re: [Intel-gfx] [PATCH v3 2/6] drm/i915/opregion: Abstract opregion function

On Sun, 20 Feb 2022, Anshuman Gupta wrote: > Abstract opregion operations like get opregion base, get rvda and > opregion cleanup in form of i915_opregion_ops. > This will be required to converge igfx and dgfx opregion. > > v2: > - Keep only function pointer abstraction stuff. [Jani] > - Add alloc

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/7] drm/i915/lmem: don't treat small BAR as an error

On 16/03/2022 00:38, Patchwork wrote: *Patch Details* *Series:* series starting with [CI,1/7] drm/i915/lmem: don't treat small BAR as an error *URL:* https://patchwork.freedesktop.org/series/101398/ *State:*failure *Details:* https://

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Fix a infinite loop condition when order becomes 0 (rev2)

== Series Details == Series: drm: Fix a infinite loop condition when order becomes 0 (rev2) URL : https://patchwork.freedesktop.org/series/101360/ State : success == Summary == CI Bug Log - changes from CI_DRM_11367 -> Patchwork_22582 Summa

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/gem: Remove logic for wbinvd_on_all_cpus

Hi, Michael, others. This is the response from Linus last time we copied that already pre-existing wbinvd_on_all_cpus() macro to another place in the driver: https://lists.freedesktop.org/archives/dri-devel/2021-November/330928.html My first interpretation of this is that even if there curren

Re: [Intel-gfx] [RFC PATCH 2/2] drm/i915/display: Add sleep for power state connector

On Tue, 15 Mar 2022, Vinod Govindapillai wrote: > From: Mohammed Khajapasha > > Add 2sec sleep for power state connector when a monitor > is in power sleep state before atomic commit enable. We're absolutely not adding a sleep like this. > Monitors like LG 27UL650-W, 27UK850 goes into power > s

Re: [Intel-gfx] [RFC PATCH 1/2] drm/i915/display: Add disable wait time for power state connector

On Tue, 15 Mar 2022, Vinod Govindapillai wrote: > From: Mohammed Khajapasha > > Add connector disable wait time for a power state connector > for monitor power sleep state. > > Monitors like LG 27UL650-W, 27UK850 goes into power sleep state > and generates long duration hotplug events even the mo

Re: [Intel-gfx] [RFC PATCH 0/2] suppress the wrong long hotplug events

On Tue, 15 Mar 2022, Vinod Govindapillai wrote: > Monitors like LG 27UL650-W, 27UK850 goes into power sleep state > and generates long duration hotplug events even when the monitor > is connected for display. Here is a proposal to detect and > suppress such hotplug events by "sleep" for 2 secs for

Re: [Intel-gfx] [PATCH 19/22] drm/i915: Use drm_mode_copy()

On Fri, 18 Feb 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > struct drm_display_mode embeds a list head, so overwriting > the full struct with another one will corrupt the list > (if the destination mode is on a list). Use drm_mode_copy() > instead which explicitly preserves the list head

Re: [Intel-gfx] [PATCH 18/22] drm/i915: Use drm_mode_init() for on-stack modes

On Fri, 18 Feb 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Initialize on-stack modes with drm_mode_init() to guarantee > no stack garbage in the list head, or that we aren't copying > over another mode's list head. > > Based on the following cocci script, with manual fixups: > @decl@ > i

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Add CDCLK checks to atomic check phase (rev3)

On Tue, 15 Mar 2022, "Srivatsa, Anusha" wrote: > Checked the logs, a lot of machines not showing tests results even though > igt_run.txt shows as PASS for most. The boot log shows ACL errors in > /var/log/journal/ , sending the series again. If you don't need a rebase or change anything, you kn

Re: [Intel-gfx] [PATCH] drm/i915/display/: Refactor hsw_crtc_enable for bigjoiner cleanup

On Tue, 15 Mar 2022, Manasi Navare wrote: > This patch abstracts pieces of hsw_crtc_enable corresponding to different > Bspec enable sequence steps into separate functions. > This helps to call them in a specific order for bigjoiner master/slave > in a cleaner fashion. So does this contain only r

Re: [Intel-gfx] [PATCH v6 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v9)

Hi Tvrtko, > > On 15/03/2022 07:28, Kasireddy, Vivek wrote: > > Hi Tvrtko, Daniel, > > > >> > >> On 11/03/2022 09:39, Daniel Vetter wrote: > >>> On Mon, 7 Mar 2022 at 21:38, Vivek Kasireddy > >>> wrote: > > On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or > m

[Intel-gfx] Small bar recovery vs compressed content on DG2

Hi! Do we somehow need to clarify in the headers the semantics for this? From my understanding when discussing the CCS migration series with Ram, the kernel will never do any resolving (compressing / decompressing) migrations or evictions which basically implies the following: *) Compressed

Re: [Intel-gfx] [PATCH] drm/i915: avoid concurrent writes to aux_inv

>>> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c >>> b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c >>> index e1470bb60f34..7e8552414275 100644 >>> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c >>> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c