== Series Details ==
Series: drm/i915/fbc: More FBC refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/97239/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10929 -> Patchwork_21684
Summary
---
**SUCCES
== Series Details ==
Series: drm/i915/fbc: More FBC refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/97239/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/fbc: More FBC refactoring (rev2)
URL : https://patchwork.freedesktop.org/series/97239/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b0fe40e87a84 drm/i915/fbc: Eliminate racy intel_fbc_is_active() usage
bed0959cfa5b drm/i915/fbc: Pass whole
== Series Details ==
Series: Enable pipe color support on D13 platform (rev2)
URL : https://patchwork.freedesktop.org/series/97219/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10928_full -> Patchwork_21683_full
Summary
--
== Series Details ==
Series: drm/i915: Fix DPT suspend/resume on !HAS_DISPLAY platforms
URL : https://patchwork.freedesktop.org/series/97291/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10928_full -> Patchwork_21682_full
== Series Details ==
Series: Enable pipe color support on D13 platform (rev2)
URL : https://patchwork.freedesktop.org/series/97219/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10928 -> Patchwork_21683
Summary
---
*
> -Original Message-
> From: Harry Wentland
> Sent: Tuesday, November 23, 2021 8:35 PM
> To: Shankar, Uma ; intel-gfx@lists.freedesktop.org;
> dri-
> de...@lists.freedesktop.org
> Cc: ville.syrj...@linux.intel.com; ppaala...@gmail.com; brian.star...@arm.com;
> sebast...@sebastianwick.ne
XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for
extended range. It has 511 entries for gamma with additional 2 entries
for extended range.
v2: Updated lut size for 10bit gamma, added lut_tests (Ville)
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_pci.c | 6 +
Enable Pipe Degamma for XE_LPD. Extend the legacy implementation
to incorparate the extended lut size for XE_LPD.
v2: Added a helper for degamma lut size (Ville)
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_color.c | 14 +++---
1 file changed, 11 insertions(+), 3 de
Enable pipe color support for Display 13 platforms. Currently
limit to just 10bit gamma and later extend it for logarithmic
gamma, once the new UAPI is agreed by community and implemented
by a userspace consumer.
v2: Updated dev_priv to i915 (Ville)
Signed-off-by: Uma Shankar
Reviewed-by: Ville
Enable pipe color support for Display 13 platform. This series
enables just the 10bit gamma mode. More advanced logarithmic
gamma mode will be enable with the new enhanced UAPI. It will
be extended once the UAPI is agreed in community. This series
just adds the basic support in the interim.
v2: Ad
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, November 24, 2021 8:28 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org; =ville.syrj...@linux.intel.com
> Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915/xelpd: Add Pipe Color Lut caps
> to
> platform config
>
> O
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, November 24, 2021 8:23 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org; =ville.syrj...@linux.intel.com
> Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/xelpd: Enable Pipe Degamma
>
> On Wed, Nov 24, 2021 at 01:06
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, November 24, 2021 8:29 PM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org; =ville.syrj...@linux.intel.com
> Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915/xelpd: Enable Pipe color
> support for
> D13 platform
>
> O
== Series Details ==
Series: drm/i915: Fix DPT suspend/resume on !HAS_DISPLAY platforms
URL : https://patchwork.freedesktop.org/series/97291/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10928 -> Patchwork_21682
Summary
--
The drm.mode_config state is not initialized in case of !HAS_DISPLAY
so taking the fb_lock and iterating the fb list won't work on those
platforms. Skip the suspend/resume with an explicit check for this.
Fixes: 9755f055f512 ("drm/i915: Restore memory mapping for DPT FBs across
system suspend/res
== Series Details ==
Series: drm/i915/dg2: Tile 4 plane format support (rev6)
URL : https://patchwork.freedesktop.org/series/95715/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10927_full -> Patchwork_21681_full
Summary
--
On Thu, 25 Nov 2021, Tvrtko Ursulin wrote:
> On 25/11/2021 12:13, Ville Syrjälä wrote:
>> On Thu, Nov 25, 2021 at 12:57:27PM +0200, Jani Nikula wrote:
>>> On Thu, 25 Nov 2021, Ville Syrjälä wrote:
On Wed, Nov 24, 2021 at 05:43:52PM +0200, Jani Nikula wrote:
> On Wed, 24 Nov 2021, Ville S
== Series Details ==
Series: drm/i915: Use per device iommu check (rev3)
URL : https://patchwork.freedesktop.org/series/96715/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10926_full -> Patchwork_21680_full
Summary
---
On 25/11/2021 12:13, Ville Syrjälä wrote:
On Thu, Nov 25, 2021 at 12:57:27PM +0200, Jani Nikula wrote:
On Thu, 25 Nov 2021, Ville Syrjälä wrote:
On Wed, Nov 24, 2021 at 05:43:52PM +0200, Jani Nikula wrote:
On Wed, 24 Nov 2021, Ville Syrjala wrote:
From: Ville Syrjälä
In order to encapsu
== Series Details ==
Series: drm/i915/dg2: Tile 4 plane format support (rev6)
URL : https://patchwork.freedesktop.org/series/95715/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10927 -> Patchwork_21681
Summary
---
*
== Series Details ==
Series: drm/i915/dg2: Tile 4 plane format support (rev6)
URL : https://patchwork.freedesktop.org/series/95715/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dg2: Tile 4 plane format support (rev6)
URL : https://patchwork.freedesktop.org/series/95715/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ad3b55a8a4df drm/i915/dg2: Tile 4 plane format support
-:13: WARNING:TYPO_SPELLING: 'assocating' may
== Series Details ==
Series: drm/i915: Use per device iommu check (rev3)
URL : https://patchwork.freedesktop.org/series/96715/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10926 -> Patchwork_21680
Summary
---
**SUCC
On Thu, Nov 25, 2021 at 12:57:27PM +0200, Jani Nikula wrote:
> On Thu, 25 Nov 2021, Ville Syrjälä wrote:
> > On Wed, Nov 24, 2021 at 05:43:52PM +0200, Jani Nikula wrote:
> >> On Wed, 24 Nov 2021, Ville Syrjala wrote:
> >> > From: Ville Syrjälä
> >> >
> >> > In order to encapsulate FBC harder let
== Series Details ==
Series: drm/i915: Use per device iommu check (rev3)
URL : https://patchwork.freedesktop.org/series/96715/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Tile4 in bspec format is 4K tile organized into
64B subtiles with same basic shape as for legacy TileY
which will be supported by Display13.
v2: - Moved Tile4 assocating struct for modifier/display to
the beginning(Imre Deak)
- Removed unneeded case I915_FORMAT_MOD_4_TILED modifier
On Thu, 25 Nov 2021, Ville Syrjälä wrote:
> On Thu, Nov 25, 2021 at 12:23:22PM +0200, Ville Syrjälä wrote:
>> On Mon, Nov 22, 2021 at 03:51:03PM +0200, Jani Nikula wrote:
>> > There are only three call sites remaining for
>> > intel_wait_for_vblank(). Remove the function, and open code it to avoid
On Thu, 25 Nov 2021, Ville Syrjälä wrote:
> On Wed, Nov 24, 2021 at 05:43:52PM +0200, Jani Nikula wrote:
>> On Wed, 24 Nov 2021, Ville Syrjala wrote:
>> > From: Ville Syrjälä
>> >
>> > In order to encapsulate FBC harder let's just move the debugfs
>> > stuff into intel_fbc.c.
>>
>> Mmmh, I've k
From: Tvrtko Ursulin
With both integrated and discrete Intel GPUs in a system, the current
global check of intel_iommu_gfx_mapped, as done from intel_vtd_active()
may not be completely accurate.
In this patch we add i915 parameter to intel_vtd_active() in order to
prepare it for multiple GPUs an
On Thu, Nov 25, 2021 at 12:23:22PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 22, 2021 at 03:51:03PM +0200, Jani Nikula wrote:
> > There are only three call sites remaining for
> > intel_wait_for_vblank(). Remove the function, and open code it to avoid
> > new users from showing up.
> >
> > Signed-
On Mon, Nov 22, 2021 at 03:51:02PM +0200, Jani Nikula wrote:
> intel_wait_for_vblank() goes through a pipe to crtc lookup, while in
> most cases we already have the crtc available. Avoid the extra lookups.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_crt.c | 4
== Series Details ==
Series: drm/i915/ttm: Async migration (rev12)
URL : https://patchwork.freedesktop.org/series/96798/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10924_full -> Patchwork_21678_full
Summary
---
**
On Mon, Nov 22, 2021 at 03:51:03PM +0200, Jani Nikula wrote:
> There are only three call sites remaining for
> intel_wait_for_vblank(). Remove the function, and open code it to avoid
> new users from showing up.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c
Hi Daniel, Dave,
Here's this week drm-misc-fixes PR
Maxime
drm-misc-fixes-2021-11-25:
One removal fix for hyperv, one fix in aspeed for the vga_pw sysfs file
content, one error-checking fix for vc4 and two fixes for nouveau, one
to support a new device and another one to properly check for error
On 12/11/2021 13:40, Tvrtko Ursulin wrote:
On 12/11/2021 00:53, Lu Baolu wrote:
On 11/11/21 11:06 PM, Tvrtko Ursulin wrote:
On 10/11/2021 12:35, Lu Baolu wrote:
On 2021/11/10 20:08, Tvrtko Ursulin wrote:
On 10/11/2021 12:04, Lu Baolu wrote:
On 2021/11/10 17:30, Tvrtko Ursulin wrote:
O
On Wed, Nov 24, 2021 at 05:43:52PM +0200, Jani Nikula wrote:
> On Wed, 24 Nov 2021, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > In order to encapsulate FBC harder let's just move the debugfs
> > stuff into intel_fbc.c.
>
> Mmmh, I've kind of moved towards a split where i915_debugfs.c an
On Tue, 23 Nov 2021, Luis Chamberlain wrote:
> There is no need to user boiler plate code to specify a set of base
> directories we're going to stuff sysctls under. Simplify this by using
> register_sysctl() and specifying the directory path directly.
\o/
Acked-by: Jani Nikula
>
> // pycocci s
== Series Details ==
Series: drm/i915/ttm: Async migration (rev12)
URL : https://patchwork.freedesktop.org/series/96798/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10924 -> Patchwork_21678
Summary
---
**SUCCESS**
== Series Details ==
Series: series starting with [1/2] i915/gvt: Introduce the mmio_info_table.c to
support VFIO new mdev API (rev2)
URL : https://patchwork.freedesktop.org/series/97110/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
== Series Details ==
Series: drm/i915/ttm: Async migration (rev12)
URL : https://patchwork.freedesktop.org/series/96798/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
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