Hi Daniel, Dave,
Here's this week drm-misc-fixes PR
Maxime
drm-misc-fixes-2021-11-18:
A infoframe corruption fix for nouveau, a wrong free function usage fix
for GEM CMA helpers, a Kconfig dependency fix for sun4i, two fixes for
drm/scheduler refcounting and a probing fix for efifb.
The followin
Hi, Matthew
Finally got some time to look at this more in-depth, please see below.
On Mon, 2021-11-15 at 17:16 +, Matthew Auld wrote:
> On 14/11/2021 11:12, Thomas Hellström wrote:
> > Don't wait sync while migrating, but rather make the GPU blit await
> > the
> > dependencies and add a movin
== Series Details ==
Series: drm/i915: Reject 5k on HDR planes for planar fb formats
URL : https://patchwork.freedesktop.org/series/97053/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10897 -> Patchwork_21625
Summary
-
On Wed, 2021-11-17 at 19:49 +0100, Thomas Hellström wrote:
>
> On 11/17/21 15:20, Matthew Auld wrote:
> > In intel_context_do_pin_ww, when calling into the pre_pin
> > hook(which is
> > passed the ww context) it could in theory return -EDEADLK(which is
> > very
> > likely with debug kernels), once
PLANE_CUS_CTL has a restriction of 4096 width even though
PLANE_SIZE and scaler size registers supports max 5120.
Reject 5k on HDR plane for planar formats like NV12
to let the user space know about it.
Without this patch, when 5k content is sent on HDR plane
with NV12 content, FIFO underrun is se
Hi Daniele,
Would you please ack and merge the patch if it looks good?
https://patchwork.freedesktop.org/series/96658/#rev3
Thanks,
Tejas
From: Patchwork
Sent: 17 November 2021 15:07
To: Surendrakumar Upadhyay, TejaskumarX
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.IGT: success fo
== Series Details ==
Series: drm/i915/dg2: Tile 4 plane format support (rev3)
URL : https://patchwork.freedesktop.org/series/95715/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10893_full -> Patchwork_21614_full
Summary
--
== Series Details ==
Series: drm/i915/gt: RPS tuning for light media playback
URL : https://patchwork.freedesktop.org/series/97043/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10897 -> Patchwork_21624
Summary
---
*
== Series Details ==
Series: drm/i915/gt: RPS tuning for light media playback
URL : https://patchwork.freedesktop.org/series/97043/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/dr
== Series Details ==
Series: series starting with [1/3] drm/i915: Move vrr push after the frame
counter sampling again
URL : https://patchwork.freedesktop.org/series/97037/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10896 -> Patchwork_21623
== Series Details ==
Series: drm/i915/rpm: Enable runtime pm autosuspend by default (rev4)
URL : https://patchwork.freedesktop.org/series/96741/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10896 -> Patchwork_21622
Summary
On Wed, Nov 17, 2021 at 11:04:05PM +0200, Ville Syrjälä wrote:
> On Wed, Nov 17, 2021 at 01:10:13PM -0800, Navare, Manasi wrote:
> > On Wed, Nov 17, 2021 at 08:31:02PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Let's adjust the vblank evasion to account for the case where
>
From: Chris Wilson
While the power consumption is proportional to the frequency, there is
also a static draw for active gates. The longer we are able to powergate
(rc6), the lower the static draw. Thus there is a sweetspot in the
frequency/power curve where we run at higher frequency in order to
From: Chris Wilson
Currently, we inspect each engine individually and measure the occupancy
of that engine over the last evaluation interval. If that exceeds our
busyness thresholds, we decide to increase the GPU frequency. However,
under a load balancer, we should consider the occupancy of entir
From: Chris Wilson
Everytime we come to the end of a virtual engine's context, re-randomise
it's siblings[]. As we schedule the siblings' tasklets in the order they
are in the array, earlier entries are executed first (when idle) and so
will be preferred when scheduling the next virtual request.
Switch from tgl to adl, sees one particular media decode pipeline fit
into a single vcs engine on adl, whereas it took two on tgl. However, it
was observed that the power consumtpion for adl remained higher than for
tgl. One contibution is that each engine is treated individually for rps
eval
On Sat, Nov 13, 2021 at 08:22:20AM -0800, Lucas De Marchi wrote:
On Fri, Nov 12, 2021 at 05:47:27PM -0800, Matt Roper wrote:
On Fri, Nov 12, 2021 at 05:42:28PM -0800, Michael Cheng wrote:
Thanks for the feed back! I feel like using something name GEN6 or BYT for a
platform that's not GEN6 or BY
== Series Details ==
Series: drm/i915/display/dg2: Sanitize CD clock
URL : https://patchwork.freedesktop.org/series/97032/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10896 -> Patchwork_21620
Summary
---
**FAILURE*
== Series Details ==
Series: drm/i915/display/dg2: Set CD clock squashing registers
URL : https://patchwork.freedesktop.org/series/97033/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compi
== Series Details ==
Series: drm/i915/display/dg2: Read CD clock from squasher table
URL : https://patchwork.freedesktop.org/series/97031/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/comp
== Series Details ==
Series: drm/i915/pxp: fix includes for headers in include/drm (rev3)
URL : https://patchwork.freedesktop.org/series/96974/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10891_full -> Patchwork_21613_full
On Wed, Nov 17, 2021 at 01:10:13PM -0800, Navare, Manasi wrote:
> On Wed, Nov 17, 2021 at 08:31:02PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Let's adjust the vblank evasion to account for the case where
> > a push has already been sent. In that case the vblank exit will start
On Wed, Nov 17, 2021 at 08:31:03PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Since I originally wrote these comments we decided to change our
> definition of framestart_delay from 0-3 to 1-4. Adjust the comments
> to match that new convention. The actual code was adjusted already.
>
== Series Details ==
Series: drm/i915/display/dg2: Introduce CD clock squashing table
URL : https://patchwork.freedesktop.org/series/97030/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10896 -> Patchwork_21618
Summary
On Wed, Nov 17, 2021 at 08:31:02PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Let's adjust the vblank evasion to account for the case where
> a push has already been sent. In that case the vblank exit will start
> at vmin vblank start (as opposed to vmax vblank start when no push
> has
On Wed, Nov 17, 2021 at 08:31:01PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Moving the vrr push to happen before sampling the frame counter
> was wrong. If we are already in vblank when the push is sent
> the vblank exit will start immediately which causes the sampled
> frame counter
Hi Arunpravin,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on drm-intel/for-linux-next v5.16-rc1]
[cannot apply to drm-tip/drm-tip next-2027]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when
== Series Details ==
Series: drm/i915/display/dg2: Introduce CD clock squashing table
URL : https://patchwork.freedesktop.org/series/97030/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b93af6229243 drm/i915/display/dg2: Introduce CD clock squashing table
-:9: WARNING:COMMIT_LO
== Series Details ==
Series: series starting with [v2,1/6] drm/i915: move the pre_pin earlier
URL : https://patchwork.freedesktop.org/series/97026/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10896 -> Patchwork_21617
Summ
== Series Details ==
Series: series starting with [v2,1/6] drm/i915: move the pre_pin earlier
URL : https://patchwork.freedesktop.org/series/97026/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dg2: Implement WM0 cursor WA for DG2
URL : https://patchwork.freedesktop.org/series/97022/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10896 -> Patchwork_21616
Summary
---
**FA
On 16/11/2021 20:18, Arunpravin wrote:
On contiguous allocation, we round up the size
to the *next* power of 2, implement a function
to free the unused pages after the newly allocate block.
v2(Matthew Auld):
- replace function name 'drm_buddy_free_unused_pages' with
drm_buddy_block_trim
On Wed, Nov 17, 2021 at 10:51:39AM -0800, Matt Roper wrote:
> On Wed, Nov 17, 2021 at 08:43:19PM +0200, Ville Syrjälä wrote:
> > On Tue, Nov 16, 2021 at 09:48:18AM -0800, Matt Roper wrote:
> > > From: Matt Atwood
> > >
> > > Extend existing workaround 1409120013 to DG2.
> >
> > I don't see this
On Wed, Nov 17, 2021 at 08:43:19PM +0200, Ville Syrjälä wrote:
> On Tue, Nov 16, 2021 at 09:48:18AM -0800, Matt Roper wrote:
> > From: Matt Atwood
> >
> > Extend existing workaround 1409120013 to DG2.
>
> I don't see this listed for DG2.
>
> >
> > Cc: José Roberto de Souza
> > Signed-off-by:
On Wed, Nov 17, 2021 at 08:43:19PM +0200, Ville Syrjälä wrote:
> On Tue, Nov 16, 2021 at 09:48:18AM -0800, Matt Roper wrote:
> > From: Matt Atwood
> >
> > Extend existing workaround 1409120013 to DG2.
>
> I don't see this listed for DG2.
This seems to be problem with the DG2 query since for som
On 11/17/21 15:20, Matthew Auld wrote:
In intel_context_do_pin_ww, when calling into the pre_pin hook(which is
passed the ww context) it could in theory return -EDEADLK(which is very
likely with debug kernels), once we start adding more ww locking in there,
like in the next patch. If so then we
On Tue, Nov 16, 2021 at 09:48:18AM -0800, Matt Roper wrote:
> From: Matt Atwood
>
> Extend existing workaround 1409120013 to DG2.
I don't see this listed for DG2.
>
> Cc: José Roberto de Souza
> Signed-off-by: Matt Atwood
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_pm.c
On 16/11/2021 20:18, Arunpravin wrote:
- Make drm_buddy_alloc a single function to handle
range allocation and non-range allocation demands
- Implemented a new function alloc_range() which allocates
the requested power-of-two block comply with range limitations
- Moved order computation a
== Series Details ==
Series: More preparation for multi gt patches
URL : https://patchwork.freedesktop.org/series/97020/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] dr
From: Ville Syrjälä
Since I originally wrote these comments we decided to change our
definition of framestart_delay from 0-3 to 1-4. Adjust the comments
to match that new convention. The actual code was adjusted already.
Cc: Manasi Navare
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/
From: Ville Syrjälä
Let's adjust the vblank evasion to account for the case where
a push has already been sent. In that case the vblank exit will start
at vmin vblank start (as opposed to vmax vblank start when no push
has been sent).
This should minimize the effects of the tiny race between sam
From: Ville Syrjälä
Moving the vrr push to happen before sampling the frame counter
was wrong. If we are already in vblank when the push is sent
the vblank exit will start immediately which causes the sampled
frame counter to correspond to the next frame instead of the current
frame.
So put thin
On Tue, Nov 16, 2021 at 03:12:09PM -0800, Manasi Navare wrote:
> VRR is supported on Gen 11 HW , hence extend the support
> in the driver to enable this for Gen 11.
Yeah, based on my testing icl works as well (or as poorly)
as tgl.
Reviewed-by: Ville Syrjälä
>
> Cc: Ville Syrjälä
> Signed-off
On 16/11/2021 20:18, Arunpravin wrote:
Move the base i915 buddy allocator code into drm
- Move i915_buddy.h to include/drm
- Move i915_buddy.c to drm root folder
- Rename "i915" string with "drm" string wherever applicable
- Rename "I915" string with "DRM" string wherever applicable
- Fix header
Hi Rajat,
On 11/17/21 15:28, Rajat Jain wrote:
> +Heikki Krogerus
>
> Hello Hans, Heikki,
>
> I have a question below, which isn't really a problem, but more of an
> attempt to understand the current code and its limitations.
>
> On Tue, Oct 5, 2021 at 1:23 PM Hans de Goede wrote:
>>
>> On som
Hi Rajat,
On 11/17/21 15:13, Rajat Jain wrote:
> Hello Hans,
>
> On Tue, Oct 5, 2021 at 1:23 PM Hans de Goede wrote:
>>
>> Add X86 specific arch init code, which fills the privacy-screen lookup
>> table by checking for various vendor specific ACPI interfaces for
>> controlling the privacy-screen
Hi Rajat,
On 11/17/21 14:59, Rajat Jain wrote:
> Hello Hans,
>
> I'm working on my platform's privacy-screen support based on your
> patches, and had some (I know late) questions. Would be great if you
> could please help answer. Please see inline.
>
> On Tue, Oct 5, 2021 at 1:25 PM Hans de Goed
== Series Details ==
Series: drm/i915/dg2: Tile 4 plane format support (rev3)
URL : https://patchwork.freedesktop.org/series/95715/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10893 -> Patchwork_21614
Summary
---
*
On Wed, Nov 17, 2021 at 03:43:41PM +0200, Stanislav Lisovskiy wrote:
> Bug in the register unit which results in WM1 register
> used when only WM0 is enabled on cursor.
> Software workaround is when only WM0 enabled on cursor,
> copy contents of CUR_WM_0[30:0] (exclude the enable bit)
> into CUR_WM
On Tue, Nov 16, 2021 at 05:42:34PM +0200, Jani Nikula wrote:
> Add display/intel_display_trace.[ch] for defining display
> tracepoints. The main goal is to reduce cross-includes between gem and
> display. It would be possible split up tracing even further, but that
> would lead to more boilerplate.
== Series Details ==
Series: drm/i915/dg2: Tile 4 plane format support (rev3)
URL : https://patchwork.freedesktop.org/series/95715/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Set CD clock squashing registers based on selected CD clock.
v2: use slk_cdclk_decimal() to compute decimal values instead of a
specific table (Ville)
Set waveform based on CD clock table (Ville)
Drop unnecessary local variable (Ville)
v3: Correct function naming (Ville)
Correct if
In case of CD clock squashing the divider is always 1. We don't
need to calculate the divider in use so let's skip that for DG2.
v2: Drop unnecessary local variable (Ville)
v3: Avoid if-else structure (Ville)
[v4: vsyrjala: Fix cd2x divider calculation (Uma),
Introduce has_cdclk_squ
To calculate CD clock with squasher unit, we set CD clock ratio to fixed value
of 34.
The CD clock value is read from CD clock squasher table.
BSpec: 54034
v2: Read ratio from register (Ville)
Drop unnecessary local variable (Ville)
Get CD clock from the given table
v3: Calculate CD cloc
For CD clock squashing method, we need to define corresponding CD clock table
for
reference clocks, dividers and ratios for all CD clock options.
BSpec: 54034
v2: Add CD squashing waveforms as part of CD clock table (Ville)
v3: Waveform is 16 bits wide (Ville)
[v4: vsyrjala: Nuke the non-squashe
On Wed, Nov 17, 2021 at 01:01:00PM +0200, Stanislav Lisovskiy wrote:
> TileF(Tile4 in bspec) format is 4K tile organized into
> 64B subtiles with same basic shape as for legacy TileY
> which will be supported by Display13.
>
> v2: - Fixed wrong case condition(Jani Nikula)
> - Increased I915_FO
Quoting Andi Shyti (2021-11-17 13:34:56)
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 089fb4658b216..0bbf8c0c42eac 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display
From: Maarten Lankhorst
Lets be thorough here. Users of the TTM backend would likely expect this
behaviour.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Matthew Auld
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/g
From: Maarten Lankhorst
It's just an alias to vma->obj->base.resv, no need to duplicate it.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Niranjana Vishwanathapura
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++--
drivers/gpu/drm/i915/i915_vma.c
From: Maarten Lankhorst
This allows us to finally get rid of all the assumptions that vma->obj
is NULL.
Changes since v1:
- Ensure the mock_ring vma is pinned to prevent a fault.
- Pin it high to avoid failure in evict_for_vma selftest.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Matthew Aul
From: Maarten Lankhorst
vma->obj and vma->resv are now never NULL, and some checks can be removed.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Matthew Auld
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/gt/intel_context.c | 2 +-
.../gpu/drm/i915/gt/intel_ring_submission.c |
From: Maarten Lankhorst
We currently have to special case vma->obj being NULL because
of gen6 ppgtt and mock_engine. Fix gen6 ppgtt, so we may soon
be able to remove a few checks. As the object only exists as
a fake object pointing to ggtt, we have no backing storage,
so no real object is created
In intel_context_do_pin_ww, when calling into the pre_pin hook(which is
passed the ww context) it could in theory return -EDEADLK(which is very
likely with debug kernels), once we start adding more ww locking in there,
like in the next patch. If so then we need to be mindful of having to
restart th
I've looked a bit more into this and I think we should just follow
Thomas Zimmermann's idea to make this a separate module.
Otherwise we just have the code around all the time even if it is unused
and implementing this should be trivial.
See how DRM_GEM_CMA_HELPER or DRM_VRAM_HELPER are done
Bug in the register unit which results in WM1 register
used when only WM0 is enabled on cursor.
Software workaround is when only WM0 enabled on cursor,
copy contents of CUR_WM_0[30:0] (exclude the enable bit)
into CUR_WM_1[30:0].
HSDES: 14012656716
Signed-off-by: Stanislav Lisovskiy
---
drivers
In preparation to the upcoming multitile commits, embed the gt
id in the GT 0 in the drm_i915_private structure.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Lucas De Marchi
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 4 +-
From: Michał Winiarski
We now support a per-gt uncore, yet we're not able to infer which GT
we're operating upon. Let's store a backpointer for now.
Signed-off-by: Michał Winiarski
Signed-off-by: Matt Roper
Reviewed-by: Andi Shyti
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/i915_dri
Hi,
the first of the two patches concludes the first stage of
refactoring which makes the use of intel_gt on the different
subsystem. It's taken from Matt's series and it has alread been
reviewed. The patch has just been replaced before any multitile
patches and I think it can be already pushed.
== Series Details ==
Series: drm/i915/pxp: fix includes for headers in include/drm (rev3)
URL : https://patchwork.freedesktop.org/series/96974/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10891 -> Patchwork_21613
Summary
== Series Details ==
Series: series starting with [1/5] drm/i915: drop intel_display.h include from
intel_ddi.h (rev2)
URL : https://patchwork.freedesktop.org/series/96981/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10891 -> Patchwork_21612
== Series Details ==
Series: series starting with [1/5] drm/i915: drop intel_display.h include from
intel_ddi.h (rev2)
URL : https://patchwork.freedesktop.org/series/96981/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won'
On Fri, 2021-11-12 at 15:32 +, Matthew Auld wrote:
> In intel_context_do_pin_ww, when calling into the pre_pin hook(which
> is
> passed the ww context) it could in theory return -EDEADLK(which is
> very
> likely with debug kernels), once we start adding more ww locking in
> there,
> like in the
TileF(Tile4 in bspec) format is 4K tile organized into
64B subtiles with same basic shape as for legacy TileY
which will be supported by Display13.
v2: - Fixed wrong case condition(Jani Nikula)
- Increased I915_FORMAT_MOD_F_TILED up to 12(Imre Deak)
v3: - s/I915_TILING_F/TILING_4/g
- s/I9
Hi Joonas,
On Wed, 17 Nov 2021 12:35:50 +0200 Joonas Lahtinen
wrote:
>
> + intel-gfx mailing list (Stephen, can you include this going forward?)
I have added that to my contacts for this tree (so, yes :-)).
--
Cheers,
Stephen Rothwell
pgpu3TAyT8ZHT.pgp
Description: OpenPGP digital signature
+ intel-gfx mailing list (Stephen, can you include this going forward?)
Adding Thomas for this specific patch.
Regards, Joonas
Quoting Stephen Rothwell (2021-11-17 01:02:23)
> Hi all,
>
> After merging the etnaviv tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> dri
On Thu, 11 Nov 2021, Jani Nikula wrote:
> This is more about trimming i915_drv.h than the renamed
> i915_driver.[ch]. Split out i915_driver.[ch] out of i915_drv.h as a
> feasible thing to do.
Pushed the series with Daniel's IRC ack.
BR,
Jani.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gp
== Series Details ==
Series: drm/i915/gt: Hold RPM wakelock during PXP suspend (rev3)
URL : https://patchwork.freedesktop.org/series/96658/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10888_full -> Patchwork_21610_full
Su
== Series Details ==
Series: drm/i915/adl_p: Add adl-p ddc pin mapping
URL : https://patchwork.freedesktop.org/series/97009/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10889 -> Patchwork_21611
Summary
---
**FAILUR
== Series Details ==
Series: drm/i915/: Extend VRR platform support to Gen 11
URL : https://patchwork.freedesktop.org/series/96998/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10888_full -> Patchwork_21609_full
Summary
--
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