On Thu, Sep 30, 2021 at 08:35:01AM +0300, Gwan-gyeong Mun wrote:
>
>
> On 9/29/21 9:20 PM, Ville Syrjälä wrote:
> > On Wed, Sep 29, 2021 at 08:50:12PM +0300, Gwan-gyeong Mun wrote:
> >>
> >>
> >> On 9/23/21 10:46 PM, José Roberto de Souza wrote:
> >>> PSR2 selective is not supported over rotated
We may end up in i915_ttm_bo_destroy() in an error path before the
object is fully initialized. In that case it's not correct to call
__i915_gem_free_object(), because that function
a) Assumes the gem object refcount is 0, which it isn't.
b) frees the placements which are owned by the caller until
On 9/29/21 9:20 PM, Ville Syrjälä wrote:
On Wed, Sep 29, 2021 at 08:50:12PM +0300, Gwan-gyeong Mun wrote:
On 9/23/21 10:46 PM, José Roberto de Souza wrote:
PSR2 selective is not supported over rotated and scaled planes.
We had the rotation check in intel_psr2_sel_fetch_config_valid()
but t
On Wed, Sep 29, 2021 at 06:27:16PM +, Wang, Zhi A wrote:
> Thanks for the idea. I am not sure i915 guys would take this idea since
> that it's only for GVT-g, i915 doesn't use this at all. We need to take
> a snapshot of both PCI configuration space and MMIO registers before
> i915 driver st
== Series Details ==
Series: drm: maintenance patches for 5.15-rcX
URL : https://patchwork.freedesktop.org/series/95245/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21197_full
Summary
---
**
On Wed, Sep 29, 2021 at 8:08 PM Joe Perches wrote:
>
> On Wed, 2021-09-29 at 19:44 -0600, Jim Cromie wrote:
> > There are blocks of DRM_DEBUG calls, consolidate their args into
> > single calls. With dynamic-debug in use, each callsite consumes 56
> > bytes of callsite data, and this patch remove
== Series Details ==
Series: drm: maintenance patches for 5.15-rcX
URL : https://patchwork.freedesktop.org/series/95245/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21197
Summary
---
**SUCCESS**
On Wed, 2021-09-29 at 19:44 -0600, Jim Cromie wrote:
> There are blocks of DRM_DEBUG calls, consolidate their args into
> single calls. With dynamic-debug in use, each callsite consumes 56
> bytes of callsite data, and this patch removes about 65 calls, so
> it saves ~3.5kb.
>
> no functional cha
== Series Details ==
Series: series starting with [v2,1/9] drm/i915/display/psr: Handle plane and
pipe restrictions at every page flip
URL : https://patchwork.freedesktop.org/series/95242/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21196_full
==
== Series Details ==
Series: drm: maintenance patches for 5.15-rcX
URL : https://patchwork.freedesktop.org/series/95245/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+
+
+
+
+
+
+
+
+
With DRM_USE_DYNAMIC_DEBUG, each callsite record requires 56 bytes.
We can combine 12 into one here and save ~620 bytes.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/nouveau/nouveau_drm.c | 36 +--
1 file changed, 23 insertions(+), 13 deletions(-)
diff --git a/drivers/g
Taking embedded spaces out of existing prefixes makes them better
class-prefixes; simplifying the extra quoting needed otherwise:
$> echo format "^gvt: core:" +p >control
vs
$> echo format ^gvt:core: +p >control
Dropping the internal spaces means that quotes are only needed when
the trailing
There are blocks of DRM_DEBUG calls, consolidate their args into
single calls. With dynamic-debug in use, each callsite consumes 56
bytes of callsite data, and this patch removes about 65 calls, so
it saves ~3.5kb.
no functional changes.
RFC: this creates multi-line log messages, does that break
no code changes, good for rc
Signed-off-by: Jim Cromie
---
include/drm/drm_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/drm_drv.h b/include/drm/drm_drv.h
index 0cd95953cdf5..4b29261c4537 100644
--- a/include/drm/drm_drv.h
+++ b/include/drm/drm_drv.h
@@ -4
hi drm folks,
Heres a small set of assorted patches which are IMO suitable for rcX;
one doc fix, 2 patches folding multiple DBGs together, and a format
string modification.
Jim Cromie (4):
drm: fix doc grammar error
amdgpu_ucode: reduce number of pr_debug calls
nouveau: fold multiple DRM_DE
== Series Details ==
Series: series starting with [v2,1/9] drm/i915/display/psr: Handle plane and
pipe restrictions at every page flip
URL : https://patchwork.freedesktop.org/series/95242/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21196
== Series Details ==
Series: series starting with [v2,1/9] drm/i915/display/psr: Handle plane and
pipe restrictions at every page flip
URL : https://patchwork.freedesktop.org/series/95242/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used,
Not waiting for vblank counter to increment could potentialy cause
issues as commits after the one that needs a modeset could change
state of entities that are not committed into hardware yet.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.
From: Gwan-gyeong Mun
We are still missing the PSR2 selective fetch handling of multi-planar
formats but until proper handle is added we can workaround it by
doing full frames fetch when state has such formats.
Cc: Ville Syrjälä
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/
With all the past fixes now this feature is functional and can be
enabled by default in desktop enviroments that uses compositor.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file chang
When PSR2 selective fetch is enabled writes to CURSURFLIVE alone do
not causes the panel to be updated when doing frontbuffer rendering.
>From what I was able to figure from experiments the writes to
CURSURFLIVE takes PSR2 from deep sleep but panel is not updated
because PSR2_MAN_TRK_CTL has no st
With all the recent fixes PSR2 is properly working in Alderlake-P but
due to some issues that don't have software workarounds it will not be
supported in display steppings older than B0.
Even with this patch PSR2 will no be enabled by default in ADL-P, it
still requires enable_psr2_sel_fetch to be
The Wa_14014971508 is required to fix scanout when a feature that i915
do not support is enabled and this feature is not planned to be enabled
for adlp.
Keeping this workaround enabled can badly hurt power-savings when
a full frame fetch is required(see psr2_sel_fetch_plane_state_supported()
and p
Legacy cursor APIs are handled by intel_legacy_cursor_update(), that
calls drm_atomic_helper_update_plane() when going through the
slow/atomic path to update cursor, what was the case for PSR2
selective fetch.
drm_atomic_helper_update_plane() sets
drm_atomic_state->legacy_cursor_update to true whe
This unnecessary flushes are hurting power-savings are it causes
features like PSR, FBC and DRRS to disable it self to handle
frontbuffer rendering, below some explanation of why each removed
call is not necessary.
The flush in intel_prepare_plane_fb() is not required as framebuffer
will be flippe
PSR2 selective is not supported over rotated and scaled planes.
We had the rotation check in intel_psr2_sel_fetch_config_valid()
but that code path is only execute when a modeset is needed and
those plane parameters can change without a modeset.
Pipe selective fetch restrictions are also needed, i
== Series Details ==
Series: drm/i915: Update memory bandwidth formulae (rev3)
URL : https://patchwork.freedesktop.org/series/95138/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21195_full
Summary
-
On Wed, Sep 29, 2021 at 06:27:16PM +, Wang, Zhi A wrote:
> On 9/28/21 3:05 PM, Jason Gunthorpe wrote:
> > On Tue, Sep 28, 2021 at 02:35:06PM +, Wang, Zhi A wrote:
> >
> >> Yes. I was thinking of the possibility of putting off some work later so
> >> that we don't need to make a lot of chang
On Wed, Sep 29, 2021 at 11:08:18PM +0200, Andrzej Hajda wrote:
W dniu 29.09.2021 o 20:33, Lucas De Marchi pisze:
Like the IS_ENABLED() counterpart, we can make IS_CONFIG_NONZERO() to
return the right thing when the config is not defined rather than a
build error, with the limitation that it can
== Series Details ==
Series: drm/i915: Reject bogus modes with fixed mode panels (rev4)
URL : https://patchwork.freedesktop.org/series/95003/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21194_full
I have addressed the regressions and I filed below issues
https://gitlab.freedesktop.org/drm/intel/-/issues/4225
igt@gem_eio@reset-stress - fail - Failed assertion: count > 2
https://gitlab.freedesktop.org/drm/intel/-/issues/4224
igt@kms_async_flips@crc - fail - Failed assertion: !mismatch ||
igt
== Series Details ==
Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL : https://patchwork.freedesktop.org/series/94878/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
== Series Details ==
Series: Rename IS_ACTIVE() and move to kconfig.h
URL : https://patchwork.freedesktop.org/series/95229/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21193_full
Summary
---
== Series Details ==
Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL : https://patchwork.freedesktop.org/series/94878/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
== Series Details ==
Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL : https://patchwork.freedesktop.org/series/94878/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
On Wed, Sep 29, 2021 at 04:58:46PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
> URL : https://patchwork.freedesktop.org/series/94878/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_10660_full -
W dniu 29.09.2021 o 20:33, Lucas De Marchi pisze:
> Like the IS_ENABLED() counterpart, we can make IS_CONFIG_NONZERO() to
> return the right thing when the config is not defined rather than a
> build error, with the limitation that it can't be used on preprocessor
> context.
>
> The trick here is
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev4)
URL : https://patchwork.freedesktop.org/series/95122/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21192_full
Summa
On Wed, Sep 29, 2021 at 01:44:10PM -0700, John Harrison wrote:
> On 8/20/2021 15:44, Matthew Brost wrote:
> > If an error occurs in the front end when multi-lrc requests are getting
> > generated we need to skip these in the backend but we still need to
> > emit the breadcrumbs seqno. An issues arr
On 8/20/2021 15:44, Matthew Brost wrote:
If an error occurs in the front end when multi-lrc requests are getting
generated we need to skip these in the backend but we still need to
emit the breadcrumbs seqno. An issues arrises because with multi-lrc
arrises -> arises
breadcrumbs there is a han
On Wed, Sep 29, 2021 at 07:55:25PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> LTTPRs should support per-lane drive settings I think, and even if
> they don't they should implement their own fallback logic to determine
> suitable common drive settings to use for all the lanes.
>
> v2:
On Wed, Sep 29, 2021 at 07:54:52PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Adjust the link training code to accommodate per-lane drive settings,
> if supported by the platform. Actually enabling this will involve
> some changes to each platform's .set_signal_level() implementation,
== Series Details ==
Series: drm/i915: Update memory bandwidth formulae (rev3)
URL : https://patchwork.freedesktop.org/series/95138/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21195
Summary
---
== Series Details ==
Series: drm/i915: Enable TPS3/4 on all platforms that support them (rev2)
URL : https://patchwork.freedesktop.org/series/88186/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21191_full
===
On Mon, Sep 27, 2021 at 09:24:53PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> In order to have per-lane drive settings we need intel_ddi_level()
> to accept the lane as a parameter. That is, the eventual goal is to
> call intel_ddi_level() once for each lane. For now we just pass in
>
On Mon, Sep 27, 2021 at 09:24:52PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Since intel_ddi_level() now looks that buf_trans table there's
> no point in having intel_ddi_hdmi_num_entries() around. Just
> roll the necessary bits of locic into
> intel_ddi_hdmi_level()/intel_ddi_level()
On Mon, Sep 27, 2021 at 09:24:51PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> All callers of intel_ddi_level() duplicate the check+WARN
> to make sure the returned level is actually present in the
> appropriate buf_trans table. Let's push that stuff into
> intel_ddi_level() so the call
On Mon, Sep 27, 2021 at 09:24:50PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Convert bxt_ddi_phy_set_signal_levels() to act as the full
> .set_signal_levels() hook instead of going through a pointless wrapper.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> drive
== Series Details ==
Series: drm/i915: Reject bogus modes with fixed mode panels (rev4)
URL : https://patchwork.freedesktop.org/series/95003/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21194
Summary
--
On Mon, Sep 27, 2021 at 09:24:49PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Now that .set_signal_levels() is used for HDMI as well, we can
> remove the extra level of indirection and just plug the correct
> stuff straight into .set_signal_levels().
>
> Signed-off-by: Ville Syrjälä
The formulae has been updated to include more variables. Make
sure the code carries the same.
Bspec: 64631
v2: Make GEN11 follow the default route and fix calculation of
maxdebw(RK)
v3: Fix div by zero on Gen11 and Correct indent for fallthrough(Jani)
Cc: Ville Syrjälä
Suggested-by: Matt Ro
On Wed, 2021-09-29 at 16:28 +0300, Imre Deak wrote:
> Atm during driver loading and system resume TypeC ports are accessed
> before their HW/SW state is synced. Move the TypeC port sanitization to
> the encoder's sync_state hook to fix this.
>
> v2: Handle the encoder disabled case in gen11_dsi_sy
On Mon, Sep 27, 2021 at 09:24:48PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Currently .set_signal_levels() is only used by encoders in DP mode.
> For most modern platforms there is no essential difference between
> DP and HDMI, and both codepaths just end up calling the same function
== Series Details ==
Series: Rename IS_ACTIVE() and move to kconfig.h
URL : https://patchwork.freedesktop.org/series/95229/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21193
Summary
---
**SUCCESS
From: Ville Syrjälä
When using a panel with a fixed mode we don't change the refresh
rate of the display. Reject any user requested mode which doesn't
match that fixed refresh rate.
Unfortunately when Xorg sees the scaling_mode property on the
connecor it likes to automagically cook up modes who
== Series Details ==
Series: Rename IS_ACTIVE() and move to kconfig.h
URL : https://patchwork.freedesktop.org/series/95229/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
700a1ad38302 drm/i915: rename IS_ACTIVE
74e2f2ef0ee5 drm/i915/utils: do not depend on config being defined
-
Like the IS_ENABLED() counterpart, we can make IS_CONFIG_NONZERO() to
return the right thing when the config is not defined rather than a
build error, with the limitation that it can't be used on preprocessor
context.
The trick here is that macro names can't start with a number or dash, so
we stri
It took me some time to understand the need for IS_ACTIVE and why we
couldn't use kconfig.h. Rename it to something else that would be more
suitable to include in kconfig.h and shared with other subsystems rather
than maintaining it only in i915.
Name here is pretty open for suggestions, but I thi
The check for config value doesn't really belong to i915_utils.h - we
are trying to eliminate that utils helper and share them when possible
with other drivers and subsystems.
Rationale for having such macro is in commit
babaab2f4738 ("drm/i915: Encapsulate kconfig constant values inside boolean
As we try to reduce our i915-only helpers, let's try to improve
IS_ACTIVE() logic and move to kconfig.h.
I'm not 100% happy with the name, but it's the best I could come up
with, hopefully a little better than trying to add IS_ACTIVE() to be
used broadly.
v2: now with Cc/To list fixed up - no cha
On 9/28/21 3:05 PM, Jason Gunthorpe wrote:
> On Tue, Sep 28, 2021 at 02:35:06PM +, Wang, Zhi A wrote:
>
>> Yes. I was thinking of the possibility of putting off some work later so
>> that we don't need to make a lot of changes. GVT-g needs to take a
>> snapshot of GPU registers as the initial v
On Wed, Sep 29, 2021 at 08:50:12PM +0300, Gwan-gyeong Mun wrote:
>
>
> On 9/23/21 10:46 PM, José Roberto de Souza wrote:
> > PSR2 selective is not supported over rotated and scaled planes.
> > We had the rotation check in intel_psr2_sel_fetch_config_valid()
> > but that code path is only execute
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev4)
URL : https://patchwork.freedesktop.org/series/95122/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21192
Summary
---
On Thu, 2021-09-23 at 18:49 +0200, Lukasz Majczak wrote:
> With patch "drm/i915/vbt: Fix backlight parsing for VBT 234+"
> the size of bdb_lfp_backlight_data structure has been increased,
> causing if-statement in the parse_lfp_backlight function
> that comapres this structure size to the one retri
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev7)
URL : https://patchwork.freedesktop.org/series/91674/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21190_full
==
On 9/23/21 10:46 PM, José Roberto de Souza wrote:
PSR2 selective is not supported over rotated and scaled planes.
We had the rotation check in intel_psr2_sel_fetch_config_valid()
but that code path is only execute when a modeset is needed and
change those plane parameters do not require a mode
On 2021-09-28 23:58, Navare, Manasi D wrote:
> [AMD Official Use Only]
>
> We have merged such DRM definition dependencies previously through a topic
> branch in order to avoid redefining inside the driver.
> But yes guarding this with ifdef is good.
>
> Reviewed-by: Manasi Navare
>
Ah, I
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev4)
URL : https://patchwork.freedesktop.org/series/95122/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/g
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work (rev4)
URL : https://patchwork.freedesktop.org/series/95122/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5ca7aed58062 drm/i915: s/ddi_translations/trans/
-:1809: WARNING:LONG_LINE: line length of 102
== Series Details ==
Series: drm/i915: Enable TPS3/4 on all platforms that support them (rev2)
URL : https://patchwork.freedesktop.org/series/88186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21191
Sum
On Wed, 29 Sep 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Stop using HBR2/3 support as a proxy for TPS3/4 support.
> The two are no longer 1:1 in the hardware, arguably they
> never were due to HSW ULX which does support TPS3 while
> being limited to HBR1.
>
> In more recent times GLK g
On Mon, Sep 27, 2021 at 09:24:47PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> "ddi_translations" is a bit too long, let's shorten it to just "trans".
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 92 +--
> .../drm
== Series Details ==
Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL : https://patchwork.freedesktop.org/series/94878/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21189_full
From: Ville Syrjälä
LTTPRs should support per-lane drive settings I think, and even if
they don't they should implement their own fallback logic to determine
suitable common drive settings to use for all the lanes.
v2: Actually check the correct thing
Signed-off-by: Ville Syrjälä
---
drivers/
From: Ville Syrjälä
Adjust the link training code to accommodate per-lane drive settings,
if supported by the platform. Actually enabling this will involve
some changes to each platform's .set_signal_level() implementation,
so for the moment all supported platforms will keep using the current
cod
From: Ville Syrjälä
Stop using HBR2/3 support as a proxy for TPS3/4 support.
The two are no longer 1:1 in the hardware, arguably they
never were due to HSW ULX which does support TPS3 while
being limited to HBR1.
In more recent times GLK gained support for TPS4 while
being limited to HBR2. And o
== Series Details ==
Series: drm/i915/ttm: Rework object initialization slightly (rev2)
URL : https://patchwork.freedesktop.org/series/95107/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10660_full -> Patchwork_21187_full
On Tue, Sep 28, 2021 at 02:35:09PM -0700, abhin...@codeaurora.org wrote:
> On 2021-09-28 11:02, Sean Paul wrote:
> > On Tue, Sep 21, 2021 at 07:25:41PM -0700, abhin...@codeaurora.org wrote:
> > > On 2021-09-15 13:38, Sean Paul wrote:
> > > > From: Sean Paul
> > > >
> > > > This patch adds HDCP 1.x
On 9/29/21 10:59, Maarten Lankhorst wrote:
Ensure i915_vma_pin_iomap and vma_unpin are done with dpt->obj lock held.
I don't think there's much of a point in merging intel_dpt_pin() with
intel_pin_fb_obj_dpt(), they touch different objects.
Changes since v1:
- Fix using the wrong pointer to r
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev7)
URL : https://patchwork.freedesktop.org/series/91674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21190
Summar
== Series Details ==
Series: drm/i915: Add ww context to intel_dpt_pin, v2.
URL : https://patchwork.freedesktop.org/series/95200/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10659_full -> Patchwork_21186_full
Summary
== Series Details ==
Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL : https://patchwork.freedesktop.org/series/94878/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21189
Summary
--
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev6)
URL : https://patchwork.freedesktop.org/series/91674/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10659_full -> Patchwork_21185_full
==
On Wed, 29 Sept 2021 at 13:01, Christian König wrote:
>
> Am 27.09.21 um 18:14 schrieb Matthew Auld:
> > On Mon, 27 Sept 2021 at 12:47, Christian König
> > wrote:
> >> Any objections that I just push patches 1-7 to drm-misc-next?
> > Please go ahead Christian. Thanks.
>
> Well I've pushed patche
== Series Details ==
Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL : https://patchwork.freedesktop.org/series/94878/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+driv
== Series Details ==
Series: drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8)
URL : https://patchwork.freedesktop.org/series/94878/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7a1594f1ced8 drm/i915/tc: Fix TypeC port init/resume time sanitization
c01091513a71 drm/i9
== Series Details ==
Series: drm/i915/ttm: Rework object initialization slightly (rev2)
URL : https://patchwork.freedesktop.org/series/95107/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10660 -> Patchwork_21187
Summary
--
== Series Details ==
Series: series starting with [1/3] drm/ttm: s/FLAG_SG/FLAG_EXTERNAL/
URL : https://patchwork.freedesktop.org/series/95219/
State : failure
== Summary ==
Applying: drm/ttm: s/FLAG_SG/FLAG_EXTERNAL/
Using index info to reconstruct a base tree...
M drivers/gpu/drm/amd/a
Reviewed-by: Gwan-gyeong Mun
On 9/23/21 10:46 PM, José Roberto de Souza wrote:
With all the recent fixes PSR2 is properly working in Alderlake-P but
due to some issues that don't have software workarounds it will not be
supported in display steppings older than B0.
Even with this patch PSR2 wi
So far TC-cold was blocked only for the duration of TypeC mode resets.
The DP-alt and legacy modes require TC-cold to be blocked also whenever
the port is in use (AUX transfers, enable modeset), and this was ensured
by the held PHY ownership flag. On ADL-P this doesn't work, since the
PHY ownership
For the ADL-P TBT mode the spec doesn't require blocking TC-cold by
using the legacy AUX power domain. To avoid the timeouts that this would
cause during PHY disconnect/reconnect sequences (which will be more
frequent after a follow-up change) use the TC_COLD_OFF power domain in
TBT mode on all pla
A follow-up change will select the TC-cold blocking power domain based
on the TypeC mode, prepare for that here.
Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
for readability.
No functional change.
v2: Add code comment about IOM reg accesses in TCCOLD. (Jose)
Cc: José
A follow-up change will start to disconnect/re-connect PHYs around AUX
transfers and modeset enable/disables. To prepare for that add a new
TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
domain status (no power domain in disconnected state, mode dependent
power domain in c
The PHY ownership release->AUX PW disable steps during a modeset
disable->PHY disconnect sequence can hang the system if the PHY
disconnect happens after disabling the PHY's PLL. The spec doesn't
require a specific order for these two steps, so this issue is still
being root caused by HW/FW teams.
On ADL-P the PHY ready/complete flag is always set even in TBT-alt mode.
To avoid taking the PHY ownership and the following spurious "PHY sudden
disconnect" messages on this platform when connecting the PHY in TBT
mode, check if there is any DP-alt or legacy sink connected before
taking the owners
Atm during driver loading and system resume TypeC ports are accessed
before their HW/SW state is synced. Move the TypeC port sanitization to
the encoder's sync_state hook to fix this.
v2: Handle the encoder disabled case in gen11_dsi_sync_state() as well
(Jose, Jani)
Fixes: f9e76a6e68d3 ("drm
Reviewed-by: Gwan-gyeong Mun
On 9/23/21 10:46 PM, José Roberto de Souza wrote:
With all the past fixes now this feature is functional and can be
enabled by default in desktop enviroments that uses compositor.
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
d
In commit:
commit 667a50db0477d47fdff01c666f5ee1ce26b5264c
Author: Thomas Hellstrom
Date: Fri Jan 3 11:17:18 2014 +0100
drm/ttm: Refuse to fault (prime-) imported pages
we introduced the restriction that imported pages should not be directly
mappable through TTM(this also extends to userp
Move it to inline kernel-doc, otherwise we can't add empty lines it
seems. Also drop the kernel-doc for pages_list, which doesn't seem to
exist.
v2(Christian):
- Add a note that FLAG_SWAPPED shouldn't need to be touched by drivers.
- Mention what FLAG_POPULATED does.
Signed-off-by: Matthew Au
It covers more than just ttm_bo_type_sg usage, like with say dma-buf,
since one other user is userptr in amdgpu, and in the future we might
have some more. Hence EXTERNAL is likely a more suitable name.
v2(Christian):
- Rename these to TTM_TT_FLAGS_*
- Fix up all the holes in the flag values
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