[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc/slpc: Enable GuC based power management features (rev4)

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915/guc/slpc: Enable GuC based power management features (rev4) URL : https://patchwork.freedesktop.org/series/93026/ State : success == Summary == CI Bug Log - changes from CI_DRM_10427_full -> Patchwork_20752_full

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix syncmap memory leak

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915: Fix syncmap memory leak URL : https://patchwork.freedesktop.org/series/93245/ State : success == Summary == CI Bug Log - changes from CI_DRM_10427_full -> Patchwork_20751_full Summary --- **SUCC

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp

2021-07-30 Thread Lucas De Marchi
On Sat, Jul 31, 2021 at 01:31:10AM +, Patchwork wrote: == Series Details == Series: drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp URL : https://patchwork.freedesktop.org/series/93244/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10427_full -> Patchwork_20750_fu

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp URL : https://patchwork.freedesktop.org/series/93244/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10427_full -> Patchwork_20750_full Summ

Re: [Intel-gfx] [PATCH] drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp

2021-07-30 Thread Lucas De Marchi
I guess I forgot to Cc dri-devel. Doing it now. Lucas De Marchi On Fri, Jul 30, 2021 at 12:18:59PM -0700, Matt Roper wrote: On Fri, Jul 30, 2021 at 12:11:15PM -0700, Lucas De Marchi wrote: There's a missing sentinel since we are not using ARRAY_SIZE(), but rather checking that the .start is 0

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications

2021-07-30 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications URL : https://patchwork.freedesktop.org/series/93252/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10427 -> Patchwork_20753 ==

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications

2021-07-30 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications URL : https://patchwork.freedesktop.org/series/93252/ State : warning == Summary == $ dim checkpatch origin/drm-tip 762853c5a7c2 drm/i915/display/tgl+:

[Intel-gfx] [PATCH 4/4] DO_NOT_MERGE: drm/i915/display: Enable PSR2 selective fetch by default

2021-07-30 Thread José Roberto de Souza
Only to execute tests with PSR2 selective fetch enabled and check what is broken. IGT tests know to fail with this: - kms_cursor_legacy: all tests that checks if evasion happend, I have fix for it making cursor_slowpath() returns true for display 12+. - kms_psr2_su: The pageflip test, it needs to

[Intel-gfx] [PATCH 3/4] drm/i915: Nuke ORIGIN_GTT

2021-07-30 Thread José Roberto de Souza
There is no users of it, so no need to keep handling for it. Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_fbc.c | 10 +- drivers/gpu/drm/i915/display/intel_frontbuffer.h | 3 +-- 2 files changed, 2 insertions(+), 11 deletions(-

[Intel-gfx] [PATCH 2/4] drm/i915/display: Fix sel fetch plane offset calculation

2021-07-30 Thread José Roberto de Souza
skl_calc_main_surface_offset() is used to calculate an aligned plane surface address considering the inner framebuffer x and y offset. It can not be used by selective fetch functions becase there is no PLANE_SEL_FETCH_SURF. So the PLANE_SEL_FETCH_OFFSET.y should only be PLANE_OFFSET.y + damaged_are

[Intel-gfx] [PATCH 1/4] drm/i915/display/tgl+: Dispatch atomic commits instead of front buffer modifications

2021-07-30 Thread José Roberto de Souza
PSR2 selective fetch requires plane and transcoder registers to be programed during the vblank to properly update the display and there is no way around it. We could disable PSR2 at every notification of dirty front buffer from user space but that would hurt the power savings and it would still ca

Re: [Intel-gfx] [PATCH] drm/i915: Correct SFC_DONE register offset

2021-07-30 Thread Matt Roper
On Wed, Jul 28, 2021 at 06:05:57PM -0700, Matt Roper wrote: > On Wed, Jul 28, 2021 at 04:34:11PM -0700, Matt Roper wrote: > > The register offset for SFC_DONE was missing a '0' at the end, causing > > us to read from a non-existent register address. We only use this > > register in error state dum

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Fix oops in damage self-tests by mocking damage property

2021-07-30 Thread Patchwork
== Series Details == Series: drm: Fix oops in damage self-tests by mocking damage property URL : https://patchwork.freedesktop.org/series/93233/ State : success == Summary == CI Bug Log - changes from CI_DRM_10426_full -> Patchwork_20748_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc/slpc: Enable GuC based power management features (rev4)

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915/guc/slpc: Enable GuC based power management features (rev4) URL : https://patchwork.freedesktop.org/series/93026/ State : success == Summary == CI Bug Log - changes from CI_DRM_10427 -> Patchwork_20752

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc/slpc: Enable GuC based power management features (rev4)

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915/guc/slpc: Enable GuC based power management features (rev4) URL : https://patchwork.freedesktop.org/series/93026/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separatel

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc/slpc: Enable GuC based power management features (rev4)

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915/guc/slpc: Enable GuC based power management features (rev4) URL : https://patchwork.freedesktop.org/series/93026/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8fae42887a4e drm/i915/guc/slpc: Initial definitions for SLPC -:77: WARNING:FILE_

[Intel-gfx] [PATCH 14/14] drm/i915/guc/rc: Setup and enable GuCRC feature

2021-07-30 Thread Vinay Belgaumkar
This feature hands over the control of HW RC6 to the GuC. GuC decides when to put HW into RC6 based on it's internal busyness algorithms. GuCRC needs GuC submission to be enabled, and only supported on Gen12+ for now. When GuCRC is enabled, do not set HW RC6. Use a H2G message to tell GuC to enab

[Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest

2021-07-30 Thread Vinay Belgaumkar
Tests that exercise the SLPC get/set frequency interfaces. Clamp_max will set max frequency to multiple levels and check that SLPC requests frequency lower than or equal to it. Clamp_min will set min frequency to different levels and check if SLPC requests are higher or equal to those levels. v2

[Intel-gfx] [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC

2021-07-30 Thread Vinay Belgaumkar
Update the get/set min/max freq hooks to work for SLPC case as well. Consolidate helpers for requested/min/max frequency get/set to intel_rps where the proper action can be taken depending on whether SLPC is enabled. v2: Add wrappers for getting rp0/1/n frequencies, update softlimits in set min/ma

[Intel-gfx] [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits

2021-07-30 Thread Vinay Belgaumkar
Cache rp0, rp1 and rpn platform limits into SLPC structure for range checking while setting min/max frequencies. Also add "soft" limits which keep track of frequency changes made from userland. These are initially set to platform min and max. v2: Address review comments (Michal W) v3: Formatting

[Intel-gfx] [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt

2021-07-30 Thread Vinay Belgaumkar
This interrupt is enabled during RPS initialization, and now needs to be done by SLPC code. It allows ARAT timer expiry interrupts to get forwarded to GuC. v2: Fix comment (Matthew Brost) v3: checkpatch() Reviewed-by: Matthew Brost Signed-off-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/uc

[Intel-gfx] [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks

2021-07-30 Thread Vinay Belgaumkar
Add helpers to read the min/max frequency being used by SLPC. This is done by send a H2G command which forces SLPC to update the shared data struct which can then be read. These helpers will be used in a sysfs patch later on. v2: Address review comments (Michal W) v3: Return err in case of query f

[Intel-gfx] [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info

2021-07-30 Thread Vinay Belgaumkar
This prints out relevant SLPC info from the SLPC shared structure. We will send a H2G message which forces SLPC to update the shared data structure with latest information before reading it. v2: Address review comments (Michal W) v3: Remove unnecessary tasks from slpc_info (Michal W) v4: Rename f

[Intel-gfx] [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency

2021-07-30 Thread Vinay Belgaumkar
Add param set h2g helpers to set the min and max frequencies for use by SLPC. v2: Address review comments (Michal W) v3: Check for positive error code (Michal W) v4: Print generic error in set_param (Michal W) Reviewed-by: Michal Wajdeczko Signed-off-by: Sundaresan Sujaritha Signed-off-by: Vina

[Intel-gfx] [PATCH 06/14] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable

2021-07-30 Thread Vinay Belgaumkar
The assumption when it was added was that GT would not be holding any gt_pm references. However, uc_init is called from gt_init_hw, which holds a forcewake ref. If SLPC enable fails, we will still be holding this ref, which will result in the BUG_ON. Reviewed-by: Matthew Brost Signed-off-by: Vina

[Intel-gfx] [PATCH 05/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events

2021-07-30 Thread Vinay Belgaumkar
Add methods for interacting with GuC for enabling SLPC. Enable SLPC after GuC submission has been established. GuC load will fail if SLPC cannot be successfully initialized. Add various helper methods to set/unset the parameters for SLPC. They can be set using H2G calls or directly setting bits in

[Intel-gfx] [PATCH 04/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC

2021-07-30 Thread Vinay Belgaumkar
Allocate data structures for SLPC and functions for initializing on host side. v2: Address review comments (Michal W) v3: Remove unnecessary header includes (Michal W) v4: Rebase v5: Move allocation of shared data into slpc_init() (Michal W) Reviewed-by: Michal Wajdeczko Signed-off-by: Vinay Bel

[Intel-gfx] [PATCH 03/14] drm/i915/guc/slpc: Adding SLPC communication interfaces

2021-07-30 Thread Vinay Belgaumkar
Add constants and params that are needed to configure SLPC. v2: Add a new abi header for SLPC. Replace bitfields with genmasks. Address other comments from Michal W. v3: Add slpc H2G format in abi, other review commments (Michal W) v4: Update status bits according to latest spec v5: checkpatch(

[Intel-gfx] [PATCH 02/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled

2021-07-30 Thread Vinay Belgaumkar
Also ensure uc_init is called before we initialize RPS so that we can check for SLPC support. We do not need to enable up/down interrupts when SLPC is enabled. However, we still need the ARAT interrupt, which will be enabled separately later. v2: Explicitly return from intel_rps_enable with slpc c

[Intel-gfx] [PATCH 01/14] drm/i915/guc/slpc: Initial definitions for SLPC

2021-07-30 Thread Vinay Belgaumkar
Add macros to check for SLPC support. This feature is currently supported for Gen12+ and enabled whenever GuC submission is enabled/selected. Include templates for SLPC init/fini and enable. v2: Move SLPC helper functions to intel_guc_slpc.c/.h. Define basic template for SLPC structure in intel_g

[Intel-gfx] [PATCH v6 00/14] drm/i915/guc/slpc: Enable GuC based power management features

2021-07-30 Thread Vinay Belgaumkar
This series enables Single Loop Power Control (SLPC) feature in GuC. GuC implements various power management algorithms as part of it's operation. These need to be specifically enabled by KMD. They replace the legacy host based management of these features. With this series, we will enable two PM

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix syncmap memory leak

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915: Fix syncmap memory leak URL : https://patchwork.freedesktop.org/series/93245/ State : success == Summary == CI Bug Log - changes from CI_DRM_10427 -> Patchwork_20751 Summary --- **SUCCESS** N

Re: [Intel-gfx] [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest

2021-07-30 Thread Matthew Brost
On Thu, Jul 29, 2021 at 07:01:06PM -0700, Vinay Belgaumkar wrote: > Tests that exercise the SLPC get/set frequency interfaces. > > Clamp_max will set max frequency to multiple levels and check > that SLPC requests frequency lower than or equal to it. > > Clamp_min will set min frequency to differ

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp URL : https://patchwork.freedesktop.org/series/93244/ State : success == Summary == CI Bug Log - changes from CI_DRM_10427 -> Patchwork_20750 Summary --

[Intel-gfx] [PATCH] drm/i915: Fix syncmap memory leak

2021-07-30 Thread Matthew Brost
A small race exists between intel_gt_retire_requests_timeout and intel_timeline_exit which could result in the syncmap not getting free'd. Rather than work to hard to seal this race, simply cleanup the syncmap on fini. unreferenced object 0x88813bc53b18 (size 96): comm "gem_close_race", pid

Re: [Intel-gfx] [PATCH] drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp

2021-07-30 Thread Matt Roper
On Fri, Jul 30, 2021 at 12:11:15PM -0700, Lucas De Marchi wrote: > There's a missing sentinel since we are not using ARRAY_SIZE(), but rather > checking that the .start is 0 to stop the iteration in mcr_range(). > > BUG: KASAN: global-out-of-bounds in mcr_range.isra.0+0x69/0xa0 [i915] >

[Intel-gfx] [PATCH] drm/i915/xehp: Fix missing sentinel on mcr_ranges_xehp

2021-07-30 Thread Lucas De Marchi
There's a missing sentinel since we are not using ARRAY_SIZE(), but rather checking that the .start is 0 to stop the iteration in mcr_range(). BUG: KASAN: global-out-of-bounds in mcr_range.isra.0+0x69/0xa0 [i915] Read of size 4 at addr a0889928 by task modprobe/3881 Fixes:

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Check if engine has heartbeat when closing a context

2021-07-30 Thread Matthew Brost
On Fri, Jul 30, 2021 at 10:49:01AM +0100, Tvrtko Ursulin wrote: > > On 30/07/2021 01:13, John Harrison wrote: > > On 7/28/2021 17:34, Matthew Brost wrote: > > > If an engine associated with a context does not have a heartbeat, ban it > > > immediately. This is needed for GuC submission as a idle p

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Check if engine has heartbeat when closing a context

2021-07-30 Thread John Harrison
On 7/30/2021 02:49, Tvrtko Ursulin wrote: On 30/07/2021 01:13, John Harrison wrote: On 7/28/2021 17:34, Matthew Brost wrote: If an engine associated with a context does not have a heartbeat, ban it immediately. This is needed for GuC submission as a idle pulse doesn't kick the context off the

Re: [Intel-gfx] [PATCH i-g-t 1/1] i915/gem_scheduler: Ensure submission order in manycontexts

2021-07-30 Thread Matthew Brost
On Fri, Jul 30, 2021 at 10:58:38AM +0100, Tvrtko Ursulin wrote: > > On 27/07/2021 19:20, Matthew Brost wrote: > > With GuC submission contexts can get reordered (compared to submission > > order), if contexts get reordered the sequential nature of the batches > > releasing the next batch's semapho

Re: [Intel-gfx] [PATCH] drm/i915: Fix typo in comments and Kconfig.debug

2021-07-30 Thread Lucas De Marchi
On Fri, Jul 30, 2021 at 05:49:18PM +0800, Cai Huoqing wrote: Fix typo: *iff ==> if this is one that is hard to do automatically because it's also an abbreviation for "if and only if". See https://en.wikipedia.org/wiki/If_and_only_if . In the single place it was changed below, the abbreviation

Re: [Intel-gfx] [PATCH v4 12/18] drm/i915/xehpsdv: Define MOCS table for XeHP SDV

2021-07-30 Thread Matt Roper
On Fri, Jul 30, 2021 at 12:16:14AM -0700, Siddiqui, Ayaz A wrote: > > > > -Original Message- > > From: De Marchi, Lucas > > Sent: Thursday, July 29, 2021 11:01 PM > > To: Roper, Matthew D > > Cc: intel-gfx@lists.freedesktop.org; Siddiqui, Ayaz A > > ; Daniel Vetter > > Subject: Re: [In

Re: [Intel-gfx] [PATCH] drm: Fix oops in damage self-tests by mocking damage property

2021-07-30 Thread kernel test robot
e-property/20210730-175415 base: git://anongit.freedesktop.org/drm/drm-tip drm-tip config: i386-randconfig-s001-20210730 (attached as .config) compiler: gcc-10 (Ubuntu 10.3.0-1ubuntu1~20.04) 10.3.0 reproduce: # apt-get install sparse # sparse version: v0.6.3-341-g8af2

[Intel-gfx] [RFC PATCH] drm: mock_device can be static

2021-07-30 Thread kernel test robot
drivers/gpu/drm/selftests/test-drm_damage_helper.c:15:19: warning: symbol 'mock_device' was not declared. Should it be static? drivers/gpu/drm/selftests/test-drm_damage_helper.c:16:30: warning: symbol 'mock_obj_props' was not declared. Should it be static? drivers/gpu/drm/selftests/test-drm_damag

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Fix typo in comments and Kconfig.debug

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915: Fix typo in comments and Kconfig.debug URL : https://patchwork.freedesktop.org/series/93239/ State : failure == Summary == Applying: drm/i915: Fix typo in comments and Kconfig.debug Using index info to reconstruct a base tree... M drivers/gpu/drm/i9

Re: [Intel-gfx] [Mesa-dev] Requests For Proposals for hosting XDC 2022 are now open

2021-07-30 Thread Samuel Iglesias Gonsálvez
Remember before enjoying your holiday that the deadline for XDC 2022 proposals is *September 1st, 2021* :-) Feel free to submit your proposal before, so we can give you early feedback on it! Sam On Thu, 2021-07-01 at 18:14 +0200, Samuel Iglesias Gonsálvez wrote: > This is a reminder that the cal

[Intel-gfx] [PATCH] drm/i915: Fix typo in comments and Kconfig.debug

2021-07-30 Thread Cai Huoqing
Fix typo: *iff ==> if *specifc ==> specific *adjustement ==> adjustment *preferrably ==> preferably *forseeable ==> foreseeable *overwritting ==> overwriting *sempahores ==> semaphores *additonally ==> additionally *allcoated ==> allocated *contigious ==> contiguous *priorty ==> priority

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Fix oops in damage self-tests by mocking damage property

2021-07-30 Thread Patchwork
== Series Details == Series: drm: Fix oops in damage self-tests by mocking damage property URL : https://patchwork.freedesktop.org/series/93233/ State : success == Summary == CI Bug Log - changes from CI_DRM_10426 -> Patchwork_20748 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: Fix oops in damage self-tests by mocking damage property

2021-07-30 Thread Patchwork
== Series Details == Series: drm: Fix oops in damage self-tests by mocking damage property URL : https://patchwork.freedesktop.org/series/93233/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -O:d

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Fix oops in damage self-tests by mocking damage property

2021-07-30 Thread Patchwork
== Series Details == Series: drm: Fix oops in damage self-tests by mocking damage property URL : https://patchwork.freedesktop.org/series/93233/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3efd59452f81 drm: Fix oops in damage self-tests by mocking damage property -:52: ERROR:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc/slpc: Enable GuC based power management features (rev3)

2021-07-30 Thread Patchwork
== Series Details == Series: drm/i915/guc/slpc: Enable GuC based power management features (rev3) URL : https://patchwork.freedesktop.org/series/93026/ State : success == Summary == CI Bug Log - changes from CI_DRM_10421_full -> Patchwork_20747_full

Re: [Intel-gfx] [PATCH] drm/i915: Fix the 12 BPC bits for PIPE_MISC reg

2021-07-30 Thread Nautiyal, Ankit K
Hi Uma, Thanks for the comments it made me have a look at the things again, especially for DSI case. For Dithering with 12bpc, the bspec doesn’t say anything. In intel_display.c we are enabling dithering only for 6bpc panels. However, we do write the BPC in Pipe MISC based on pipe_bpp, even if

[Intel-gfx] ✓ Fi.CI.IGT: success for Remove CNL - for drm-intel-next (rev3)

2021-07-30 Thread Patchwork
== Series Details == Series: Remove CNL - for drm-intel-next (rev3) URL : https://patchwork.freedesktop.org/series/93142/ State : success == Summary == CI Bug Log - changes from CI_DRM_10420_full -> Patchwork_20746_full Summary --- *

Re: [Intel-gfx] [PATCH i-g-t 1/1] i915/gem_scheduler: Ensure submission order in manycontexts

2021-07-30 Thread Tvrtko Ursulin
On 27/07/2021 19:20, Matthew Brost wrote: With GuC submission contexts can get reordered (compared to submission order), if contexts get reordered the sequential nature of the batches releasing the next batch's semaphore in function timesliceN() get broken resulting in the test taking much long

[Intel-gfx] [PATCH] drm: Fix oops in damage self-tests by mocking damage property

2021-07-30 Thread Daniel Vetter
I've added a new check to make sure that drivers which insepct the damage property have it set up correctly, but somehow missed that this borke the damage selftest in the CI result noise. Fix it up by mocking enough of drm_device and drm_plane so we can call drm_plane_enable_fb_damage_clips() to m

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Check if engine has heartbeat when closing a context

2021-07-30 Thread Tvrtko Ursulin
On 30/07/2021 01:13, John Harrison wrote: On 7/28/2021 17:34, Matthew Brost wrote: If an engine associated with a context does not have a heartbeat, ban it immediately. This is needed for GuC submission as a idle pulse doesn't kick the context off the hardware where it then can check for a hea

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port()

2021-07-30 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port() URL : https://patchwork.freedesktop.org/series/93210/ State : success == Summary == CI Bug Log - changes from CI_DRM_10420_full -> Patchwork_20745_full

[Intel-gfx] [PATCH i-g-t v3 11/11] tests/i915/gem_exec_fence: use device_coherent mmap

2021-07-30 Thread Matthew Auld
We lost explicit WC mmaps on discrete, where we now only support FIXED, however such mappings should be device coherent. In gem_exec_fence it looks like we can just use mmap__device_coherent, which should also work on discrete platforms, while still using an explicit WC mmap on integrated platforms

[Intel-gfx] [PATCH i-g-t v3 10/11] lib/i915/gem_mman: add helper query for has_device_coherent

2021-07-30 Thread Matthew Auld
Might be useful in some tests, where we are not explicitly testing WC maps, but rather just require something that is "device coherent", which should also play nice on discrete platforms. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C -

[Intel-gfx] [PATCH i-g-t v3 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete

2021-07-30 Thread Matthew Auld
We can no longer just call get_caching or set_domain, and the mmap mode must be FIXED. This should bring back gem_exec_basic and a few others in CI on DG1. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/ioctl_wrappers.c | 25 ++

[Intel-gfx] [PATCH i-g-t v3 08/11] lib/ioctl_wrappers: update set_domain for discrete

2021-07-30 Thread Matthew Auld
On discrete set_domain is now gone, instead we just need to add the wait. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/ioctl_wrappers.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/lib/ioctl_wrapp

[Intel-gfx] [PATCH i-g-t v3 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED

2021-07-30 Thread Matthew Auld
We need to also iterate the fixed mode in the tests which rely on this. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.

[Intel-gfx] [PATCH i-g-t v3 07/11] lib/intel_bufops: update mmap_{read, write} for discrete

2021-07-30 Thread Matthew Auld
On discrete we can no longer call get_caching or set_domain, and the mmap mode must be FIXED. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/intel_bufops.c | 25 +++-- 1 file changed, 23 insertions(+), 2 del

[Intel-gfx] [PATCH i-g-t v3 09/11] tests/i915/module_load: update for discrete

2021-07-30 Thread Matthew Auld
The set_caching ioctl is gone for discrete, and now just returns -ENODEV. Update the gem_sanitycheck to account for that. After this we should be back to just having the breakage caused by missing reloc support for the reload testcase. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashuto

[Intel-gfx] [PATCH i-g-t v3 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu

2021-07-30 Thread Matthew Auld
On discrete we only support the new fixed mode. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c

[Intel-gfx] [PATCH i-g-t v3 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent

2021-07-30 Thread Matthew Auld
On discrete we need to fallback to this mode. v2(Ashutosh): - Move it up the pecking order Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/

[Intel-gfx] [PATCH i-g-t v3 03/11] lib/i915/gem_mman: add fixed mode to gem_mmap_offset__cpu

2021-07-30 Thread Matthew Auld
On discrete we only support the new fixed mode. Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c

[Intel-gfx] [PATCH i-g-t v3 01/11] lib/i915/gem_mman: add FIXED mmap mode

2021-07-30 Thread Matthew Auld
We need this for discrete. v2(Ashutosh): - use the new i915_drm_local.h infrastructure, and drop the LOCAL prefix Signed-off-by: Matthew Auld Cc: Maarten Lankhorst Cc: Ashutosh Dixit Cc: Daniel Vetter Cc: Ramalingam C --- lib/i915/gem_mman.c | 36

[Intel-gfx] ✓ Fi.CI.IGT: success for Forcewake and shadowed register updates (rev2)

2021-07-30 Thread Patchwork
== Series Details == Series: Forcewake and shadowed register updates (rev2) URL : https://patchwork.freedesktop.org/series/93158/ State : success == Summary == CI Bug Log - changes from CI_DRM_10420_full -> Patchwork_20742_full Summary

Re: [Intel-gfx] [PATCH v4 12/18] drm/i915/xehpsdv: Define MOCS table for XeHP SDV

2021-07-30 Thread Siddiqui, Ayaz A
> -Original Message- > From: De Marchi, Lucas > Sent: Thursday, July 29, 2021 11:01 PM > To: Roper, Matthew D > Cc: intel-gfx@lists.freedesktop.org; Siddiqui, Ayaz A > ; Daniel Vetter > Subject: Re: [Intel-gfx] [PATCH v4 12/18] drm/i915/xehpsdv: Define MOCS > table for XeHP SDV > > O