Re: [Intel-gfx] [PATCH 15/18] drm/i915/guc: Ensure H2G buffer updates visible before tail update

On 28.05.2021 03:13, John Harrison wrote: > On 5/26/2021 10:58, Matthew Brost wrote: >> On Wed, May 26, 2021 at 02:36:18PM +0200, Michal Wajdeczko wrote: >>> On 26.05.2021 08:42, Matthew Brost wrote: Ensure H2G buffer updates are visible before descriptor tail updates by inserting a bar

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: add error message for ENOSPC

== Series Details == Series: drm: add error message for ENOSPC URL : https://patchwork.freedesktop.org/series/90659/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10140_full -> Patchwork_20221_full Summary --- **FAIL

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_color: Fix pipe degamma subtests

We need to collect CRC with no degamma transformation and after drawing gradient with degamma LUT. This patch makes subtest pipe degamma code similar to pipe gamma is written. Signed-off-by: Vidya Srinivas --- tests/kms_color.c | 12 ++-- 1 file changed, 2 insertions(+), 10 deletions(-)

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_prime: Aligned pitch to 64 byte for Intel platforms

For Intel platforms, pitch needs to be 64 byte aligned. Kernel code vgem_gem_dumb_create which is platform generic code doesnt do the alignment. This causes frame buffer creation to fail on Intel platforms where the pitch is not 64 byte aligned. tests: test run on Intel platforms with panel resolu

[Intel-gfx] [PATCH i-g-t] [RFC] tests/drm_read: Fix subtest invalid-buffer

Using (void *)-1 directly in read is aborting on chrome systems. Following message is seen. Starting subtest: invalid-buffer *** buffer overflow detected ***: terminated Received signal SIGABRT. Stack trace: Aborted (core dumped) Patch just adds a pointer variable and uses it in read. Signed-off

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on few Gen11 systems. Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c index b35727a09bd0..f90363c3beb2 10

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_flip.c: Fix subtests flip-vs-suspend

Some Intel Gen11 systems are not able to do a RTC wake. Instead change the default SUSPEND_TEST_NONE to SUSPEND_TEST_PLATFORM. Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 8f7366

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Add a prefetching memcpy_from_wc

== Series Details == Series: drm: Add a prefetching memcpy_from_wc URL : https://patchwork.freedesktop.org/series/90656/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10140_full -> Patchwork_20220_full Summary --- **

Re: [Intel-gfx] [PATCH 15/18] drm/i915/guc: Ensure H2G buffer updates visible before tail update

On 5/26/2021 10:58, Matthew Brost wrote: On Wed, May 26, 2021 at 02:36:18PM +0200, Michal Wajdeczko wrote: On 26.05.2021 08:42, Matthew Brost wrote: Ensure H2G buffer updates are visible before descriptor tail updates by inserting a barrier between the H2G buffer update and the tail. The barrie

[Intel-gfx] [PATCH v4 1/1] drm/i915/dg1: Add HWMON power sensor support

As part of the System Managemenent Interface (SMI), use the HWMON subsystem to display power utilization. The following standard HWMON power sensors are currently supported (and appropriately scaled): /sys/class/drm/card0/device/hwmon/hwmon - energy1_input - power1_cap -

[Intel-gfx] [PATCH v4 0/1] drm/i915/dg1: Add HWMON power sensor support

drm/i915/dg1: Add HWMON power support As part of the System Managemenent Interface (SMI), use the HWMON subsystem to display power utilization. The following standard HWMON entries are currently supported (and appropriately scaled): /sys/class/drm/card0/device/hwmon/hwmon - energy1_input

[Intel-gfx] [PATCH v4 1/1] drm/i915/dg1: Add HWMON power sensor support

As part of the System Managemenent Interface (SMI), use the HWMON subsystem to display power utilization. The following standard HWMON power sensors are currently supported (and appropriately scaled): /sys/class/drm/card0/device/hwmon/hwmon - energy1_input - power1_cap -

[Intel-gfx] [PATCH v4 0/1] drm/i915/dg1: Add HWMON power sensor support

drm/i915/dg1: Add HWMON power support As part of the System Managemenent Interface (SMI), use the HWMON subsystem to display power utilization. The following standard HWMON entries are currently supported (and appropriately scaled): /sys/class/drm/card0/device/hwmon/hwmon - energy1_input

Re: [Intel-gfx] [PATCH 11/11] drm/tiny: drm_gem_simple_display_pipe_prepare_fb is the default

On Fri, May 21, 2021 at 11:10 AM Daniel Vetter wrote: > Goes through all the drivers and deletes the default hook since it's > the default now. > > Signed-off-by: Daniel Vetter > Cc: Joel Stanley > Cc: Andrew Jeffery > Cc: "Noralf Trønnes" > Cc: Linus Walleij > Cc: Emma Anholt > Cc: David L

[Intel-gfx] [PATCH v4 1/1] drm/i915/dg1: Add HWMON power sensor support

As part of the System Managemenent Interface (SMI), use the HWMON subsystem to display power utilization. The following standard HWMON power sensors are currently supported (and appropriately scaled): /sys/class/drm/card0/device/hwmon/hwmon - energy1_input - power1_cap -

[Intel-gfx] [PATCH v4 0/1] drm/i915/dg1: Add HWMON power sensor support

drm/i915/dg1: Add HWMON power support As part of the System Managemenent Interface (SMI), use the HWMON subsystem to display power utilization. The following standard HWMON entries are currently supported (and appropriately scaled): /sys/class/drm/card0/device/hwmon/hwmon - energy1_input

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v6,RESEND,1/3] gpu: drm: separate panel orientation property creating and value setting

== Series Details == Series: series starting with [v6,RESEND,1/3] gpu: drm: separate panel orientation property creating and value setting URL : https://patchwork.freedesktop.org/series/90652/ State : success == Summary == CI Bug Log - changes from CI_DRM_10139_full -> Patchwork_20219_full ==

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "i915: use io_mapping_map_user"

== Series Details == Series: Revert "i915: use io_mapping_map_user" URL : https://patchwork.freedesktop.org/series/90696/ State : success == Summary == CI Bug Log - changes from CI_DRM_10145 -> Patchwork_20229 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Revert "i915: use io_mapping_map_user"

== Series Details == Series: Revert "i915: use io_mapping_map_user" URL : https://patchwork.freedesktop.org/series/90696/ State : warning == Summary == $ dim checkpatch origin/drm-tip 479d445cbfa3 Revert "i915: use io_mapping_map_user" -:8: ERROR:GIT_COMMIT_ID: Please use git commit descriptio

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies

Re-reported. -Original Message- From: Deak, Imre Sent: Thursday, May 27, 2021 10:50 AM To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana ; Sarvela, Tomi P Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies Hi Lakshmi,

[Intel-gfx] ✓ Fi.CI.BAT: success for Finish conversion to GRAPHICS_VER

== Series Details == Series: Finish conversion to GRAPHICS_VER URL : https://patchwork.freedesktop.org/series/90693/ State : success == Summary == CI Bug Log - changes from CI_DRM_10145 -> Patchwork_20228 Summary --- **SUCCESS** N

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Finish conversion to GRAPHICS_VER

== Series Details == Series: Finish conversion to GRAPHICS_VER URL : https://patchwork.freedesktop.org/series/90693/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/display/

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Finish conversion to GRAPHICS_VER

== Series Details == Series: Finish conversion to GRAPHICS_VER URL : https://patchwork.freedesktop.org/series/90693/ State : warning == Summary == $ dim checkpatch origin/drm-tip c7eb65fd23b6 drm/i915/gt: replace IS_GEN and friends with IS_GRAPHICS_VER -:2316: WARNING:LONG_LINE: line length of

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gem: ioctl clean-ups (rev5)

== Series Details == Series: drm/i915/gem: ioctl clean-ups (rev5) URL : https://patchwork.freedesktop.org/series/89443/ State : failure == Summary == Applying: drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE Applying: drm/i915: Stop storing the ring size in the ring pointer (v2) Applying: drm/i915:

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Move LMEM (VRAM) management over to TTM

== Series Details == Series: Move LMEM (VRAM) management over to TTM URL : https://patchwork.freedesktop.org/series/90681/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies

== Series Details == Series: drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies URL : https://patchwork.freedesktop.org/series/90631/ State : success == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20215_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies

== Series Details == Series: drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies URL : https://patchwork.freedesktop.org/series/90631/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20215_full

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/ttm: Fix swapping dereferences of freed memory

== Series Details == Series: drm/ttm: Fix swapping dereferences of freed memory URL : https://patchwork.freedesktop.org/series/90673/ State : failure == Summary == Applying: drm/ttm: Fix swapping dereferences of freed memory error: sha1 information is lacking or useless (drivers/gpu/drm/ttm/tt

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies

== Series Details == Series: drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies URL : https://patchwork.freedesktop.org/series/90631/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20215_full

Re: [Intel-gfx] [RFC PATCH 24/97] drm/i915/guc: Add flag for mark broken CTB

On Thu, May 06, 2021 at 12:13:38PM -0700, Matthew Brost wrote: > From: Michal Wajdeczko > > Once CTB descriptor is found in error state, either set by GuC > or us, there is no need continue checking descriptor any more, > we can rely on our internal flag. > > Signed-off-by: Michal Wajdeczko > S

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload

Re-reported. -Original Message- From: Deak, Imre Sent: Thursday, May 27, 2021 11:04 AM To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana Subject: Re: ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload O

[Intel-gfx] [PATCH] Revert "i915: use io_mapping_map_user"

This reverts commit b739f125e4ebd73d10ed30a856574e13649119ed. We are unfortunately seeing more issues like we did in 293837b9ac8d ("Revert "i915: fix remap_io_sg to verify the pgprot""), except this is now for the vm_fault_gtt path, where we are now hitting the same BUG_ON(!pte_none(*pte)): [1088

[Intel-gfx] ✗ Fi.CI.BAT: failure for shmem helpers for vgem

== Series Details == Series: shmem helpers for vgem URL : https://patchwork.freedesktop.org/series/90670/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10143 -> Patchwork_20224 Summary --- **FAILURE** Serious unkn

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload

== Series Details == Series: series starting with [1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload URL : https://patchwork.freedesktop.org/series/90613/ State : success == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20207_full ==

Re: [Intel-gfx] [PATCH 20/29] drm/i915/gem: Make an alignment check more sensible

On Thu, May 27, 2021 at 11:26:41AM -0500, Jason Ekstrand wrote: > What we really want to check is that size of the engines array, i.e. > args->size - sizeof(*user) is divisible by the element size, i.e. > sizeof(*user->engines) because that's what's required for computing the > array length right b

Re: [Intel-gfx] [PATCH 19/29] drm/i915: Add an i915_gem_vm_lookup helper

On Thu, May 27, 2021 at 11:26:40AM -0500, Jason Ekstrand wrote: > This is the VM equivalent of i915_gem_context_lookup. It's only used > once in this patch but future patches will need to duplicate this lookup > code so it's better to have it in a helper. > > Signed-off-by: Jason Ekstrand Revie

[Intel-gfx] ✓ Fi.CI.IGT: success for Resend More DMC cleanup

== Series Details == Series: Resend More DMC cleanup URL : https://patchwork.freedesktop.org/series/90635/ State : success == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20217_full Summary --- **SUCCESS** N

[Intel-gfx] [PATCH 5/7] drm/i915: replace IS_GEN and friends with IS_GRAPHICS_VER

This was done by the following semantic patch: @@ expression dev_priv, E; @@ - INTEL_GEN(dev_priv) == E + IS_GRAPHICS_VER(dev_priv, E) @@ expression dev_priv; @@ - INTEL_GEN(dev_priv) + GRAPHICS_VER(dev_priv) @@ expression dev_priv; express

[Intel-gfx] [PATCH 7/7] drm/i915/display: replace IS_GEN() in commented code

Since we are replacing IS_GEN() with GRAPHICS_VER(), make sure we take care of the comments as well. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_tv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/g

[Intel-gfx] [PATCH 6/7] drm/i915: Add remaining conversions to GRAPHICS_VER

For some reason coccinelle misses a few cases in header files with calls to INTEL_GEN()/IS_GEN(). Do a manual conversion for those. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_drv.h | 35 - drivers/gpu/drm/i915/i915_reg.h | 26

[Intel-gfx] [PATCH 3/7] drm/i915/gem: replace IS_GEN and friends with IS_GRAPHICS_VER

This was done by the following semantic patch: @@ expression dev_priv, E; @@ - INTEL_GEN(dev_priv) == E + IS_GRAPHICS_VER(dev_priv, E) @@ expression dev_priv; @@ - INTEL_GEN(dev_priv) + GRAPHICS_VER(dev_priv) @@ expression dev_priv; express

[Intel-gfx] [PATCH 1/7] drm/i915/gt: replace IS_GEN and friends with IS_GRAPHICS_VER

This was done by the following semantic patch: @@ expression dev_priv, E; @@ - INTEL_GEN(dev_priv) == E + IS_GRAPHICS_VER(dev_priv, E) @@ expression dev_priv; @@ - INTEL_GEN(dev_priv) + GRAPHICS_VER(dev_priv) @@ expression dev_priv; express

[Intel-gfx] [PATCH 4/7] drm/i915/gvt: replace IS_GEN and friends with IS_GRAPHICS_VER

This was done by the following semantic patch: @@ expression dev_priv, E; @@ - INTEL_GEN(dev_priv) == E + IS_GRAPHICS_VER(dev_priv, E) @@ expression dev_priv; @@ - INTEL_GEN(dev_priv) + GRAPHICS_VER(dev_priv) @@ expression dev_priv; express

[Intel-gfx] [PATCH 2/7] drm/i915/gt: Add remaining conversions to GRAPHICS_VER

For some reason coccinelle misses a few cases in gt with calls to INTEL_GEN()/IS_GEN(). Do a manual conversion for those. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 2 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 4 ++-- drivers/gpu/drm/i915/gt/intel_s

[Intel-gfx] [PATCH 0/7] Finish conversion to GRAPHICS_VER

Latest version of previous series "drm/i915: Extend GEN renames to the rest of the driver" (https://patchwork.freedesktop.org/series/88825/) dropped one patch converting all the instances of IS_GEN() and INTEL_GEN() to GRAPHICS_VER() due to the patches changing the meaning of the macros IS_GRAPHICS

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for shmem helpers for vgem

== Series Details == Series: shmem helpers for vgem URL : https://patchwork.freedesktop.org/series/90670/ State : warning == Summary == $ dim checkpatch origin/drm-tip c1ff21db4f2a dma-buf: Require VM_PFNMAP vma for mmap -:34: WARNING:TYPO_SPELLING: 'entires' may be misspelled - perhaps 'entri

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload

On Thu, May 27, 2021 at 10:02:11AM +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915/ddi: Flush encoder power domain > ref puts during driver unload > URL : https://patchwork.freedesktop.org/series/90613/ > State : failure > > == Summary == > > CI

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies

Hi Lakshmi, Tomi, On Thu, May 27, 2021 at 04:21:06PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies > URL : https://patchwork.freedesktop.org/series/90631/ > State : failure > > == Summary == > > CI Bug Log - cha

Re: [Intel-gfx] [PATCH 06/18] drm/i915/guc: Drop guc->interrupts.enabled

On Thu, May 27, 2021 at 10:17:20AM -0700, John Harrison wrote: > On 5/25/2021 23:42, Matthew Brost wrote: > > Drop the variable guc->interrupts.enabled as this variable is just > > leading to bugs creeping into the code. > > > > e.g. A full GPU reset disables the GuC interrupts but forgot to clear

[Intel-gfx] ✓ Fi.CI.IGT: success for A couple more prerequisite patches to GuC submission

== Series Details == Series: A couple more prerequisite patches to GuC submission URL : https://patchwork.freedesktop.org/series/90633/ State : success == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20216_full Summar

Re: [Intel-gfx] [PATCH 06/18] drm/i915/guc: Drop guc->interrupts.enabled

On 5/25/2021 23:42, Matthew Brost wrote: Drop the variable guc->interrupts.enabled as this variable is just leading to bugs creeping into the code. e.g. A full GPU reset disables the GuC interrupts but forgot to clear guc->interrupts.enabled, guc->interrupts.enabled being true suppresses interru

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Non-interface changing GuC CTBs updates (rev2)

On Thu, May 27, 2021 at 10:13:21AM -0700, John Harrison wrote: > On 5/25/2021 23:42, Patchwork wrote: > > == Series Details == > > > > Series: Non-interface changing GuC CTBs updates (rev2) > > URL : https://patchwork.freedesktop.org/series/90552/ > > State : warning > > > > == Summary == > >

Re: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Non-interface changing GuC CTBs updates (rev2)

On Thu, May 27, 2021 at 10:13:11AM -0700, John Harrison wrote: > AFAICT, none of these warnings are related to this patch set. > Yep, other series submitted around the same time as this had the same warnings. > John. > > > On 5/25/2021 23:43, Patchwork wrote: > > == Series Details == > > > >

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Non-interface changing GuC CTBs updates (rev2)

On 5/25/2021 23:42, Patchwork wrote: == Series Details == Series: Non-interface changing GuC CTBs updates (rev2) URL : https://patchwork.freedesktop.org/series/90552/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6b6bffd59ced drm/i915/guc: skip disabling CTBs before sanitizin

Re: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Non-interface changing GuC CTBs updates (rev2)

AFAICT, none of these warnings are related to this patch set. John. On 5/25/2021 23:43, Patchwork wrote: == Series Details == Series: Non-interface changing GuC CTBs updates (rev2) URL : https://patchwork.freedesktop.org/series/90552/ State : warning == Summary == $ dim sparse --fast orig

Re: [Intel-gfx] [RFC PATCH 60/97] drm/i915: Track 'serial' counts for virtual engines

On 5/27/2021 01:53, Tvrtko Ursulin wrote: On 26/05/2021 19:45, John Harrison wrote: On 5/26/2021 01:40, Tvrtko Ursulin wrote: On 25/05/2021 18:52, Matthew Brost wrote: On Tue, May 25, 2021 at 11:16:12AM +0100, Tvrtko Ursulin wrote: On 06/05/2021 20:14, Matthew Brost wrote: From: John Harris

[Intel-gfx] [PATCH 17/29] drm/i915/gem: Rework error handling in default_engines

Since free_engines works for partially constructed engine sets, we can use the usual goto pattern. Signed-off-by: Jason Ekstrand Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/g

[Intel-gfx] [PATCH 14/29] drm/i915/gem: Add a separate validate_priority helper

With the proto-context stuff added later in this series, we end up having to duplicate set_priority. This lets us avoid duplicating the validation logic. Signed-off-by: Jason Ekstrand Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 42 + 1 file

[Intel-gfx] [PATCH 27/29] drm/i915/selftests: Take a VM in kernel_context()

This better models where we want to go with contexts in general where things like the VM and engine set are create parameters instead of being set after the fact. Signed-off-by: Jason Ekstrand --- .../drm/i915/gem/selftests/i915_gem_context.c | 4 ++-- .../gpu/drm/i915/gem/selftests/mock_contex

[Intel-gfx] [PATCH 26/29] drm/i915/gem: Don't allow changing the engine set on running contexts (v2)

When the APIs were added to manage the engine set on a GEM context directly from userspace, the questionable choice was made to allow changing the engine set on a context at any time. This is horribly racy and there's absolutely no reason why any userspace would want to do this outside of trying t

[Intel-gfx] [PATCH 28/29] i915/gem/selftests: Assign the VM at context creation in igt_shared_ctx_exec

We want to delete __assign_ppgtt and, generally, stop setting the VM after context creation. This is the one place I could find in the selftests where we set a VM after the fact. Signed-off-by: Jason Ekstrand --- drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 6 +- 1 file changed,

[Intel-gfx] [PATCH 19/29] drm/i915: Add an i915_gem_vm_lookup helper

This is the VM equivalent of i915_gem_context_lookup. It's only used once in this patch but future patches will need to duplicate this lookup code so it's better to have it in a helper. Signed-off-by: Jason Ekstrand --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +- drivers/gpu/drm/i9

[Intel-gfx] [PATCH 29/29] drm/i915/gem: Roll all of context creation together

Now that we have the whole engine set and VM at context creation time, we can just assign those fields instead of creating first and handling the VM and engines later. This lets us avoid creating useless VMs and engine sets and lets us get rid of the complex VM setting code. Signed-off-by: Jason

[Intel-gfx] [PATCH 10/29] drm/i915/gem: Remove engine auto-magic with FENCE_SUBMIT (v2)

Even though FENCE_SUBMIT is only documented to wait until the request in the in-fence starts instead of waiting until it completes, it has a bit more magic than that. If FENCE_SUBMIT is used to submit something to a balanced engine, we would wait to assign engines until the primary request was rea

[Intel-gfx] [PATCH 12/29] drm/i915/gem: Disallow creating contexts with too many engines

There's no sense in allowing userspace to create more engines than it can possibly access via execbuf. Signed-off-by: Jason Ekstrand Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 25/29] drm/i915/gem: Don't allow changing the VM on running contexts (v2)

When the APIs were added to manage VMs more directly from userspace, the questionable choice was made to allow changing out the VM on a context at any time. This is horribly racy and there's absolutely no reason why any userspace would want to do this outside of testing that exact race. By removin

[Intel-gfx] [PATCH 24/29] drm/i915/gem: Delay context creation

The current context uAPI allows for two methods of setting context parameters: SET_CONTEXT_PARAM and CONTEXT_CREATE_EXT_SETPARAM. The former is allowed to be called at any time while the later happens as part of GEM_CONTEXT_CREATE. Currently, everything settable via one is settable via the other.

[Intel-gfx] [PATCH 13/29] drm/i915: Stop manually RCU banging in reset_stats_ioctl (v2)

As far as I can tell, the only real reason for this is to avoid taking a reference to the i915_gem_context. The cost of those two atomics probably pales in comparison to the cost of the ioctl itself so we're really not buying ourselves anything here. We're about to make context lookup a tiny bit

[Intel-gfx] [PATCH 23/29] drm/i915/gt: Drop i915_address_space::file (v2)

There's a big comment saying how useful it is but no one is using this for anything anymore. It was added in 2bfa996e031b ("drm/i915: Store owning file on the i915_address_space") and used for debugfs at the time as well as telling the difference between the global GTT and a PPGTT. In f6e8aa38717

[Intel-gfx] [PATCH 21/29] drm/i915/gem: Use the proto-context to handle create parameters (v2)

This means that the proto-context needs to grow support for engine configuration information as well as setparam logic. Fortunately, we'll be deleting a lot of setparam logic on the primary context shortly so it will hopefully balance out. There's an extra bit of fun here when it comes to setting

[Intel-gfx] [PATCH 20/29] drm/i915/gem: Make an alignment check more sensible

What we really want to check is that size of the engines array, i.e. args->size - sizeof(*user) is divisible by the element size, i.e. sizeof(*user->engines) because that's what's required for computing the array length right below the check. However, we're currently not doing this and instead doi

[Intel-gfx] [PATCH 22/29] drm/i915/gem: Return an error ptr from context_lookup

We're about to start doing lazy context creation which means contexts get created in i915_gem_context_lookup and we may start having more errors than -ENOENT. Signed-off-by: Jason Ekstrand Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/gem/i915_gem_context.c| 12 ++-- drivers/g

[Intel-gfx] [PATCH 18/29] drm/i915/gem: Optionally set SSEU in intel_context_set_gem

For now this is a no-op because everyone passes in a null SSEU but it lets us get some of the error handling and selftest refactoring plumbed through. Signed-off-by: Jason Ekstrand --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 41 +++ .../gpu/drm/i915/gem/selftests/mock_con

[Intel-gfx] [PATCH 16/29] drm/i915/gem: Add an intermediate proto_context struct

The current context uAPI allows for two methods of setting context parameters: SET_CONTEXT_PARAM and CONTEXT_CREATE_EXT_SETPARAM. The former is allowed to be called at any time while the later happens as part of GEM_CONTEXT_CREATE. Currently, everything settable via one is settable via the other.

[Intel-gfx] [PATCH 15/29] drm/i915: Add gem/i915_gem_context.h to the docs

In order to prevent kernel doc warnings, also fill out docs for any missing fields and fix those that forgot the "@". Signed-off-by: Jason Ekstrand Reviewed-by: Daniel Vetter --- Documentation/gpu/i915.rst| 2 + .../gpu/drm/i915/gem/i915_gem_context_types.h | 43 +++

[Intel-gfx] [PATCH 11/29] drm/i915/request: Remove the hook from await_execution

This was only ever used for FENCE_SUBMIT automatic engine selection which was removed in the previous commit. Signed-off-by: Jason Ekstrand Reviewed-by: Daniel Vetter --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 3 +- drivers/gpu/drm/i915/i915_request.c | 42 --

[Intel-gfx] [PATCH 09/29] drm/i915/gem: Disallow bonding of virtual engines (v3)

This adds a bunch of complexity which the media driver has never actually used. The media driver does technically bond a balanced engine to another engine but the balanced engine only has one engine in the sibling set. This doesn't actually result in a virtual engine. This functionality was orig

[Intel-gfx] [PATCH 08/29] drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES

This has never been used by any userspace except IGT and provides no real functionality beyond parroting back parameters userspace passed in as part of context creation or via setparam. If the context is in legacy mode (where you use I915_EXEC_RENDER and friends), it returns success with zero data

[Intel-gfx] [PATCH 05/29] drm/i915/gem: Return void from context_apply_all

None of the callbacks we use with it return an error code anymore; they all return 0 unconditionally. Signed-off-by: Jason Ekstrand Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 26 +++-- 1 file changed, 8 insertions(+), 18 deletions(-) diff --git

[Intel-gfx] [PATCH 06/29] drm/i915: Drop the CONTEXT_CLONE API (v2)

This API allows one context to grab bits out of another context upon creation. It can be used as a short-cut for setparam(getparam()) for things like I915_CONTEXT_PARAM_VM. However, it's never been used by any real userspace. It's used by a few IGT tests and that's it. Since it doesn't add any

[Intel-gfx] [PATCH 07/29] drm/i915: Implement SINGLE_TIMELINE with a syncobj (v4)

This API is entirely unnecessary and I'd love to get rid of it. If userspace wants a single timeline across multiple contexts, they can either use implicit synchronization or a syncobj, both of which existed at the time this feature landed. The justification given at the time was that it would he

[Intel-gfx] [PATCH 03/29] drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP

The idea behind this param is to support OpenCL drivers with relocations because OpenCL reserves 0x0 for NULL and, if we placed memory there, it would confuse CL kernels. It was originally sent out as part of a patch series including libdrm [1] and Beignet [2] support. However, the libdrm and Bei

[Intel-gfx] [PATCH 04/29] drm/i915/gem: Set the watchdog timeout directly in intel_context_set_gem (v2)

Instead of handling it like a context param, unconditionally set it when intel_contexts are created. For years we've had the idea of a watchdog uAPI floating about. The aim was for media, so that they could set very tight deadlines for their transcodes jobs, so that if you have a corrupt bitstream

[Intel-gfx] [PATCH 02/29] drm/i915: Stop storing the ring size in the ring pointer (v2)

Previously, we were storing the ring size in the ring pointer before it was actually allocated. We would then guard setting the ring size on checking for CONTEXT_ALLOC_BIT. This is error-prone at best and really only saves us a few bytes on something that already burns at least 4K. Instead, this

[Intel-gfx] [PATCH 01/29] drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE

This reverts commit 88be76cdafc7 ("drm/i915: Allow userspace to specify ringsize on construction"). This API was originally added for OpenCL but the compute-runtime PR has sat open for a year without action so we can still pull it out if we want. I argue we should drop it for three reasons: 1.

[Intel-gfx] [PATCH 00/29] drm/i915/gem: ioctl clean-ups (v6)

Overview: - This patch series attempts to clean up some of the IOCTL mess we've created over the last few years. The most egregious bit being context mutability. In summary, this series: 1. Drops two never-used context params: RINGSIZE and NO_ZEROMAP 2. Drops the entire CONTEXT_CLONE A

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies

== Series Details == Series: drm/i915/adlp: Add missing TBT AUX -> PW#2 power domain dependencies URL : https://patchwork.freedesktop.org/series/90631/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20215_full

Re: [Intel-gfx] [PATCH 3/4] drm/shmem-helper: Switch to vmf_insert_pfn

Hi Daniel, I love your patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next linus/master v5.13-rc3 next-20210527] [cannot apply to drm/drm-next] [If your patch is

Re: [Intel-gfx] [RFC PATCH] drm/ttm: Fix swapping dereferences of freed memory

On Thu, 2021-05-27 at 17:32 +0200, Christian König wrote: > Am 27.05.21 um 17:05 schrieb Thomas Hellström: > > On Thu, 2021-05-27 at 17:01 +0200, Thomas Hellström wrote: > > > On Thu, 2021-05-27 at 16:54 +0200, Christian König wrote: > > > > Am 27.05.21 um 16:19 schrieb Thomas Hellström: > > > > >

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on few Gen11 systems. Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b/t

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_flip: Some Gen11 systems are not able to get RTC WAKE work well. SUSPEND_TEST_NONE goes to RTC Wake. Instead change it to SUSPEND_TEST_PLATFORM.

Change-Id: I80930185a8799578bbec0123a389074af1edfb5d Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 8f736652be90..8afac88c9b15 100755 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c @

Re: [Intel-gfx] [PATCH 5/7] dma-buf: Add an API for exporting sync files (v11)

On Thu, May 27, 2021 at 4:49 AM Christian König wrote: > > Am 26.05.21 um 19:42 schrieb Jason Ekstrand: > > On Wed, May 26, 2021 at 6:02 AM Christian König > > wrote: > >> Regarding that, why do we actually use a syncfile and not a drm_syncobj > >> here? > > A sync file is a userspace handle to a

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on few Gen11 systems. Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b/t

Re: [Intel-gfx] [RFC PATCH] drm/ttm: Fix swapping dereferences of freed memory

Am 27.05.21 um 17:05 schrieb Thomas Hellström: On Thu, 2021-05-27 at 17:01 +0200, Thomas Hellström wrote: On Thu, 2021-05-27 at 16:54 +0200, Christian König wrote: Am 27.05.21 um 16:19 schrieb Thomas Hellström: The swapping code was dereference bo->ttm pointers without having the dma-resv lock

[Intel-gfx] [PATCH i-g-t] [RFC] tests/kms_flip: Some Gen11 systems are not able to get RTC WAKE work well. SUSPEND_TEST_NONE goes to RTC Wake. Instead change it to SUSPEND_TEST_PLATFORM.

Change-Id: I80930185a8799578bbec0123a389074af1edfb5d Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 64907c2c17a5..42a3048cc11a 100755 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c @

[Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce i915_sched_engine object

== Series Details == Series: Introduce i915_sched_engine object URL : https://patchwork.freedesktop.org/series/90630/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10138_full -> Patchwork_20214_full Summary --- **FAI

[Intel-gfx] [PATCH] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Without wait for vblank, CRC mismatch is seen between big and small CRC on some Gen11 systems Change-Id: I3bec931aa901130997e693ac1cacf389e2a8100f Signed-off-by: Vidya Srinivas --- tests/kms_big_fb.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/kms_big_fb.c b/t

Re: [Intel-gfx] [RFC PATCH] drm/ttm: Fix swapping dereferences of freed memory

Am 27.05.21 um 17:01 schrieb Thomas Hellström: On Thu, 2021-05-27 at 16:54 +0200, Christian König wrote: Am 27.05.21 um 16:19 schrieb Thomas Hellström: The swapping code was dereference bo->ttm pointers without having the dma-resv lock held. Also it might try to swap out unpopulated bos. Fix t

[Intel-gfx] [PATCH] [RFC] tests/kms_flip: Some Gen11 systems are not able to get RTC WAKE work well. SUSPEND_TEST_NONE goes to RTC Wake. Instead change it to SUSPEND_TEST_PLATFORM.

Change-Id: I80930185a8799578bbec0123a389074af1edfb5d Signed-off-by: Vidya Srinivas --- tests/kms_flip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_flip.c b/tests/kms_flip.c index 64907c2c17a5..4d45dd77e9d9 100755 --- a/tests/kms_flip.c +++ b/tests/kms_flip.c @@

Re: [Intel-gfx] [igt-dev] [PATCH 4/4] [RFC] tests/kms_big_fb: Wait for vblank before collecting CRC

Hello Juha-Pekka, I am sorry, this is not needed. Thank you so much. Regards Vidya -Original Message- From: Juha-Pekka Heikkila Sent: Thursday, May 27, 2021 8:40 PM To: Srinivas, Vidya ; intel-gfx@lists.freedesktop.org; igt-...@lists.freedesktop.org Cc: Lin, Charlton Subject: Re: [ig

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