== Series Details ==
Series: drm/i915: Introduce Intel PXP
URL : https://patchwork.freedesktop.org/series/90503/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10128 -> Patchwork_20185
Summary
---
**SUCCESS**
No re
https://bugzilla.redhat.com/show_bug.cgi?id=1964252
dmesg below.
Feel free to point me at any fixes already in flight.
Dave.
[ 140.302041] list_add double add: new=9ed109790fe0,
prev=9ed109790fe0, next=9ed109465b38.
[ 140.302076] [ cut here ]
[ 140.302078]
== Series Details ==
Series: series starting with [1/5] drm/i915/display/adl_p: Drop earlier return
in tc_has_modular_fia()
URL : https://patchwork.freedesktop.org/series/90495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10128_full -> Patchwork_20184_full
=
== Series Details ==
Series: drm/i915: Introduce Intel PXP
URL : https://patchwork.freedesktop.org/series/90503/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./include/uapi/drm/i915_drm.h:1772: warning: This comment starts with '/**',
but isn't a kernel-doc comme
== Series Details ==
Series: drm/i915: Introduce Intel PXP
URL : https://patchwork.freedesktop.org/series/90503/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/inte
== Series Details ==
Series: drm/i915: Introduce Intel PXP
URL : https://patchwork.freedesktop.org/series/90503/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ef325598b78f drm/i915/pxp: Define PXP component interface
-:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file
From: Anshuman Gupta
When protected sufaces has flipped and pxp session is disabled,
display black pixels by using plane color CTM correction.
v2:
- Display black pixels in async flip too.
v3:
- Removed the black pixels logic for async flip. [Ville]
- Used plane state to force black pixels. [Vi
From: Anshuman Gupta
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PXP session is enabled.
2. Buffer object is protected.
v2:
- Used gen fb obj user_flags instead gem_object_metadata. [Krishna
From: Bommu Krishnaiah
This api allow user mode to create Protected buffers. Only contexts
marked as protected are allowed to operate on protected buffers.
We only allow setting the flags at creation time.
All protected objects that have backing storage will be considered
invalid when the sessi
Note that discrete cards can support PXP as well, but we haven't tested
on those yet so keeping it disabled for now.
Signed-off-by: Daniele Ceraolo Spurio
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i91
Now that we can handle destruction and re-creation of the arb session,
we can postpone the start of the session to the first submission that
requires it, to avoid keeping it running with no user.
Signed-off-by: Daniele Ceraolo Spurio
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 8 ++--
d
From: "Huang, Sean Z"
During the power event S3+ sleep/resume, hardware will lose all the
encryption keys for every hardware session, even though the
session state might still be marked as alive after resume. Therefore,
we should consider the session as dead on suspend and invalidate all the
obje
Extra tracking and checks around protected objects, coming in a follow-up
patch, will be enabled only for contexts that opt in. Contexts can only be
marked as using protected content at creation time and they must be both
bannable and not recoverable.
When a PXP teardown occurs, all gem contexts m
The context is required to send the session termination commands to the
VCS, which will be implemented in a follow-up patch. We can also use the
presence of the context as a check of pxp initialization completion.
v2: use perma-pinned context (Chris)
v3: rename pinned_context functions (Chris)
v4:
From: Chris Wilson
Allow internal clients to create a pinned context.
v2 (Daniele): export destructor as well, allow optional usage of custom
vm for maximum flexibility.
Signed-off-by: Chris Wilson
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/intel_engine.h| 10 +
From: "Huang, Sean Z"
Create the arbitrary session, with the fixed session id 0xf, after
system boot, for the case that application allocates the protected
buffer without establishing any protection session. Because the
hardware requires at least one alive session for protected buffer
creation. T
This will be used for communication between the i915 driver and the mei
one. Defining it in a stand-alone patch to avoid circualr dependedencies
between the patches modifying the 2 drivers.
Split out from an original patch from Huang, Sean Z
v2: rename the component struct (Rodrigo)
Signed-off-
From: "Huang, Sean Z"
Teardown is triggered when the display topology changes and no
long meets the secure playback requirement, and hardware trashes
all the encryption keys for display. Additionally, we want to emit a
teardown operation to make sure we're clean on boot and resume
v2: emit in th
From: "Huang, Sean Z"
The HW will generate a teardown interrupt when session termination is
required, which requires i915 to submit a terminating batch. Once the HW
is done with the termination it will generate another interrupt, at
which point it is safe to re-create the session.
Since the term
From: "Huang, Sean Z"
Implement the funcs to create the TEE channel, so kernel can
send the TEE commands directly to TEE for creating the arbitrary
(default) session.
v2: fix locking, don't pollute dev_priv (Chris)
v3: wait for mei PXP component to be bound.
Signed-off-by: Huang, Sean Z
Signe
The setting is required by hardware to allow us doing further protection
operation such as sending commands to GPU or TEE. The register needs to
be re-programmed on resume, so for simplicitly we bundle the programming
with the component binding, which is automatically called on resume.
Further HW
From: Vitaly Lubart
Export PAVP client to work with i915 driver,
for binding it uses kernel component framework.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/misc/mei/Kconfig | 2 +
drivers/misc/mei/Makefile | 1 +
Ahead of the PXP implementation, define the relevant define flag and
kconfig option.
v2: flip kconfig default to N. Some machines have IFWIs that do not
support PXP, so we need it to be an opt-in until we add support to query
the caps from the mei device.
Signed-off-by: Daniele Ceraolo Spurio
Re
PXP (Protected Xe Path) is an i915 component, available on
GEN12+, that helps to establish the hardware protected session
and manage the status of the alive software session, as well
as its life cycle.
Several minor changes and fixes, but the main changes in v4 are:
- Rebased to new create_ext io
== Series Details ==
Series: dma-buf: Add an API for exporting sync files (v10)
URL : https://patchwork.freedesktop.org/series/90491/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10128_full -> Patchwork_20183_full
Summary
On Thu, May 06, 2021 at 12:13:30PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> We want to stop using guc.send_mutex while sending CTB messages
> so we have to start protecting access to CTB send descriptor.
>
> For completeness protect also CTB send descriptor.
>
> Add spinlock to
On Thu, May 06, 2021 at 12:13:30PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> We want to stop using guc.send_mutex while sending CTB messages
> so we have to start protecting access to CTB send descriptor.
>
> For completeness protect also CTB send descriptor.
Michal I think you h
On Thu, May 06, 2021 at 12:13:27PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> Upcoming GuC firmware will always require just two CTBs and we
> also plan to configure them with different sizes, so definining
> them as array is no longer suitable.
>
> Signed-off-by: Michal Wajdeczko
On Mon, May 24, 2021 at 11:49 PM Konrad Rzeszutek Wilk
wrote:
>
> On Tue, May 18, 2021 at 02:48:35PM +0800, Claire Chang wrote:
> > I didn't move this to a separate file because I feel it might be
> > confusing for swiotlb_alloc/free (and need more functions to be
> > non-static).
> > Maybe instea
On Mon, May 24, 2021 at 11:51 PM Konrad Rzeszutek Wilk
wrote:
>
> On Tue, May 18, 2021 at 02:51:52PM +0800, Claire Chang wrote:
> > Still keep this function because directly using dev->dma_io_tlb_mem
> > will cause issues for memory allocation for existing devices. The pool
> > can't support atomi
On Mon, May 24, 2021 at 11:53 PM Konrad Rzeszutek Wilk
wrote:
>
> > > do the set_memory_decrypted()+memset(). Is this okay or should
> > > swiotlb_init_io_tlb_mem() add an additional argument to do this
> > > conditionally?
> >
> > I'm actually not sure if this it okay. If not, will add an additio
On Thu, May 06, 2021 at 12:13:28PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> Future GuC will require CTB buffers sizes to be multiple of 4K.
> Make these changes now as this shouldn't impact us too much.
>
> Signed-off-by: Michal Wajdeczko
> Signed-off-by: Matthew Brost
> Cc: Jo
On Thu, May 06, 2021 at 12:13:26PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> We can retrieve offsets to cmds buffers and descriptor from
> actual pointers that we already keep locally.
>
> Signed-off-by: Michal Wajdeczko
> Signed-off-by: Matthew Brost
> ---
> drivers/gpu/drm/i9
On Thu, May 06, 2021 at 12:13:25PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> In upcoming GuC firmware, CTB size will be removed from the CTB
> descriptor so we must keep it locally for any calculations.
>
> While around, improve some debug messages and helpers.
>
desc->size is s
On Thu, May 06, 2021 at 12:13:23PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> Stop using fence/status from CTB descriptor as future GuC ABI will
> no longer support replies over CTB descriptor.
>
> Signed-off-by: Michal Wajdeczko
> Signed-off-by: Matthew Brost
Reviewed-by: Matth
== Series Details ==
Series: More DMC cleanup (rev4)
URL : https://patchwork.freedesktop.org/series/90379/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10127_full -> Patchwork_20181_full
Summary
---
**SUCCESS**
N
On Thu, May 06, 2021 at 12:13:37PM -0700, Matthew Brost wrote:
> From: John Harrison
>
> GuC firmware v53.0.0 introduced per context scheduling policies. This
> includes changes to some of the ADS structures which are required to
> load the firmware even if not using GuC submission.
>
> Signed-o
On Thu, May 06, 2021 at 12:13:42PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> CTB pool is now maintained internally by the GuC as part of its
> "private data". No need to allocate separate buffer and pass it
> to GuC as yet another ADS.
>
> GuC: 57.0.0
> Signed-off-by: Michal Wajde
On Thu, May 06, 2021 at 12:13:24PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko
>
> Generic helpers should be placed in i915_utils.h.
>
> Signed-off-by: Michal Wajdeczko
> Signed-off-by: Matthew Brost
Reviewed-by: Matthew Brost
> ---
> drivers/gpu/drm/i915/i915_utils.h | 5 +
>
On Thu, May 06, 2021 at 12:13:21PM -0700, Matthew Brost wrote:
> From: Rodrigo Vivi
>
> This action is no-op in the GuC side for a few versions already
> and it is getting entirely removed soon, in an upcoming version.
>
> Time to remove before we face communication issues.
>
> Cc: Vinay Belga
On Thu, May 06, 2021 at 12:13:20PM -0700, Matthew Brost wrote:
> From: Daniele Ceraolo Spurio
>
> In GuC submission mode the CS is owned by the GuC FW, so all CS status
> interrupts are handled by it. We only need the user interrupt as that
> signals request completion.
>
> Since we're now start
== Series Details ==
Series: series starting with [1/3] drm/i915/adlp: Require DPT FB CCS color
planes to be 2MB aligned
URL : https://patchwork.freedesktop.org/series/90484/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10127_full -> Patchwork_20180_full
Quoting Matthew Brost (2021-05-06 21:13:22)
> From: Michal Wajdeczko
>
> Our fwif.h file is now mix of strict firmware ABI definitions and
> set of our helpers. In anticipation of upcoming changes to the GuC
> interface try to keep them separate in smaller maintainable files.
>
> Signed-off-by:
== Series Details ==
Series: GPD Win Max display fixes
URL : https://patchwork.freedesktop.org/series/90483/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10127_full -> Patchwork_20179_full
Summary
---
**FAILURE**
== Series Details ==
Series: series starting with [1/5] drm/i915/display/adl_p: Drop earlier return
in tc_has_modular_fia()
URL : https://patchwork.freedesktop.org/series/90495/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10128 -> Patchwork_20184
===
== Series Details ==
Series: series starting with [1/5] drm/i915/display/adl_p: Drop earlier return
in tc_has_modular_fia()
URL : https://patchwork.freedesktop.org/series/90495/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit
== Series Details ==
Series: dma-buf: Add an API for exporting sync files (v10)
URL : https://patchwork.freedesktop.org/series/90491/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10128 -> Patchwork_20183
Summary
---
== Series Details ==
Series: dma-buf: Add an API for exporting sync files (v10)
URL : https://patchwork.freedesktop.org/series/90491/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gp
== Series Details ==
Series: dma-buf: Add an API for exporting sync files (v10)
URL : https://patchwork.freedesktop.org/series/90491/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
24b0f0b1996a dma-buf: add dma_fence_array_for_each (v2)
-:73: CHECK:MACRO_ARG_REUSE: Macro argumen
On 5/24/21 2:48 PM, José Roberto de Souza wrote:
We are missing the implementation of some workarounds to enabled PSR2
in Alderlake P, so to avoid any CI report of issues around PSR2
disabling it until all PSR2 workarounds are implemented.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Sou
On 5/24/21 2:48 PM, José Roberto de Souza wrote:
DC3CO is allowed in all the combinations between pipe and port A and B
on alderlake-P.
BSpec: 49196
Cc: Anshuman Gupta
Cc: Gwan-gyeong Mun
Cc: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2
On 5/24/21 2:48 PM, José Roberto de Souza wrote:
Commit c457d9cf256e ("drm/i915: Make sure we have enough memory
bandwidth on ICL") assumes that we always have a non-zero
dram_info->channels and uses it as a divisor.
We need num memory channels to be at least 1 for sane bw limits
checking, even
On 5/24/21 2:48 PM, José Roberto de Souza wrote:
On ADL-P TC cold is exited and blocked when legacy aux is powered,
that is exacly the same of what ICL need for static TC ports.
TODO: When a TBT hub or monitor is connected it will cause TBT and
legacy aux to be powered at the same time, hopeful
On 5/24/21 2:48 PM, José Roberto de Souza wrote:
MODULAR_FIA_MASK is set in adl_p so we can drop this ealier return
and read registers.
Also to avoid warnings from icl_tc_port_assert_ref_held() when
calling tc_cold_block() in this functions it is necessary to held the
lock.
Cc: Imre Deak
Signe
On Mon, 2021-05-24 at 12:30 -0700, Anusha Srivatsa wrote:
> This is a prep patch for Pipe DMC plugging.
>
> Add dmc_info struct in intel_dmc to have all common fields
> shared between all DMC's in the package.
> Add DMC_FW_MAIN(dmc_id 0) to refer to the blob.
>
> Signed-off-by: Anusha Srivatsa
>
On Mon, 2021-05-24 at 12:30 -0700, Anusha Srivatsa wrote:
> Move struct intel_dmc from i915_drv.h to intel_dmc.h.
Reviewed-by: José Roberto de Souza
>
> v2: Add includes along with moving the struct.
>
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/display/intel_dmc.h | 21 +++
MODULAR_FIA_MASK is set in adl_p so we can drop this ealier return
and read registers.
Also to avoid warnings from icl_tc_port_assert_ref_held() when
calling tc_cold_block() in this functions it is necessary to held the
lock.
Cc: Imre Deak
Signed-off-by: José Roberto de Souza
---
drivers/gpu/dr
DC3CO is allowed in all the combinations between pipe and port A and B
on alderlake-P.
BSpec: 49196
Cc: Anshuman Gupta
Cc: Gwan-gyeong Mun
Cc: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 20
1 file changed, 16 insertions
We are missing the implementation of some workarounds to enabled PSR2
in Alderlake P, so to avoid any CI report of issues around PSR2
disabling it until all PSR2 workarounds are implemented.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c |
Commit c457d9cf256e ("drm/i915: Make sure we have enough memory
bandwidth on ICL") assumes that we always have a non-zero
dram_info->channels and uses it as a divisor.
We need num memory channels to be at least 1 for sane bw limits
checking, even when PCode returns 0 or there is a error reading it,
On ADL-P TC cold is exited and blocked when legacy aux is powered,
that is exacly the same of what ICL need for static TC ports.
TODO: When a TBT hub or monitor is connected it will cause TBT and
legacy aux to be powered at the same time, hopefully this will not
cause any issues but if it do, some
This patch is analogous to the previous sync file export patch in that
it allows you to import a sync_file into a dma-buf. Unlike the previous
patch, however, this does add genuinely new functionality to dma-buf.
Without this, the only way to attach a sync_file to a dma-buf is to
submit a batch to
None of these helpers actually leak any RCU details to the caller. They
all assume you have a genuine reference, take the RCU read lock, and
retry if needed. Naming them with an _rcu is likely to cause callers
more panic than needed.
Signed-off-by: Jason Ekstrand
Suggested-by: Daniel Vetter
--
From: Christian König
Add a helper to iterate over all fences in a dma_fence_array object.
v2 (Jason Ekstrand)
- Return NULL from dma_fence_array_first if head == NULL. This matches
the iterator behavior of dma_fence_chain_for_each in that it iterates
zero times if head == NULL.
- Retur
Add a helper function to get a single fence representing
all fences in a dma_resv object.
This fence is either the only one in the object or all not
signaled fences of the object in a flatted out dma_fence_array.
v2 (Jason Ekstrand):
- Take reference of fences both for creating the dma_fence_arr
Modern userspace APIs like Vulkan are built on an explicit
synchronization model. This doesn't always play nicely with the
implicit synchronization used in the kernel and assumed by X11 and
Wayland. The client -> compositor half of the synchronization isn't too
bad, at least on intel, because we
For dma-buf sync_file import, we want to get all the fences on a
dma_resv plus one more. We could wrap the fence we get back in an array
fence or we could make dma_resv_get_singleton_unlocked take "one more"
to make this case easier.
Signed-off-by: Jason Ekstrand
---
drivers/dma-buf/dma-buf.c
Modern userspace APIs like Vulkan are built on an explicit
synchronization model. This doesn't always play nicely with the
implicit synchronization used in the kernel and assumed by X11 and
Wayland. The client -> compositor half of the synchronization isn't too
bad, at least on intel, because we
== Series Details ==
Series: Pipe DMC Support (rev2)
URL : https://patchwork.freedesktop.org/series/90445/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10127 -> Patchwork_20182
Summary
---
**FAILURE**
Serious unk
== Series Details ==
Series: Pipe DMC Support (rev2)
URL : https://patchwork.freedesktop.org/series/90445/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_disp
== Series Details ==
Series: Pipe DMC Support (rev2)
URL : https://patchwork.freedesktop.org/series/90445/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e45725e49bdd drm/i915/dmc: s/DRM_ERROR/drm_err
-:80: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#80: F
== Series Details ==
Series: More DMC cleanup (rev4)
URL : https://patchwork.freedesktop.org/series/90379/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10127 -> Patchwork_20181
Summary
---
**SUCCESS**
No regressi
Hi,
On 5/24/21 6:47 PM, Anisse Astier wrote:
> Panel is 800x1280, but mounted on a laptop form factor, sideways.
>
> Signed-off-by: Anisse Astier
Thanks, patch looks good to me:
Reviewed-by: Hans de Goede
Regards,
Hans
> ---
> drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
>
== Series Details ==
Series: More DMC cleanup (rev4)
URL : https://patchwork.freedesktop.org/series/90379/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a62325931c20 drm/i915/dmc: s/DRM_ERROR/drm_err
-:80: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#80: F
Load DMC v2.06 on ADLP. The release notes mention that
this version enables few power savings features.
Cc: Lucas De Marchi
Cc: Clint Taylor
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a
ADLP requires us to load both Pipe A and Pipe B.
Plug Pipe B loading support.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++
drivers/gpu/drm/i915/display/intel_dmc.h | 1 +
2 files changed, 3 insertions(+)
diff --
This patch adds Pipe A plumbing to the already
existing parsing and loading functions which is
taken care of in the prep patches. Adding MAX_DMC_FW
to keep track for both Main and Pipe A DMC while loading
the respective blobs.
Also adding present field in dmc_info.
s/find_dmc_fw_offset/csr_set_dmc
Move struct intel_dmc from i915_drv.h to intel_dmc.h.
v2: Add includes along with moving the struct.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.h | 21 +
drivers/gpu/drm/i915/i915_drv.h | 18 +-
2 files changed, 22 inse
We check for dmc_payload being there at various points in the driver.
Replace it with the helper.
v2: rebased.
v3: Move intel_dmc to intel_dmc.h in another patch (Lucas)
v4: Remove headers not needed from intel_dmc.h
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De March
This is a prep patch for Pipe DMC plugging.
Add dmc_info struct in intel_dmc to have all common fields
shared between all DMC's in the package.
Add DMC_FW_MAIN(dmc_id 0) to refer to the blob.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 44 +++---
Use new format of debug messages across intel_csr.
While at it, change some function definitions which now
need dev_priv for drm_err and drm_info etc.
v2: use container_of() (Jani)
v3: Indentation fixes. (Jani)
Cc: Jani Nikula
Suggested-by: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Revie
Adding the actual Pipe DMC bits.
This series is rebased on top of the new
"More DMC cleanup" series:
https://patchwork.freedesktop.org/series/90379/
Anusha Srivatsa (7):
drm/i915/dmc: s/DRM_ERROR/drm_err
drm/i915/dmc: Add intel_dmc_has_payload() helper
drm/i915/dmc: Move struct intel_dmc to
Use new format of debug messages across intel_csr.
While at it, change some function definitions which now
need dev_priv for drm_err and drm_info etc.
v2: use container_of() (Jani)
v3: Indentation fixes. (Jani)
Cc: Jani Nikula
Suggested-by: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Revie
We check for dmc_payload being there at various points in the driver.
Replace it with the helper.
v2: rebased.
v3: Move intel_dmc to intel_dmc.h in another patch (Lucas)
v4: Remove headers not needed from intel_dmc.h
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De March
Move struct intel_dmc from i915_drv.h to intel_dmc.h.
v2: Add includes along with moving the struct.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.h | 21 +
drivers/gpu/drm/i915/i915_drv.h | 18 +-
2 files changed, 22 inse
Last of prep patches before Pipe DMC patches
can land.
v2: Add struct intel_dmc to intel_dmc.h in a separate
patch
v3: Minor code shuffling and indentation fixes
Anusha Srivatsa (3):
drm/i915/dmc: s/DRM_ERROR/drm_err
drm/i915/dmc: Add intel_dmc_has_payload() helper
drm/i915/dmc: Move struc
== Series Details ==
Series: series starting with [1/3] drm/i915/adlp: Require DPT FB CCS color
planes to be 2MB aligned
URL : https://patchwork.freedesktop.org/series/90484/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10127 -> Patchwork_20180
==
On Mon, May 24, 2021 at 03:43:11PM +0200, Michal Wajdeczko wrote:
>
>
> On 06.05.2021 21:13, Matthew Brost wrote:
> > With the introduction of non-blocking CTBs more than one CTB can be in
> > flight at a time. Increasing the size of the CTBs should reduce how
> > often software hits the case whe
On Mon, 2021-05-24 at 19:16 +0100, Matthew Auld wrote:
> On Fri, 21 May 2021 at 16:33, Thomas Hellström
> wrote:
> >
> > Use fast wc memcpy for reading out of wc memory for TTM bo moves.
> >
> > Cc: Dave Airlie
> > Cc: Christian König
> > Cc: Daniel Vetter
> > Signed-off-by: Thomas Hellström
== Series Details ==
Series: series starting with [1/3] drm/i915/adlp: Require DPT FB CCS color
planes to be 2MB aligned
URL : https://patchwork.freedesktop.org/series/90484/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
67ae62f3578a drm/i915/adlp: Require DPT FB CCS color pla
On Mon, May 24, 2021 at 02:58:12PM +0200, Michal Wajdeczko wrote:
>
>
> On 06.05.2021 21:13, Matthew Brost wrote:
> > Implement a stall timer which fails H2G CTBs once a period of time
> > with no forward progress is reached to prevent deadlock.
> >
> > Also update to ct_write to return -EDEADLK
== Series Details ==
Series: GPD Win Max display fixes
URL : https://patchwork.freedesktop.org/series/90483/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10127 -> Patchwork_20179
Summary
---
**SUCCESS**
No regres
On Fri, 21 May 2021 at 16:33, Thomas Hellström
wrote:
>
> Use fast wc memcpy for reading out of wc memory for TTM bo moves.
>
> Cc: Dave Airlie
> Cc: Christian König
> Cc: Daniel Vetter
> Signed-off-by: Thomas Hellström
> ---
> drivers/gpu/drm/ttm/ttm_bo_util.c | 9 -
> 1 file changed
== Series Details ==
Series: GPD Win Max display fixes
URL : https://patchwork.freedesktop.org/series/90483/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_di
On Mon, 2021-05-24 at 17:45 +0100, Matthew Auld wrote:
> On Fri, 21 May 2021 at 16:33, Thomas Hellström
> wrote:
> >
> > Memcpy from wc will be used as well by TTM memcpy.
> > Move it to core drm, and make the interface do the right thing
> > even on !X86.
> >
> > Cc: Christian König
> > Cc: Da
On Mon, 2021-05-24 at 20:27 +0300, Imre Deak wrote:
> Similarly to GGTT VMAs, DPT VMAs can be also a remapped or rotated view
> of the mapped object, so make sure we debug print the details for these
> views as well besides the normal view.
>
> While at it also fix the debug print for the VMA type
On Mon, 2021-05-24 at 20:27 +0300, Imre Deak wrote:
> An object mapped via DPT can have remapped and rotated VMA instances
> besides the normal VMA instance, similarly to GGTT VMA instances.
> Adjust the corresponding VMA lookup asserts.
>
> While at it also check if a DPT VM is passed incorrectly
Similarly to GGTT VMAs, DPT VMAs can be also a remapped or rotated view
of the mapped object, so make sure we debug print the details for these
views as well besides the normal view.
While at it also fix the debug print for the VMA type of DPT VMAs.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/
All DPT FB color plane surface base addresses must be 2MB aligned. On
ADL_P this means that the offsets in CCS FB object must be also 2MB
aligned. Adjusting unaligned offsets for these FBs during commit time
(compensating with the x/y offsets) doesn't work, since the big
alignment would most probab
An object mapped via DPT can have remapped and rotated VMA instances
besides the normal VMA instance, similarly to GGTT VMA instances.
Adjust the corresponding VMA lookup asserts.
While at it also check if a DPT VM is passed incorrectly to
i915_vm_to_ppgtt().
Signed-off-by: Imre Deak
---
driver
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