Still keep this function because directly using dev->dma_io_tlb_mem
will cause issues for memory allocation for existing devices. The pool
can't support atomic coherent allocation so we need to distinguish the
per device pool and the default pool in swiotlb_alloc.
__
I didn't move this to a separate file because I feel it might be
confusing for swiotlb_alloc/free (and need more functions to be
non-static).
Maybe instead of moving to a separate file, we can try to come up with
a better naming?
___
Intel-gfx mailing lis
== Series Details ==
Series: Restricted DMA (rev3)
URL : https://patchwork.freedesktop.org/series/89341/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/am
On 5/17/21 12:57 PM, Jani Nikula wrote:
On Tue, 11 May 2021, Thomas Hellström wrote:
The internal ttm_bo_util memcpy uses vmap functionality, and while it
probably might be possible to use it for copying in- and out of
sglist represented io memory, using io_mem_reserve() / io_mem_free()
callba
== Series Details ==
Series: Restricted DMA (rev3)
URL : https://patchwork.freedesktop.org/series/89341/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4970ae013adb swiotlb: Refactor swiotlb init functions
e6b601b9629d swiotlb: Refactor swiotlb_create_debugfs
e86662fadedf swiotl
On 5/17/21 11:46 PM, Thomas Hellström wrote:
On 5/17/21 3:11 PM, Christoph Hellwig wrote:
On Mon, May 17, 2021 at 04:09:42PM +0300, Serge Belyshev wrote:
Christoph Hellwig writes:
As an ad-hoc experiment: can you replace the call to remap_pfn_range
with remap_pfn_range_notrack (and export
If a device is not behind an IOMMU, we look up the device node and set
up the restricted DMA when the restricted-dma-pool is presented.
Signed-off-by: Claire Chang
---
drivers/of/address.c| 25 +
drivers/of/device.c | 3 +++
drivers/of/of_private.h | 5 +
3
Introduce the new compatible string, restricted-dma-pool, for restricted
DMA. One can specify the address and length of the restricted DMA memory
region by restricted-dma-pool in the reserved-memory node.
Signed-off-by: Claire Chang
---
.../reserved-memory/reserved-memory.txt | 27
The restricted DMA pool is preferred if available.
The restricted DMA pools provide a basic level of protection against the
DMA overwriting buffer contents at unexpected times. However, to protect
against general data leakage and system memory corruption, the system
needs to provide a way to lock
Add the functions, swiotlb_{alloc,free} to support the memory allocation
from restricted DMA pool.
Signed-off-by: Claire Chang
---
include/linux/swiotlb.h | 4
kernel/dma/swiotlb.c| 35 +--
2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/
Add a new wrapper __dma_direct_free_pages() that will be useful later
for swiotlb_free().
Signed-off-by: Claire Chang
---
kernel/dma/direct.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c
index 078f7087e466..eb409832
Add a new function, release_slots, to make the code reusable for supporting
different bounce buffer pools, e.g. restricted DMA pool.
Signed-off-by: Claire Chang
---
kernel/dma/swiotlb.c | 35 ---
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/kern
Move the maintenance of alloc_size to find_slots for better code
reusability later.
Signed-off-by: Claire Chang
---
kernel/dma/swiotlb.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c
index 95f482c4408c..2ec6711071de 100
Regardless of swiotlb setting, the restricted DMA pool is preferred if
available.
The restricted DMA pools provide a basic level of protection against the
DMA overwriting buffer contents at unexpected times. However, to protect
against general data leakage and system memory corruption, the system
Update is_swiotlb_buffer to add a struct device argument. This will be
useful later to allow for restricted DMA pool.
Signed-off-by: Claire Chang
---
drivers/iommu/dma-iommu.c | 12 ++--
drivers/xen/swiotlb-xen.c | 2 +-
include/linux/swiotlb.h | 6 +++---
kernel/dma/direct.c |
Update is_swiotlb_active to add a struct device argument. This will be
useful later to allow for restricted DMA pool.
Signed-off-by: Claire Chang
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_ttm.c| 2 +-
drivers/pci/xen-pcifront.c
Add a new getter, get_io_tlb_mem, to help select the io_tlb_mem struct.
The restricted DMA pool is preferred if available.
Signed-off-by: Claire Chang
---
include/linux/swiotlb.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
in
Add the initialization function to create restricted DMA pools from
matching reserved-memory nodes.
Signed-off-by: Claire Chang
---
include/linux/device.h | 4 +++
include/linux/swiotlb.h | 3 +-
kernel/dma/swiotlb.c| 76 +
3 files changed, 82 inser
Add a new kconfig symbol, DMA_RESTRICTED_POOL, for restricted DMA pool.
Signed-off-by: Claire Chang
---
kernel/dma/Kconfig | 14 ++
1 file changed, 14 insertions(+)
diff --git a/kernel/dma/Kconfig b/kernel/dma/Kconfig
index 77b405508743..3e961dc39634 100644
--- a/kernel/dma/Kconfig
Split the debugfs creation to make the code reusable for supporting
different bounce buffer pools, e.g. restricted DMA pool.
Signed-off-by: Claire Chang
---
kernel/dma/swiotlb.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/kernel/dma/swiotlb.c b/
Add a new function, swiotlb_init_io_tlb_mem, for the io_tlb_mem struct
initialization to make the code reusable.
Note that we now also call set_memory_decrypted in swiotlb_init_with_tbl.
Signed-off-by: Claire Chang
---
kernel/dma/swiotlb.c | 51 ++--
1 fi
This series implements mitigations for lack of DMA access control on
systems without an IOMMU, which could result in the DMA accessing the
system memory at unexpected times and/or unexpected addresses, possibly
leading to data leakage or corruption.
For example, we plan to use the PCI-e bus for Wi
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Monday, May 17, 2021 8:49 PM
> To: Roper, Matthew D ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v4 02/23] drm/i915/xelpd: Support DP1.4
> compression BPPs
>
> On Fri, 14 May 2021, Matt Ro
== Series Details ==
Series: drm/i915: Initialize err in remap_io_sg()
URL : https://patchwork.freedesktop.org/series/90258/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10093_full -> Patchwork_20139_full
Summary
---
Thanks for review. Responses inline.
> -Original Message-
> From: Jani Nikula
> Sent: 17 May 2021 19:43
> To: Surendrakumar Upadhyay, TejaskumarX
> ; intel-
> g...@lists.freedesktop.org; Pandey, Hariom
> Subject: Re: [Intel-gfx] [PATCH V2] drm/i915/jsl: Add W/A 1409054076 for JSL
>
> On
== Series Details ==
Series: Rename all CSR references to DMC (rev3)
URL : https://patchwork.freedesktop.org/series/90043/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10093_full -> Patchwork_20138_full
Summary
---
== Series Details ==
Series: Alder Lake-P Support (rev4)
URL : https://patchwork.freedesktop.org/series/89899/
State : failure
== Summary ==
Applying: drm/i915/xelpd: Enhanced pipe underrun reporting
Applying: drm/i915/xelpd: Support DP1.4 compression BPPs
Applying: drm/i915/xelpd: Calculate V
On Mon, 2021-05-17 at 16:18 -0700, José Roberto de Souza wrote:
> On Mon, 2021-05-17 at 17:53 +0300, Imre Deak wrote:
> > On Fri, May 14, 2021 at 08:10:20PM -0700, Matt Roper wrote:
> > > From: José Roberto de Souza
> > >
> > > On ADL-P TC cold is exited and blocked when legacy aux is powered,
>
On Mon, 2021-05-17 at 17:53 +0300, Imre Deak wrote:
> On Fri, May 14, 2021 at 08:10:20PM -0700, Matt Roper wrote:
> > From: José Roberto de Souza
> >
> > On ADL-P TC cold is exited and blocked when legacy aux is powered,
> > that is exacly the same of what ICL need for static TC ports.
> >
> > T
Values match current BSPEC.
Reviewed-by: Clint Taylor
-Clint
On 5/14/21 8:10 PM, Matt Roper wrote:
From: Mika Kahola
Define and use DP voltage swing and pre-emphasis translation tables
for ADL-P.
v2:
- Update according to recent bspec updates; there are now separate
tables for RBR/H
Tested on latest drm-tip with DPCD=1.2 Sink and LTTPR set to non-
transparent mode:
[ 706.966375] i915 :00:02.0: [drm:drm_dp_dpcd_read] AUX USBC2/DDI
TC2/PHY TC2: 0xf AUX -> (ret= 8) 14 1e 80 55 04 00 00 00
[ 706.966383] i915 :00:02.0:
[drm:intel_dp_init_lttpr_and_dprx_caps [i915]]
Reviewed-by: Clint Taylor
-Clint
On 5/14/21 8:10 PM, Matt Roper wrote:
From: Anusha Srivatsa
The clocks in ALD_P is similar to that of TGL.
The combo PLLs use the same DPLL0, DPLL1 and TBT_PLL.
This patch adds the helper function intel_mg_pll_enable_reg()
which is similar to intel_combo_p
On Mon, 2021-05-17 at 23:31 +0300, Jani Nikula wrote:
> On Mon, 17 May 2021, "Souza, Jose" wrote:
> > Rodrigo, Jani: So "i915: fix remap_io_sg to verify the pgprot" was
> > not merged into any drm-intel branch, how should I merge this after
> > get CI green
> > light?
>
> I think Rodrigo should d
On 5/17/21 3:11 PM, Christoph Hellwig wrote:
On Mon, May 17, 2021 at 04:09:42PM +0300, Serge Belyshev wrote:
Christoph Hellwig writes:
As an ad-hoc experiment: can you replace the call to remap_pfn_range
with remap_pfn_range_notrack (and export it if you build i915 modular)
in remap_io_sg
Reviewed-by: Clint Taylor
-Clint
On 5/14/21 8:10 PM, Matt Roper wrote:
From: Anusha Srivatsa
When scalers are enabled, we need to program underrun
bubble counter to 0x50 to avoid Soft Pipe A underruns.
Make sure other bits dont get overwritten.
Cc: Matt Roper
Cc: Clint Taylor
Cc: José Ro
== Series Details ==
Series: drm/i915: Initialize err in remap_io_sg()
URL : https://patchwork.freedesktop.org/series/90258/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10093 -> Patchwork_20139
Summary
---
**WARNIN
== Series Details ==
Series: drm/i915/gem: Pin the L-shape quirked object as unshrinkable (rev3)
URL : https://patchwork.freedesktop.org/series/90065/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10090_full -> Patchwork_20136_full
=
== Series Details ==
Series: Rename all CSR references to DMC (rev3)
URL : https://patchwork.freedesktop.org/series/90043/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10093 -> Patchwork_20138
Summary
---
**SUCCESS*
On Mon, 17 May 2021, "Souza, Jose" wrote:
> Rodrigo, Jani: So "i915: fix remap_io_sg to verify the pgprot" was not merged
> into any drm-intel branch, how should I merge this after get CI green
> light?
I think Rodrigo should do a backmerge.
BR,
Jani.
>
> On Mon, 2021-05-17 at 13:21 -0700, Jo
Rodrigo, Jani: So "i915: fix remap_io_sg to verify the pgprot" was not merged
into any drm-intel branch, how should I merge this after get CI green
light?
On Mon, 2021-05-17 at 13:21 -0700, José Roberto de Souza wrote:
> If the do while loop breaks in 'if (!sg_dma_len(sgl))' in the first
> iterat
If the do while loop breaks in 'if (!sg_dma_len(sgl))' in the first
iteration, err is uninitialized causing a wrong call to zap_vma_ptes().
But that is impossible to happen as a scatterlist must have at least
one valid segment.
Anyways to avoid more reports from static checkers initializing ret
he
== Series Details ==
Series: Rename all CSR references to DMC (rev3)
URL : https://patchwork.freedesktop.org/series/90043/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_dmc.c:1: warning: 'DMC Firmware Support'
not found
/home/c
== Series Details ==
Series: Rename all CSR references to DMC (rev3)
URL : https://patchwork.freedesktop.org/series/90043/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/gt/i
== Series Details ==
Series: Rename all CSR references to DMC (rev3)
URL : https://patchwork.freedesktop.org/series/90043/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5dcdd9a0dcbf drm/i915/dmc: s/intel_csr/intel_dmc
c2408b6c4dc6 drm/i915/dmc: s/HAS_CSR/HAS_DMC
2afe14077c3b dr
No functional change.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_csr.c | 12 ++--
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_
No functional change.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_csr.c | 64 +--
drivers/gpu/drm/i915/display/intel_csr.h | 10 +--
drivers/gpu/drm/i915/display/intel_display.c | 14 ++--
.../drm/i915/display/intel_display_po
Finally, rename the header and source file from csr to dmc.
v2: Add file rename in Documentation.
- Place headers in orders. (Jani)
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
Documentation/gpu/i915.rst | 10 +-
drivers/gpu/drm/i915/Makefile
Rename all occurences of CSR_* with DMC_*
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_csr.c | 167 +-
drivers/gpu/drm/i915/display/intel_csr.h | 6 +-
.../drm/i915/display/intel_display_debugfs.c | 16 +-
.../drm/i915/displ
No functional change.
v2: Chchpatch fixes.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_csr.c | 170 +-
.../drm/i915/display/intel_display_debugfs.c | 14 +-
.../drm/i915/display/intel_display_power.c| 52 +++---
drivers/gpu/
Currently in our driver we use both CSR and DMC interchangeably.
Even though the spec mentions both, we do not follow that convention
in the driver.
Renaming all references of CSR to just be DMC. This hopefully makes
the driver of this part a litlle less confusing.
Suggested-by: Jani Nikula
Ack
== Series Details ==
Series: drm: Remove some includes of drm_legacy.h
URL : https://patchwork.freedesktop.org/series/90214/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10090_full -> Patchwork_20135_full
Summary
---
Am 17.05.21 um 16:30 schrieb Daniel Vetter:
[SNIP]
Could be that i915 has some special code for that, but on my laptop
I only see the X server under the "clients" debugfs file.
Yes we have special code in i915 for this. Part of this series we are
discussing here.
Ah, yeah you should mention th
On Monday, May 17th, 2021 at 8:16 PM, Nieto, David M
wrote:
> Btw is DRM_MAJOR 226 consider uapi? I don't see it in uapi headers.
It's not in the headers, but it's de facto uAPI, as seen in libdrm:
> git grep 226
xf86drm.c
99:#define DRM_MAJOR 226 /* Linux */
__
On Mon, May 17, 2021 at 7:05 PM Jason Ekstrand wrote:
>
> On Mon, May 17, 2021 at 8:40 AM Daniel Vetter wrote:
> >
> > On Fri, May 14, 2021 at 02:13:57PM -0500, Jason Ekstrand wrote:
> > > On Tue, May 4, 2021 at 3:33 PM Daniel Vetter wrote:
> > > >
> > > > On Mon, May 03, 2021 at 10:57:40AM -050
On Fri, May 14, 2021 at 08:10:19PM -0700, Matt Roper wrote:
> From: Anusha Srivatsa
>
> The SoC has 6 DDI ports(DDI A,DDI B and DDI TC1-4.
> The first two are connected to combo phys while
> the rest are connected to TC phys.
>
> Cc: Matt Roper
> Cc: Clinton Taylor
> Cc: Lucas De Marchi
> Cc:
On Mon, May 17, 2021 at 03:55:59PM +0200, Daniel Vetter wrote:
> On Fri, May 14, 2021 at 01:05:33PM -0700, Matthew Brost wrote:
> > On Wed, May 12, 2021 at 10:34:59AM +0200, Daniel Vetter wrote:
> > > On Tue, May 11, 2021 at 11:44:28AM -0700, Matthew Brost wrote:
> > > > On Tue, May 11, 2021 at 05:
== Series Details ==
Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau
(rev9)
URL : https://patchwork.freedesktop.org/series/84754/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10092 -> Patchwork_20137
=
On Sun, May 16, 2021 at 06:14:32PM +0100, Emil Velikov wrote:
> From: Vivek Das Mohapatra
>
> This patch is to do with seamless handover, eg when the sequence is
> bootloader → plymouth → desktop.
>
> It switches the vga arbiter from the "other" GPU to the default one
> (intel in this case), so
On Mon, 17 May 2021 at 14:11, Christoph Hellwig wrote:
>
> On Mon, May 17, 2021 at 04:09:42PM +0300, Serge Belyshev wrote:
> > Christoph Hellwig writes:
> >
> > > As an ad-hoc experiment: can you replace the call to remap_pfn_range
> > > with remap_pfn_range_notrack (and export it if you build i
On Mon, May 17, 2021 at 8:40 AM Daniel Vetter wrote:
>
> On Fri, May 14, 2021 at 02:13:57PM -0500, Jason Ekstrand wrote:
> > On Tue, May 4, 2021 at 3:33 PM Daniel Vetter wrote:
> > >
> > > On Mon, May 03, 2021 at 10:57:40AM -0500, Jason Ekstrand wrote:
> > > > This means that the proto-context ne
On Fri, 2021-05-14 at 20:10 -0700, Matt Roper wrote:
> From: Gwan-gyeong Mun
>
> In order to reuse code of PSR interrupt error check on other PSR functions,
> it adds psr_interrupt_error_check() function.
Reviewed-by: José Roberto de Souza
>
> Cc: José Roberto de Souza
> Signed-off-by: Gwan-
== Series Details ==
Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau
(rev9)
URL : https://patchwork.freedesktop.org/series/84754/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
On Fri, 2021-05-14 at 20:10 -0700, Matt Roper wrote:
> From: Anusha Srivatsa
>
> ADL_P has same memory characteristics as ADL_S platform.
>
> Bspec: 64631
>
Reviewed-by: José Roberto de Souza
> Cc: José Roberto de Souza
> Cc: Clint Taylor
> Signed-off-by: Anusha Srivatsa
> Signed-off-by:
On Fri, 2021-05-14 at 20:10 -0700, Matt Roper wrote:
> From: Imre Deak
>
> On ADL_P besides programming the PLL accordingly the DP/HDMI link rate
> should be also programmed to the DDI_BUF_CTL register, do that.
Reviewed-by: José Roberto de Souza
>
> Cc: José Roberto de Souza
> Signed-off-by
== Series Details ==
Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau
(rev9)
URL : https://patchwork.freedesktop.org/series/84754/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3ef024f74b90 drm/i915/dpcd_bl: Remove redundant AUX backlight frequency
On Fri, 2021-05-14 at 20:10 -0700, Matt Roper wrote:
> From: Gwan-gyeong Mun
>
> This introduces the following function that can enable and disable psr
> without intel_crtc_state/drm_connector_state when intel_psr is already
> enabled with current intel_crtc_state and drm_connector_state informat
Hi,
On 15/05/2021 11:40, Maxime Schmitt wrote:
Hi,
Nice to see something like this being worked on.
I wrote a top-like tool some time back (nvtop).
I targeted NVIDIA, because it was the GPU I had at the time. Also,
their driver provides a nice library to retrieve the information from
(NVML).
== Series Details ==
Series: drm/i915: only disable default vga device
URL : https://patchwork.freedesktop.org/series/90213/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10090_full -> Patchwork_20134_full
Summary
---
On 17/05/2021 15:39, Nieto, David M wrote:
[AMD Official Use Only]
Maybe we could try to standardize how the different submission ring
usage gets exposed in the fdinfo? We went the simple way of just
adding name and index, but if someone has a suggestion on how else we
could format them
On Mon, May 17, 2021 at 5:33 PM Tvrtko Ursulin
wrote:
> On 17/05/2021 16:12, Daniel Vetter wrote:
> > On Tue, May 11, 2021 at 10:05:27AM +0100, Tvrtko Ursulin wrote:
> >>
> >> On 10/05/2021 16:55, Daniel Vetter wrote:
> >>> On Fri, May 07, 2021 at 09:35:21AM +0100, Tvrtko Ursulin wrote:
> Fro
On 17/05/2021 16:12, Daniel Vetter wrote:
On Tue, May 11, 2021 at 10:05:27AM +0100, Tvrtko Ursulin wrote:
On 10/05/2021 16:55, Daniel Vetter wrote:
On Fri, May 07, 2021 at 09:35:21AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
This is an alternative proposed fix for the below refere
On Fri, 14 May 2021, Matt Roper wrote:
> From: Vandita Kulkarni
>
> Support compression BPPs from bpc to uncompressed BPP -1.
> So far we have 8,10,12 as valid compressed BPPS now the
> support is extended.
>
> Cc: Manasi Navare
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Matt Roper
> R
On Fri, May 14, 2021 at 08:10:21PM -0700, Matt Roper wrote:
> From: José Roberto de Souza
>
> ADL-P have basically the same TC connection and disconnection
> sequences as ICL and TGL, the major difference is the new registers.
>
> So here adding functions without the icl prefix in the name and
>
On Tue, May 11, 2021 at 10:05:27AM +0100, Tvrtko Ursulin wrote:
>
> On 10/05/2021 16:55, Daniel Vetter wrote:
> > On Fri, May 07, 2021 at 09:35:21AM +0100, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin
> > >
> > > This is an alternative proposed fix for the below references bug report
> > > w
On Fri, May 14, 2021 at 08:10:20PM -0700, Matt Roper wrote:
> From: José Roberto de Souza
>
> On ADL-P TC cold is exited and blocked when legacy aux is powered,
> that is exacly the same of what ICL need for static TC ports.
>
> TODO: When a TBT hub or monitor is connected it will cause TBT and
Christoph Hellwig writes:
> As an ad-hoc experiment: can you replace the call to remap_pfn_range
> with remap_pfn_range_notrack (and export it if you build i915 modular)
> in remap_io_sg and see if that makes any difference?
That worked, thanks -- no artifacts seen.
Btw, can someone please add a few comments to ascii85.h?
I have no idea WTF "ascii85" is, why it matters and how the two helpers
should be used.
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/inte
[AMD Official Use Only]
Maybe we could try to standardize how the different submission ring usage gets
exposed in the fdinfo? We went the simple way of just adding name and index,
but if someone has a suggestion on how else we could format them so there is
commonality across vendors we could j
On Fri, May 14, 2021 at 05:10:29PM +0200, Christian König wrote:
> Am 14.05.21 um 17:03 schrieb Tvrtko Ursulin:
> >
> > On 14/05/2021 15:56, Christian König wrote:
> > > Am 14.05.21 um 16:47 schrieb Tvrtko Ursulin:
> > > >
> > > > On 14/05/2021 14:53, Christian König wrote:
> > > > > >
> > > > >
Am 12.05.21 um 14:06 schrieb Werner Sembach:
> Hello,
>
> In addition to the existing "max bpc", and "Broadcast RGB/output_csc" drm
> properties I propose 4 new properties:
> "preferred pixel encoding", "active color depth", "active color range", and
> "active pixel encoding"
As an alternative/a
On Thu, May 13, 2021 at 11:48:08AM -0400, Alex Deucher wrote:
> On Thu, May 13, 2021 at 7:00 AM Tvrtko Ursulin
> wrote:
> >
> > From: Tvrtko Ursulin
> >
> > Resurrect of the previosuly merged per client engine busyness patches. In a
> > nutshell it enables intel_gpu_top to be more top(1) like use
On Thu, 13 May 2021, Tejas Upadhyay
wrote:
> When pipe A is disabled and MIPI DSI is enabled on pipe B,
> the AMT KVMR feature will incorrectly see pipe A as enabled.
> Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
> it set while DSI is enabled on pipe B. No impact to setting
> it
On Fri, May 14, 2021 at 01:05:33PM -0700, Matthew Brost wrote:
> On Wed, May 12, 2021 at 10:34:59AM +0200, Daniel Vetter wrote:
> > On Tue, May 11, 2021 at 11:44:28AM -0700, Matthew Brost wrote:
> > > On Tue, May 11, 2021 at 05:11:44PM +0200, Daniel Vetter wrote:
> > > > On Thu, May 06, 2021 at 10:
On Fri, May 14, 2021 at 02:13:57PM -0500, Jason Ekstrand wrote:
> On Tue, May 4, 2021 at 3:33 PM Daniel Vetter wrote:
> >
> > On Mon, May 03, 2021 at 10:57:40AM -0500, Jason Ekstrand wrote:
> > > This means that the proto-context needs to grow support for engine
> > > configuration information as
Hi
Am 17.05.21 um 15:17 schrieb Thomas Zimmermann:
Hi Dave and Daniel,
here's this week's PR for drm-misc-next for what wil become v5.14.
Panfrost gets support for Mediatek MT8381 chips. There are a number of
fixes for resource leaks in various drivers. Unlocking on errors in
aperture helpers g
Hi Dave and Daniel,
here's this week's PR for drm-misc-next for what wil become v5.14.
Panfrost gets support for Mediatek MT8381 chips. There are a number of
fixes for resource leaks in various drivers. Unlocking on errors in
aperture helpers gets fixes as well.
Best regards
Thomas
drm-misc-next
On Mon, May 17, 2021 at 04:09:42PM +0300, Serge Belyshev wrote:
> Christoph Hellwig writes:
>
> > As an ad-hoc experiment: can you replace the call to remap_pfn_range
> > with remap_pfn_range_notrack (and export it if you build i915 modular)
> > in remap_io_sg and see if that makes any differenc
== Series Details ==
Series: drm/i915/gem: Pin the L-shape quirked object as unshrinkable (rev3)
URL : https://patchwork.freedesktop.org/series/90065/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10090 -> Patchwork_20136
S
As an ad-hoc experiment: can you replace the call to remap_pfn_range
with remap_pfn_range_notrack (and export it if you build i915 modular)
in remap_io_sg and see if that makes any difference?
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
ht
== Series Details ==
Series: drm: Remove some includes of drm_legacy.h
URL : https://patchwork.freedesktop.org/series/90214/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10090 -> Patchwork_20135
Summary
---
**SUCCES
On Sat, May 15, 2021 at 12:23:04AM +, Souza, Jose wrote:
> On Fri, 2021-05-14 at 07:49 +0200, Christoph Hellwig wrote:
> > On Thu, May 13, 2021 at 04:28:41PM -0700, José Roberto de Souza wrote:
> > > If the do while loop breaks in 'if (!sg_dma_len(sgl))' in the first
> > > iteration, err is uni
On Wed, Apr 07, 2021 at 03:23:37PM +0300, Andy Shevchenko wrote:
> The ascii85.h is user of exactly two headers, i.e. math.h and types.h.
> There is no need to carry on entire kernel.h.
It seems DRM has strict rules about what's going thru DRM tree and this one,
while being used only for DRM drive
On Fri, 14 May 2021, Kai-Heng Feng wrote:
> On Wed, May 12, 2021 at 2:19 AM Ville Syrjälä
> wrote:
>>
>> On Mon, Apr 26, 2021 at 11:24:10PM +0800, Kai-Heng Feng wrote:
>> > On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX
>> > to discrete GFX after S3. This is not desirable
On Mon, 12 Apr 2021, Matthew Auld wrote:
> From: Anshuman Gupta
>
> Sanitize OPROM header, CPD signature and OPROM PCI version.
> OPROM_HEADER, EXPANSION_ROM_HEADER and OPROM_MEU_BLOB structures
> and PCI struct offsets are provided by GSC counterparts.
> These are yet to be Documented in B.Spec.
Hi,
Nice to see something like this being worked on.
I wrote a top-like tool some time back (nvtop).
I targeted NVIDIA, because it was the GPU I had at the time. Also,
their driver provides a nice library to retrieve the information from
(NVML).
Seeing this thread I think it would be nice to sup
Em Sat, 15 May 2021 10:24:28 +0100
David Woodhouse escreveu:
> On Sat, 2021-05-15 at 10:22 +0200, Mauro Carvalho Chehab wrote:
> > > > Here, U is not working. No idea why. I haven't
> > > > test it for *years*, as I din't see any reason why I would
> > > > need to type UTF-8 chara
Em Fri, 14 May 2021 10:06:01 +0100
David Woodhouse escreveu:
> On Fri, 2021-05-14 at 10:21 +0200, Mauro Carvalho Chehab wrote:
> > Em Wed, 12 May 2021 18:07:04 +0100
> > David Woodhouse escreveu:
> >
> > > On Wed, 2021-05-12 at 14:50 +0200, Mauro Carvalho Chehab wrote:
> > > > Such conversi
I have another problem with this patch since it landed in mainline. On
my m3-6Y30 skylake HD Graphics 515 (rev 07), it causes visual artifacts
that look like bunch of one pixel high horizontal streaks, seen most
often in firefox while scrolling or in menu controls.
Reverting this patch on top of c
Hello,
On Fri, May 14, 2021 at 08:26:19PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm: Only select I2C_ALGOBIT for drivers that actually need it
> URL : https://patchwork.freedesktop.org/series/90163/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_
Em Fri, 14 May 2021 12:08:36 +0100
Edward Cree escreveu:
> For anyone who doesn't know about it: X has this wonderful thing called
> the Compose key[1]. For instance, type ⎄--- to get —, or ⎄<" for “.
> Much more mnemonic than Unicode codepoints; and you can extend it with
> user-defined seque
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