Re: [Intel-gfx] [PATCH v2 02/20] drm/tegra: Don't register DP AUX channels before connectors

2021-03-28 Thread Thierry Reding
On Fri, Mar 26, 2021 at 04:37:49PM -0400, Lyude Paul wrote: > As pointed out by the documentation for drm_dp_aux_register(), > drm_dp_aux_init() should be used in situations where the AUX channel for a > display driver can potentially be registered before it's respective DRM > driver. This is the c

[Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce Intel PXP (rev3)

2021-03-28 Thread Patchwork
== Series Details == Series: Introduce Intel PXP (rev3) URL : https://patchwork.freedesktop.org/series/86798/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9909_full -> Patchwork_19874_full Summary --- **FAILURE**

[Intel-gfx] ✓ Fi.CI.BAT: success for Introduce Intel PXP (rev3)

2021-03-28 Thread Patchwork
== Series Details == Series: Introduce Intel PXP (rev3) URL : https://patchwork.freedesktop.org/series/86798/ State : success == Summary == CI Bug Log - changes from CI_DRM_9909 -> Patchwork_19874 Summary --- **SUCCESS** No regres

[Intel-gfx] ✗ Fi.CI.DOCS: warning for Introduce Intel PXP (rev3)

2021-03-28 Thread Patchwork
== Series Details == Series: Introduce Intel PXP (rev3) URL : https://patchwork.freedesktop.org/series/86798/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Introduce Intel PXP (rev3)

2021-03-28 Thread Patchwork
== Series Details == Series: Introduce Intel PXP (rev3) URL : https://patchwork.freedesktop.org/series/86798/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_engine

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Intel PXP (rev3)

2021-03-28 Thread Patchwork
== Series Details == Series: Introduce Intel PXP (rev3) URL : https://patchwork.freedesktop.org/series/86798/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2fffdc9bd6ba drm/i915/pxp: Define PXP component interface -:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s)

[Intel-gfx] [PATCH v3 14/16] drm/i915/pxp: Add plane decryption support

2021-03-28 Thread Daniele Ceraolo Spurio
From: Anshuman Gupta Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PXP session is enabled. 2. Buffer object is protected. v2: - Used gen fb obj user_flags instead gem_object_metadata. [Krishna

[Intel-gfx] [PATCH v3 12/16] drm/i915/uapi: introduce drm_i915_gem_create_ext

2021-03-28 Thread Daniele Ceraolo Spurio
From: Bommu Krishnaiah Same old gem_create but with now with extensions support. This is needed to support various upcoming usecases. For now we use the extensions mechanism to support PAVP. Signed-off-by: Bommu Krishnaiah Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc: Matthew Auld Cc:

[Intel-gfx] [PATCH v3 08/16] drm/i915/pxp: Implement arb session teardown

2021-03-28 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Teardown is triggered when the display topology changes and no long meets the secure playback requirement, and hardware trashes all the encryption keys for display. Additionally, we want to emit a teardown operation to make sure we're clean on boot and resume v2: emit in th

[Intel-gfx] [PATCH v3 13/16] drm/i915/pxp: User interface for Protected buffer

2021-03-28 Thread Daniele Ceraolo Spurio
From: Bommu Krishnaiah This api allow user mode to create Protected buffers. Only contexts marked as protected are allowed to operate on protected buffers. We only allow setting the flags at creation time. All protected objects that have backing storage will be considered invalid when the sessi

[Intel-gfx] [PATCH v3 16/16] drm/i915/pxp: enable PXP for integrated Gen12

2021-03-28 Thread Daniele Ceraolo Spurio
Note that discrete cards can support PXP as well, but we haven't tested on those yet so keeping it disabled for now. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH v3 15/16] drm/i915/pxp: black pixels on pxp disabled

2021-03-28 Thread Daniele Ceraolo Spurio
From: Anshuman Gupta When protected sufaces has flipped and pxp session is disabled display black pixels by using plane color CTM correction. Cc: Ville Syrjälä Cc: Gaurav Kumar Cc: Shankar Uma Signed-off-by: Anshuman Gupta Signed-off-by: Daniele Ceraolo Spurio --- .../drm/i915/display/skl_

[Intel-gfx] [PATCH v3 10/16] drm/i915/pxp: Enable PXP power management

2021-03-28 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" During the power event S3+ sleep/resume, hardware will lose all the encryption keys for every hardware session, even though the software session state was marked as alive after resume. So to handle such case, PXP should unconditionally terminate the hardware sessions and cle

[Intel-gfx] [PATCH v3 11/16] drm/i915/pxp: interface for marking contexts as using protected content

2021-03-28 Thread Daniele Ceraolo Spurio
Extra tracking and checks around protected objects, coming in a follow-up patch, will be enabled only for contexts that opt in. Contexts can only be marked as using protected content at creation time and they must be both bannable and not recoverable. When a PXP teardown occurs, all gem contexts m

[Intel-gfx] [PATCH v3 06/16] drm/i915/pxp: set KCR reg init

2021-03-28 Thread Daniele Ceraolo Spurio
The setting is required by hardware to allow us doing further protection operation such as sending commands to GPU or TEE. The register needs to be re-programmed on resume, so for simplicitly we bundle the programming with the component binding, which is automatically called on resume. Further HW

[Intel-gfx] [PATCH v3 04/16] drm/i915/pxp: allocate a vcs context for pxp usage

2021-03-28 Thread Daniele Ceraolo Spurio
The context is required to send the session termination commands to the VCS, which will be implemented in a follow-up patch. We can also use the presence of the context as a check of pxp initialization completion. v2: use perma-pinned context (Chris) v3: rename pinned_context functions (Chris) Si

[Intel-gfx] [PATCH v3 09/16] drm/i915/pxp: Implement PXP irq handler

2021-03-28 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" The HW will generate a teardown interrupt when session termination is required, which requires i915 to submit a terminating batch. Once the HW is done with the termination it will generate another interrupt, at which point it is safe to re-create the session. Since the term

[Intel-gfx] [PATCH v3 07/16] drm/i915/pxp: Create the arbitrary session after boot

2021-03-28 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Create the arbitrary session, with the fixed session id 0xf, after system boot, for the case that application allocates the protected buffer without establishing any protection session. Because the hardware requires at least one alive session for protected buffer creation. T

[Intel-gfx] [PATCH v3 05/16] drm/i915/pxp: Implement funcs to create the TEE channel

2021-03-28 Thread Daniele Ceraolo Spurio
From: "Huang, Sean Z" Implement the funcs to create the TEE channel, so kernel can send the TEE commands directly to TEE for creating the arbitrary (default) session. v2: fix locking, don't pollute dev_priv (Chris) Signed-off-by: Huang, Sean Z Signed-off-by: Daniele Ceraolo Spurio Cc: Chris W

[Intel-gfx] [PATCH v3 03/16] drm/i915/pxp: define PXP device flag and kconfig

2021-03-28 Thread Daniele Ceraolo Spurio
Ahead of the PXP implementation, define the relevant define flag and kconfig option. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/Kconfig | 11 +++ drivers/gpu/drm/i915/i915_drv.h | 4 drivers/gpu/drm/i915/intel_devi

[Intel-gfx] [PATCH v3 02/16] mei: pxp: export pavp client to me client bus

2021-03-28 Thread Daniele Ceraolo Spurio
From: Vitaly Lubart Export PAVP client to work with i915 driver, for binding it uses kernel component framework. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Daniele Ceraolo Spurio --- drivers/misc/mei/Kconfig | 2 + drivers/misc/mei/Makefile | 1 +

[Intel-gfx] [PATCH v3 01/16] drm/i915/pxp: Define PXP component interface

2021-03-28 Thread Daniele Ceraolo Spurio
This will be used for communication between the i915 driver and the mei one. Defining it in a stand-alone patch to avoid circualr dependedencies between the patches modifying the 2 drivers. Split out from an original patch from Huang, Sean Z v2: rename the component struct (Rodrigo) Signed-off-

[Intel-gfx] [PATCH v3 00/16] Introduce Intel PXP

2021-03-28 Thread Daniele Ceraolo Spurio
PXP (Protected Xe Path) is an i915 component, available on GEN12+, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. Lots of minor changes and fixes, but the main changes in v3 are: - Using a protected object wit

Re: [Intel-gfx] linux-next: build warning after merge of the drm-intel-fixes tree

2021-03-28 Thread Stephen Rothwell
Hi all, On Fri, 26 Mar 2021 19:58:38 +1100 Stephen Rothwell wrote: > > After merging the drm-intel-fixes tree, today's linux-next build > (htmldocs) produced this warning: > > Documentation/gpu/i915:22: /drivers/gpu/drm/i915/intel_runtime_pm.c:423: > WARNING: Inline strong start-string without