== Series Details ==
Series: drm/i915: refactor intel_display.c + a bit more (rev2)
URL : https://patchwork.freedesktop.org/series/86723/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740_full -> Patchwork_19608_full
Summa
== Series Details ==
Series: drm/i915/gt: Ratelimit heartbeat completion probing (rev7)
URL : https://patchwork.freedesktop.org/series/86665/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740_full -> Patchwork_19607_full
S
== Series Details ==
Series: drm/i915: Autoselect CONFIG_CHECKPOINT_RESTORE for SYS_kcmp
URL : https://patchwork.freedesktop.org/series/86759/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9739_full -> Patchwork_19605_full
== Series Details ==
Series: Introduce Intel PXP
URL : https://patchwork.freedesktop.org/series/86798/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9741 -> Patchwork_19617
Summary
---
**SUCCESS**
No regressions f
== Series Details ==
Series: drm/i915/selftest: Synchronise with the GPU timestamp (rev2)
URL : https://patchwork.freedesktop.org/series/86731/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9739_full -> Patchwork_19604_full
== Series Details ==
Series: Introduce Intel PXP
URL : https://patchwork.freedesktop.org/series/86798/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_reset.c:1323:
== Series Details ==
Series: Introduce Intel PXP
URL : https://patchwork.freedesktop.org/series/86798/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7aa9cb10d6b7 drm/i915/pxp: Define PXP component interface
-:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
== Series Details ==
Series: series starting with [CI,1/5] drm/i915: Wrap access to
intel_engine.active
URL : https://patchwork.freedesktop.org/series/86797/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9741 -> Patchwork_19616
== Series Details ==
Series: series starting with [CI,1/5] drm/i915: Wrap access to
intel_engine.active
URL : https://patchwork.freedesktop.org/series/86797/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked se
== Series Details ==
Series: series starting with [CI,1/5] drm/i915: Wrap access to
intel_engine.active
URL : https://patchwork.freedesktop.org/series/86797/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ced9b3f47b92 drm/i915: Wrap access to intel_engine.active
69d8dcdc66c1 dr
== Series Details ==
Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau
(rev5)
URL : https://patchwork.freedesktop.org/series/84754/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9741 -> Patchwork_19615
==
On 2/5/2021 6:09 PM, Daniele Ceraolo Spurio wrote:
PXP (Protected Xe Path) is an i915 component, available on
GEN12+, that helps to establish the hardware protected session
and manage the status of the alive software session, as well
as its life cycle.
I'm taking over this series from Sean. I've
From: Anshuman Gupta
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PXP session is enabled.
2. Buffer object is protected.
v2:
- Used gen fb obj user_flags instead gem_object_metadata. [Krishna
From: "Huang, Sean Z"
During the power event S3+ sleep/resume, hardware will lose all the
encryption keys for every hardware session, even though the
software session state was marked as alive after resume. So to
handle such case, PXP should unconditionally terminate the hardware
sessions and cle
Note that discrete cards can support PXP as well, but we haven't tested
on those yet so keeping it disabled for now.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i
From: Bommu Krishnaiah
Same old gem_create but with now with extensions support. This is needed
to support various upcoming usecases. For now we use the extensions
mechanism to support PAVP.
Signed-off-by: Bommu Krishnaiah
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc:
From: "Huang, Sean Z"
Implement the funcs to create the TEE channel, so kernel can
send the TEE commands directly to TEE for creating the arbitrary
(default) session.
Signed-off-by: Huang, Sean Z
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Makefile| 3 +-
drive
From: Bommu Krishnaiah
This api allow user mode to create Protected buffer and context creation.
Only contexts created with the flag set are allowed to operate on
protected buffers.
We only allow setting the flags at creation time; the context flag also
requires the context to be marked as unrec
From: "Huang, Sean Z"
Teardown is triggered when the display topology changes and no
long meets the secure playback requirement, and hardware trashes
all the encryption keys for display. Additionally, we want to emit a
teardown operation to make sure we're clean on boot and resume
Signed-off-by:
From: "Huang, Sean Z"
The HW will generate a teardown interrupt when session termination is
required, which requires i915 to submit a terminating batch. Once the HW
is done with the termination it will generate another interrupt, at
which point it is safe to re-create the session.
Signed-off-by:
From: "Huang, Sean Z"
Create the arbitrary session, with the fixed session id 0xf, after
system boot, for the case that application allocates the protected
buffer without establishing any protection session. Because the
hardware requires at least one alive session for protected buffer
creation. T
Ahead of the PXP implementation, define the relevant define flag and
kconfig option.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Kconfig | 11 +++
drivers/gpu/drm/i915/i915_drv.h | 4
drivers/gpu/drm/i915/intel_device_info.h | 1 +
3 files c
Set the KCR init during the boot time, which is required by hardware,
to allow us doing further protection operation such as sending commands
to GPU or TEE.
Signed-off-by: Huang, Sean Z
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/pxp/intel_pxp.c | 29 +
The context is required to send the session termination commands to the
VCS, which will be implemented in a follow-up patch. We can also use the
presence of the context as a check of pxp initialization completion.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Makefile
From: Vitaly Lubart
Export PAVP client to work with i915_cp driver,
for binding it uses kernel component framework.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/Kconfig | 2 +
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/pxp/Kconfig | 1
This will be used for communication between the i915 driver and the mei
one. Defining it in a stand-alone patch to avoid circualr dependedencies
between the patches modifying the 2 drivers.
Split out from an original patch from Huang, Sean Z
Signed-off-by: Daniele Ceraolo Spurio
---
include/dr
PXP (Protected Xe Path) is an i915 component, available on
GEN12+, that helps to establish the hardware protected session
and manage the status of the alive software session, as well
as its life cycle.
I'm taking over this series from Sean. I've significantly reworked the
code since his last revis
== Series Details ==
Series: drm: Extract DPCD backlight helpers from i915, add support in nouveau
(rev5)
URL : https://patchwork.freedesktop.org/series/84754/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
990b106df931 drm/nouveau/kms/nv40-/backlight: Assign prop type once
-:7
== Series Details ==
Series: kernel: Expose SYS_kcmp by default (rev3)
URL : https://patchwork.freedesktop.org/series/86776/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9741 -> Patchwork_19614
Summary
---
**SUCCESS
Extract the scheduling queue from "execlists" into the per-engine
scheduling structs, for reuse by other backends.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
.../gpu/drm/i915/gem/i915_gem_context_types.h | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_wait.c | 1 +
drivers/gpu
Extract the scheduler lists into a related structure, stop sprawling
over struct intel_engine_cs. Also transfer the responsibility of tracing
the scheduler events from ENGINE_TRACE() to SCHED_TRACE().
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_
Move the scheduling tasklists out of the execlists backend into the
per-engine scheduling bookkeeping.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine.h| 33 +++-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 33 ++--
.../gpu/dr
As we are about to shuffle the lists around to consolidate new control
objects, reduce the code movement by wrapping access to the scheduler
lists ahead of time.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 17 +++---
drivers/gpu/dr
Kick the scheduler to allow it to see the timeslice duration change,
don't peek into execlists.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/sysfs_engines.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt
== Series Details ==
Series: drm/i915: Clean up the DDI clock routing mess (rev3)
URL : https://patchwork.freedesktop.org/series/86544/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19613
Summary
---
On Fri, Feb 5, 2021 at 6:45 PM Lyude Paul wrote:
>
> Get rid of the extraneous switch case in here, and just open code
> edp_backlight_mode as we only ever use it once.
>
> Signed-off-by: Lyude Paul
> ---
> .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 15 ++-
> 1 file changed,
== Series Details ==
Series: drm/i915: Clean up the DDI clock routing mess (rev3)
URL : https://patchwork.freedesktop.org/series/86544/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gp
== Series Details ==
Series: drm/i915: Clean up the DDI clock routing mess (rev3)
URL : https://patchwork.freedesktop.org/series/86544/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fb756117b976 drm/i915: Use intel_ddi_clk_select() for FDI
714543e726a1 drm/i915: Introduce .{ena
Since we're about to implement eDP backlight support in nouveau using the
standard protocol from VESA, we might as well just take the code that's
already written for this and move it into a set of shared DRM helpers.
Note that these helpers are intended to handle DPCD related backlight
control bit
Also, stop printing the DPCD register that failed, and just describe it
instead. Saves us from having to look up each register offset when reading
through kernel logs (plus, DPCD dumping with drm.debug |= 0x100 will give
us that anyway).
Signed-off-by: Lyude Paul
---
.../drm/i915/display/intel_d
No functional changes, just move set_vesa_backlight_enable() closer to it's
only caller: intel_dp_aux_vesa_enable_backlight().
Signed-off-by: Lyude Paul
---
.../drm/i915/display/intel_dp_aux_backlight.c | 54 +--
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/dri
If we can't read DP_EDP_PWMGEN_BIT_COUNT in
intel_dp_aux_vesa_calc_max_backlight() but do have a valid PWM frequency
defined in the VBT, we'll keep going in the function until we inevitably
fail on reading DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN. There's not much point in
doing this, so just return early.
This is kind of an annoying aspect of DRM's DP helpers:
drm_dp_dpcd_readb/writeb() return the size of bytes read/written on
success, thus we want to check against that instead of checking if the
return value is less than 0.
I'll probably be fixing this in the near future once I start doing DP work
Since we're about to be moving this code into shared DRM helpers, we might
as well start to cache certain backlight capabilities that can be
determined from the EDP DPCD, and are likely to be relevant to the majority
of drivers using said helpers. The main purpose of this is just to prevent
every d
Get rid of the extraneous switch case in here, and just open code
edp_backlight_mode as we only ever use it once.
Signed-off-by: Lyude Paul
---
.../gpu/drm/i915/display/intel_dp_aux_backlight.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i
== Series Details ==
Series: drm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALID
URL : https://patchwork.freedesktop.org/series/86782/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19612
Summary
---
**SUCCES
Noticed this while moving all of the VESA backlight code in i915 over to
DRM helpers: it would appear that we calculate the frequency value we want
to write to DP_EDP_BACKLIGHT_FREQ_SET twice even though this value never
actually changes during runtime. So, let's simplify things by just caching
thi
eDP doesn't do hotplugging, so there's no reason for us to reprobe it (unless a
connection status change is being forced, of course).
Signed-off-by: Lyude Paul
Cc: Jani Nikula
Cc: Dave Airlie
Cc: greg.depo...@gmail.com
---
drivers/gpu/drm/nouveau/nouveau_connector.c | 6 ++
1 file changed,
Signed-off-by: Lyude Paul
Cc: Jani Nikula
Cc: Dave Airlie
Cc: greg.depo...@gmail.com
---
drivers/gpu/drm/nouveau/nouveau_backlight.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_backlight.c
b/drivers/gpu/drm/nouveau/nouveau_backlight.c
This series:
* Cleans up i915's DPCD backlight code a little bit
* Extracts i915's DPCD backlight code into a set of shared DRM helpers
* Starts using those helpers in nouveau to add support to nouveau for
DPCD backlight control
v2 series-wide changes:
* Rebase
v3 series-wide changes:
* Split up
== Series Details ==
Series: drm/i915: Add link rate and lane count to i915_display_info (rev2)
URL : https://patchwork.freedesktop.org/series/86738/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19611
Sum
== Series Details ==
Series: drm/i915: Add link rate and lane count to i915_display_info (rev2)
URL : https://patchwork.freedesktop.org/series/86738/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
41cbc89f649e drm/i915: Add link rate and lane count to i915_display_info
-:9: WARN
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/gt: Always flush the submission
queue on checking for idle
URL : https://patchwork.freedesktop.org/series/86778/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19610
=
Userspace has discovered the functionality offered by SYS_kcmp and has
started to depend upon it. In particular, Mesa uses SYS_kcmp for
os_same_file_description() in order to identify when two fd (e.g. device
or dmabuf) point to the same struct file. Since they depend on it for
core functionality,
On Fri, Feb 5, 2021 at 10:28 PM Chris Wilson wrote:
>
> Quoting Kees Cook (2021-02-05 21:20:33)
> > On Fri, Feb 05, 2021 at 09:16:01PM +, Chris Wilson wrote:
> > > The subject should of course be changed, as it is no longer being
> > > enabled by default.
> >
> > "default n" is redundant.
>
>
On 05/02/2021 22.06, Chris Wilson wrote:
> Userspace has discovered the functionality offered by SYS_kcmp and has
> started to depend upon it. In particular, Mesa uses SYS_kcmp for
> os_same_file_description() in order to identify when two fd (e.g. device
> or dmabuf) point to the same struct file.
From: Ville Syrjälä
Convert the remaining 'dev_priv's to 'i915's in the DDI
clock routing functions.
Cc: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 38
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/dri
From: Ville Syrjälä
Move icl_sanitize_encoder_pll_mapping() out from the middle
of the .{enable,disable}_clock() functions.
Reviewed-by: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 112 +++
1 file changed, 56 insertions(+), 5
From: Ville Syrjälä
Instead of every new platform having yet another masive
copy of the whole PLL sanitation code, let's just reuse the
.disable_clock() hook for this purpose. We do need to plug
this into the ICL+ DSI code for that, but fortunately it
already has a suitable function we can use.
From: Ville Syrjälä
Since .{enable,disable}_clock() are already vfuncs it's a bit silly to
have if-ladders inside them. Just provide specialized version for adl-s
and rkl so we don't need any of that.
v2: s/dev_priv/i915/ (Lucas)
Fix typos in platform names (Lucas)
Reviewed-by: Lucas De Mar
From: Ville Syrjälä
All the DPCLKA_CFGCR handling follows a common pattern. Let's
extract that to a small helper that just takes a few parameters
each caller can customize.
Reviewed-by: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 108 +--
From: Ville Syrjälä
The other DDI .enable_clock() functions are trying to protect us
against pll==NULL. A bit tempted to throw out all the WARNs as
just unnecessary noise, but I guess they might have some use
when poking around the shared_dpll code (not sure it wouldn't
oops elsewhere though). So
From: Ville Syrjälä
The current code attempts to protect the RMWs into global
clock routing registers with a mutex, but forgets to do so
in a few places. Let's remedy that.
Note that at the moment we serialize all modesets onto single
wq, so this shouldn't actually matter. But maybe one day we
w
From: Ville Syrjälä
For ICL+ we have several styles of clock routing for DDIs:
1) TC DDI + TC PHY
-> needs DDI_CLK_SEL==MG/TBT part form intel_ddi_clk_{select,disable}()
and ICL_DPCLKA_CFGCR0_TC_CLK_OFF part form icl_{map,unmap}_plls_to_ports()
2) ICL/TGL combo DDI + combo PHY
-> just ne
From: Ville Syrjälä
The DDI clock routing programming is riddled with shared
registers, forcing us to do a lot of RMW. Switch over to
intel_de_rmw() to make that a bit less obnoxious.
Reviewed-by: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 77 +
From: Ville Syrjälä
Extract the DDI clock routing for CNL into the new vfuncs.
v2: s/dev_priv/i915/ (Lucas)
Reviewed-by: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 62
1 file changed, 42 insertions(+), 20 deletions(-)
From: Ville Syrjälä
Replace dg1_{map,unmap}_plls_to_ports() with the appropriate
encoder vfuncs. And let's relocate the disable function next to
the enable function while at it.
Reviewed-by: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 43 +++
From: Ville Syrjälä
Extract the DDI clock routing clode for skl/derivatives
into the new encoder vfuncs.
v2: s/dev_priv/i915/ (Lucas)
Reviewed-by: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 53 +---
1 file changed, 38 inser
From: Ville Syrjälä
Yank out the HSW/BDW code from intel_ddi_clk_{select,disable}()
and put it into the new encoder .{enable,disable}_clock() vfuncs.
v2: s/dev_priv/i915/ (Lucas)
v3: Deal with FDI
Reviewed-by: Lucas De Marchi #v2
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/
From: Ville Syrjälä
We want to put all DDI clock routing code into one place.
Unify the FDI enable sequence to use the standard function
instead of hand rolling its own. The disable sequence already
uses the normal thing.
Cc: Lucas De Marchi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i9
From: Ville Syrjälä
The current code dealing with the clock routing for DDI encoders
is a maintenance nightmare. Let's start cleaning it up by allowing
the encoder to provide vfuncs for enablign/disabling the clock.
We leave them initially unimplemented, falling back to the old
if-else approach.
From: Ville Syrjälä
Sorry for spamming the same series again and again.
v2 still had some issues around FDI, and to fix those
I had to stick a fresh patch to the start of the series.
Hopefully it's now solid.
I have a few more patches already cooked up on top to
clean up the readout side too. Bu
== Series Details ==
Series: drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time
URL : https://patchwork.freedesktop.org/series/86773/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19609
Quoting Kees Cook (2021-02-05 21:20:33)
> On Fri, Feb 05, 2021 at 09:16:01PM +, Chris Wilson wrote:
> > The subject should of course be changed, as it is no longer being
> > enabled by default.
>
> "default n" is redundant.
I thought being explicit would be preferred. There are a few other
de
On Fri, Feb 05, 2021 at 09:16:01PM +, Chris Wilson wrote:
> The subject should of course be changed, as it is no longer being
> enabled by default.
"default n" is redundant. I thought Daniel said CONFIG_DRM needed to
"select" it too, though? Otherwise, yeah, this looks good. Was the
export due
On Fri, Feb 05, 2021 at 06:24:08PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 05, 2021 at 04:46:27PM +0100, Daniel Vetter wrote:
> > On Thu, Feb 04, 2021 at 05:55:28PM +0200, Ville Syrjälä wrote:
> > > On Thu, Feb 04, 2021 at 04:32:16PM +0100, Daniel Vetter wrote:
> > > > On Thu, Feb 04, 2021 at 04:
The subject should of course be changed, as it is no longer being
enabled by default.
Something like
kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE
Quoting Chris Wilson (2021-02-05 21:06:10)
> Userspace has discovered the functionality offered by SYS_kcmp and has
> started to dep
Userspace has discovered the functionality offered by SYS_kcmp and has
started to depend upon it. In particular, Mesa uses SYS_kcmp for
os_same_file_description() in order to identify when two fd (e.g. device
or dmabuf) point to the same struct file. Since they depend on it for
core functionality,
== Series Details ==
Series: series starting with [v2,1/2] drm/i915: cleanup the region
class/instance encoding
URL : https://patchwork.freedesktop.org/series/86753/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9737_full -> Patchwork_19602_full
==
== Series Details ==
Series: drm/i915: refactor intel_display.c + a bit more (rev2)
URL : https://patchwork.freedesktop.org/series/86723/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19608
Summary
---
On Fri, Feb 5, 2021 at 7:37 PM Kees Cook wrote:
>
> On Fri, Feb 05, 2021 at 04:37:52PM +, Chris Wilson wrote:
> > Userspace has discovered the functionality offered by SYS_kcmp and has
> > started to depend upon it. In particular, Mesa uses SYS_kcmp for
> > os_same_file_description() in order
On Fri, Feb 05, 2021 at 05:09:14PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 05, 2021 at 04:48:43PM +0200, Jani Nikula wrote:
> > From: Dave Airlie
> >
> > This just migrates the hsw+ code to a better place.
> >
> > Signed-off-by: Dave Airlie
> > Signed-off-by: Jani Nikula
> > ---
> > drivers
== Series Details ==
Series: drm/i915: refactor intel_display.c + a bit more (rev2)
URL : https://patchwork.freedesktop.org/series/86723/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gp
== Series Details ==
Series: drm/i915: refactor intel_display.c + a bit more (rev2)
URL : https://patchwork.freedesktop.org/series/86723/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2685c66ddd72 drm/i915: migrate skl planes code new file (v5)
-:2738: WARNING:FILE_PATH_CHANGES
On Mon, Feb 01, 2021 at 11:02:28PM +0800, Lee Shawn C wrote:
> According to Bspec #20124, max link rate table for DP was updated
> at BDB version 230. Max link rate can support upto UHBR.
>
> After migrate to BDB v230, the definition for LBR, HBR2 and HBR3
> were changed. For backward compatibilit
== Series Details ==
Series: drm/i915/gt: Ratelimit heartbeat completion probing (rev7)
URL : https://patchwork.freedesktop.org/series/86665/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19607
Summary
---
From: Ville Syrjälä
We tend to use output_format!=RGB as a shorthand for YCbCr, but
this fails if we have a disabled crtc where output_format==INVALID.
We're now getting some fail from intel_color_check() when we have:
hw.enable==false
hw.ctm!=NULL
output_format==INVALID
Let's avoid that by t
On Fri, Feb 05, 2021 at 11:09:36AM -0800, Khaled Almahallawy wrote:
> Link rate and lane count information are more easier and faster to check in
> i915_display_info
> than checking kernel logs for people not familiar with i915 in the following
> scenarios:
> * Debugging DP tunnel bandwidth usage
On Fri, Feb 05, 2021 at 10:06:48PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 05, 2021 at 12:07:41PM -0800, Navare, Manasi wrote:
> > On Fri, Feb 05, 2021 at 09:58:07PM +0200, Ville Syrjälä wrote:
> > > On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote:
> > > > DP-HDMI2.1 PCON has DSC e
On Fri, Feb 05, 2021 at 12:07:41PM -0800, Navare, Manasi wrote:
> On Fri, Feb 05, 2021 at 09:58:07PM +0200, Ville Syrjälä wrote:
> > On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote:
> > > DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E.
> > > Do not read the regis
On Fri, Feb 05, 2021 at 09:58:07PM +0200, Ville Syrjälä wrote:
> On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote:
> > DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E.
> > Do not read the registers if DPCD rev < 1.4.
> >
> > Fixes: https://gitlab.freedesktop.org/d
On Thu, Feb 04, 2021 at 12:18:42PM +0530, Ankit Nautiyal wrote:
> Remove code for resetting frl related members from intel_disable_dp, as
> this is not applicable for older platforms.
>
> Signed-off-by: Ankit Nautiyal
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 --
> 1 file changed, 2 de
On Thu, Feb 04, 2021 at 12:18:41PM +0530, Ankit Nautiyal wrote:
> Currently the FRL training mode (Concurrent, Sequential) and
> training type (Normal, Extended) are not defined properly and
> are passed as bool values in drm_helpers for pcon
> configuration for FRL training.
>
> This patch:
> -De
On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote:
> DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E.
> Do not read the registers if DPCD rev < 1.4.
>
> Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/2868
> Signed-off-by: Ankit Nautiyal
> ---
> drivers/
== Series Details ==
Series: RFC: dma-buf: Require VM_SPECIAL vma for mmap (rev2)
URL : https://patchwork.freedesktop.org/series/86667/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9740 -> Patchwork_19606
Summary
---
/linux.git
2ab38c17aac10bf55ab3efde4c4db3893d8691d2
config: i386-randconfig-s002-20210205 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-215-g0fb77bb6-dirty
#
https://github.com/0day-ci/li
/linux.git
2ab38c17aac10bf55ab3efde4c4db3893d8691d2
config: powerpc-randconfig-r023-20210205 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
c9439ca36342fb6013187d0a69aef92736951476)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com
== Series Details ==
Series: RFC: dma-buf: Require VM_SPECIAL vma for mmap (rev2)
URL : https://patchwork.freedesktop.org/series/86667/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a259cff180fc RFC: dma-buf: Require VM_PFNMAP vma for mmap
-:34: WARNING:TYPO_SPELLING: 'entires'
Link rate and lane count information are more easier and faster to check in
i915_display_info
than checking kernel logs for people not familiar with i915 in the following
scenarios:
* Debugging DP tunnel bandwidth usage in Thunderbolt driver.
* In USB4 certification, it is a requirement to know w
On 2/5/21 5:33 AM, Chris Wilson wrote:
> Quoting Sagar Ghuge (2021-02-05 00:33:10)
>> Adding this register to whitelist will allow UMD to toggle State Cache
>> Perf fix disable chicken bit.
>>
>>"If this bit is enabled, RCC uses BTP+BTI as address tag in its state
>>cache instead of BTI o
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