== Series Details ==
Series: x86/gpu: add JSL stolen memory support (rev2)
URL : https://patchwork.freedesktop.org/series/85983/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9647 -> Patchwork_19418
Summary
---
**SUC
This patch has a dependency on:
"drm/i915/jsl: Split EHL/JSL platform info and PCI ids"
Cc : Tejas Upadhyay
Cc : Matt Roper
Cc : Ville Syrjälä
Signed-off-by: William Tseng
---
arch/x86/kernel/early-quirks.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/early-quirks.c b/a
== Series Details ==
Series: Fix subplatform check!!
URL : https://patchwork.freedesktop.org/series/86063/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9647_full -> Patchwork_19417_full
Summary
---
**SUCCESS**
No
> -Original Message-
> From: Jani Nikula
> Sent: Friday, January 8, 2021 11:14 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Gupta, Anshuman
> ; ville.syrj...@linux.intel.com
> Subject: [PATCH v2 17/17] drm/i915/dp: split out aux functionality to
> intel_dp_aux.c
>
> Spl
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, January 14, 2021 2:27 PM
> To: Gupta, Anshuman
> Cc: intel-gfx@lists.freedesktop.org; ville.syrj...@linux.intel.com
> Subject: Re: [PATCH v2 15/17] drm/i915/pps: move pps code over from
> intel_display.c and refactor
>
> On We
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, January 14, 2021 2:16 PM
> To: Gupta, Anshuman
> Cc: intel-gfx@lists.freedesktop.org; ville.syrj...@linux.intel.com
> Subject: Re: [PATCH v2 14/17] drm/i915/pps: refactor init abstractions
>
> On Wed, 13 Jan 2021, Anshuman Gup
== Series Details ==
Series: drm/i915/display: Apply interactive priority to explicit flip fences
(rev3)
URL : https://patchwork.freedesktop.org/series/85989/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9646_full -> Patchwork_19415_full
=
== Series Details ==
Series: Fix subplatform check!!
URL : https://patchwork.freedesktop.org/series/86063/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9647 -> Patchwork_19417
Summary
---
**SUCCESS**
No regressio
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/tgl: Use TGL stepping info for
applying WAs
URL : https://patchwork.freedesktop.org/series/86051/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9646_full -> Patchwork_19414_full
==
Current code is checking only 2 bits in the subplatform, but actually 3
bits are allocated for the field. Check all 3 bits.
Fixes: 805446c8347c9 (drm/i915: Introduce concept of a sub-platform)
Cc: Tvrtko Ursulin
Signed-off-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1
It looks like 3 bits are allocated to the subplatform in each index of
platform_mask, but IS_PLATFORM only checks 2. Checking if I understood this
correctly.
Signed-off-by: Umesh Nerlige Ramappa
Umesh Nerlige Ramappa (1):
drm/i915: Check for all subplatform bits
drivers/gpu/drm/i915/i915_drv
== Series Details ==
Series: drm/i915/gt: Close race between enable_breadcrumbs and
cancel_breadcrumbs
URL : https://patchwork.freedesktop.org/series/86049/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9645_full -> Patchwork_19412_full
===
Hi all,
After merging the drm-intel tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
drivers/gpu/drm/msm/dp/dp_ctrl.c: In function 'dp_ctrl_use_fixed_nvid':
drivers/gpu/drm/msm/dp/dp_ctrl.c:1425:16: error: implicit declaration of
function 'drm_dp_get_edid_quirks'; did yo
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gem: Almagamate clflushes on
suspend
URL : https://patchwork.freedesktop.org/series/86058/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9646 -> Patchwork_19416
===
Let's not assume that the thread execution is instantaneous, but apply a
time limit as well as a maximum number so that the test should always run
in bounded time.
Also limit each thread to submitting only two pieces of outstanding work,
to minimise over-saturation. We use two alternating batches
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gem: Almagamate clflushes on
suspend
URL : https://patchwork.freedesktop.org/series/86058/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8184e40923e4 drm/i915/gem: Almagamate clflushes on suspend
-:24: WARNING
== Series Details ==
Series: drm/i915/display: Apply interactive priority to explicit flip fences
(rev3)
URL : https://patchwork.freedesktop.org/series/85989/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9646 -> Patchwork_19415
===
== Series Details ==
Series: drm/i915/userptr: detect un-GUP-able pages early (rev2)
URL : https://patchwork.freedesktop.org/series/85925/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9644_full -> Patchwork_19409_full
Summ
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/tgl: Use TGL stepping info for
applying WAs
URL : https://patchwork.freedesktop.org/series/86051/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9646 -> Patchwork_19414
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/tgl: Use TGL stepping info for
applying WAs
URL : https://patchwork.freedesktop.org/series/86051/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b4858a6d5ba2 drm/i915/tgl: Use TGL stepping info for applying WAs
== Series Details ==
Series: series starting with [1/6] drm/i915/gem: Almagamate clflushes on
suspend (rev2)
URL : https://patchwork.freedesktop.org/series/86046/
State : failure
== Summary ==
Applying: drm/i915/gem: Almagamate clflushes on suspend
Applying: drm/i915/gem: Almagamate clflushes
Give obj->mm.quirked a name much more reflective of its purpose
(i915_gem_object_has_tiling_quirk) and move it from the obj->mm field as
it doesn't denote a quirk of the backing store, but a quirk in the
object in its treatment of the backing pages, similar to tiling modes.
Then instead of abusing
In the shrinker, we protect framebuffers from light reclaim as we
typically expect framebuffers to be reused in the near future (and with
low latency requirements). We can apply the same logic to the GGTT
eviction and defer framebuffers to the second pass only used if the
caller is desperate enough
When flushing objects larger than the CPU cache it is preferrable to use
a single wbinvd() rather than overlapping clflush(). At runtime, we
avoid wbinvd() due to its system-wide latencies, but during
singlethreaded suspend, no one will observe the imposed latency and we
can opt for the faster wbin
Simplify the frontbuffer unpin by removing the lock requirement. The LRU
bumping was primarily to protect the GTT from being evicted and from
frontbuffers being eagerly shrunk. Now we protect frontbuffers from the
shrinker, and we avoid accidentally evicting from the GTT, so the
benefit from bumpin
The obj->stolen is currently used to identify an object allocated from
stolen memory. This dates back to when there were just 1.5 types of
objects, an object backed by shmemfs and an object backed by shmemfs
with a contiguous physical address. Now that we have several different
types of objects, we
When flushing objects larger than the CPU cache it is preferrable to use
a single wbinvd() rather than overlapping clflush(). At runtime, we
avoid wbinvd() due to its system-wide latencies, but during
singlethreaded suspend, no one will observe the imposed latency and we
can opt for the faster wbin
== Series Details ==
Series: drm/i915/gt: Close race between enable_breadcrumbs and
cancel_breadcrumbs
URL : https://patchwork.freedesktop.org/series/86049/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9645 -> Patchwork_19412
=
Currently, if a modeset/pageflip needs to wait for render completion to
an object, we boost the priority of that rendering above all other work.
We can apply the same interactive priority boosting to explicit fences
that we can unwrap into a native i915_request (i.e. sync_file).
Signed-off-by: Chr
== Series Details ==
Series: drm/i915/gt: Close race between enable_breadcrumbs and
cancel_breadcrumbs
URL : https://patchwork.freedesktop.org/series/86049/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fea4ba0eedd9 drm/i915/gt: Close race between enable_breadcrumbs and
cance
== Series Details ==
Series: drm/i915/dp: read eDP sink MSO configuration (rev2)
URL : https://patchwork.freedesktop.org/series/86036/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9645 -> Patchwork_19411
Summary
---
== Series Details ==
Series: series starting with [1/4] drm/i915: Fix the sgt.pfn sanity check
URL : https://patchwork.freedesktop.org/series/86044/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9643_full -> Patchwork_19408_full
== Series Details ==
Series: drm/i915/dp: read eDP sink MSO configuration (rev2)
URL : https://patchwork.freedesktop.org/series/86036/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/g
== Series Details ==
Series: series starting with [1/9] drm/i915/gt: Show the per-engine runtime in
sysfs (rev2)
URL : https://patchwork.freedesktop.org/series/86040/
State : failure
== Summary ==
Applying: drm/i915/gt: Show the per-engine runtime in sysfs
Applying: drm/i915: Expose list of c
On Mon, Jan 11, 2021 at 11:30:00AM -0800, Aditya Swarup wrote:
From: Caz Yokoyama
- Add the initial platform information for Alderlake-S.
- Specify ppgtt_size value
- Add dma_mask_size
- Add ADLS REVIDs
- HW tracking(Selective Update Tracking Enable) has been
removed from ADLS. Disable PSR2 ti
== Series Details ==
Series: drm/syncobj: Fix use-after-free
URL : https://patchwork.freedesktop.org/series/86043/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9643_full -> Patchwork_19407_full
Summary
---
**FAILURE
From: Aditya Swarup
TGL adds another level of indirection for applying WA based on stepping
information rather than PCI REVID. So change TGL_REVID enum into
stepping enum and use PCI REVID as index into revid to stepping table to
fetch correct display and GT stepping for application of WAs as
sug
From: Caz Yokoyama
- Add the initial platform information for Alderlake-S.
- Specify ppgtt_size value
- Add dma_mask_size
- Add ADLS REVIDs
- HW tracking(Selective Update Tracking Enable) has been
removed from ADLS. Disable PSR2 till we enable software/
manual tracking.
v2:
- Add support for
== Series Details ==
Series: drm/i915/userptr: detect un-GUP-able pages early (rev2)
URL : https://patchwork.freedesktop.org/series/85925/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9644 -> Patchwork_19409
Summary
--
> On Jan 19, 2021, at 03:29, Lee Jones wrote:
>
> On Mon, 18 Jan 2021, Daniel Vetter wrote:
>
>> On Mon, Jan 18, 2021 at 03:09:45PM +, Lee Jones wrote:
>>> On Mon, 18 Jan 2021, Daniel Vetter wrote:
>>>
On Fri, Jan 15, 2021 at 06:27:15PM +, Zack Rusin wrote:
>
>> On Jan
On Wed, Jan 13, 2021 at 02:09:32PM -0800, Manasi Navare wrote:
> From: Ville Syrjälä
>
> With VRR the earliest the registers can get latched are at
> flipline decision boundary, calculate that as vrr_vmin_vblank_start()
> and the latest the regsiters can get latched are vmax decision boundary
> c
On Wed, Jan 13, 2021 at 02:09:17PM -0800, Manasi Navare wrote:
> This series address review comments from Ville
> and incorporates some suggested fixes plus his
> patches.
>
> Aditya Swarup (1):
> drm/i915/display/dp: Attach and set drm connector VRR property
>
> Manasi Navare (8):
> drm/i915
== Series Details ==
Series: drm/i915/userptr: detect un-GUP-able pages early (rev2)
URL : https://patchwork.freedesktop.org/series/85925/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c3761c13da43 drm/i915/userptr: detect un-GUP-able pages early
-:89: CHECK:PARENTHESIS_ALIGNME
On 1/11/21 2:19 PM, Patchwork wrote:
> == Series Details ==
>
> Series: Use TGL stepping info and add ADLS platform changes (rev2)
> URL : https://patchwork.freedesktop.org/series/85639/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_9581_full -> Patchwork_19317_full
On Thu, Jan 14, 2021 at 10:38:21AM +, Chris Wilson wrote:
> Verify that context isolation is also preserved when accessing
> context-local registers with relative-mmio commands.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 88 --
>
== Series Details ==
Series: series starting with [1/4] drm/i915: Fix the sgt.pfn sanity check
URL : https://patchwork.freedesktop.org/series/86044/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9643 -> Patchwork_19408
Summ
On Tue, Jan 19, 2021 at 09:43:56AM +0200, Almahallawy, Khaled wrote:
> > > [...]
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > > b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index 79c27f91f42c..5044201ca742 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/d
On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
>
> When flushing objects larger than the CPU cache it is preferrable to use
> a single wbinvd() rather than overlapping clflush(). At runtime, we
> avoid wbinvd() due to its system-wide latencies, but during
> singlethreaded suspend, no one will o
On Tue, 19 Jan 2021 at 17:02, Chris Wilson wrote:
>
> Quoting Matthew Auld (2021-01-19 16:38:04)
> > On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
> > >
> > > Simplify the frontbuffer unpin by removing the lock requirement. The LRU
> > > bumping was primarily to protect the GTT from being evi
== Series Details ==
Series: drm/syncobj: Fix use-after-free
URL : https://patchwork.freedesktop.org/series/86043/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9643 -> Patchwork_19407
Summary
---
**SUCCESS**
No r
Quoting Matthew Auld (2021-01-19 16:38:04)
> On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
> >
> > Simplify the frontbuffer unpin by removing the lock requirement. The LRU
> > bumping was primarily to protect the GTT from being evicted and from
> > frontbuffers being eagerly shrunk. Now we pro
Quoting Ville Syrjälä (2021-01-19 16:42:36)
> On Mon, Jan 18, 2021 at 11:59:29AM +, Chris Wilson wrote:
> > +void i915_gem_fence_wait_priority(struct dma_fence *fence,
> > + const struct i915_sched_attr *attr)
> > +{
> > + if (dma_fence_is_signaled(fence))
> >
On Mon, Jan 18, 2021 at 11:59:29AM +, Chris Wilson wrote:
> Currently, if a modeset/pageflip needs to wait for render completion to
> an object, we boost the priority of that rendering above all other work.
> We can apply the same interactive priority boosting to explicit fences
> that we can u
On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
>
> Simplify the frontbuffer unpin by removing the lock requirement. The LRU
> bumping was primarily to protect the GTT from being evicted and from
> frontbuffers being eagerly shrunk. Now we protect frontbuffers from the
> shrinker, and we avoid a
== Series Details ==
Series: drm/syncobj: Fix use-after-free
URL : https://patchwork.freedesktop.org/series/86043/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9ced0389047e drm/syncobj: Fix use-after-free
-:64: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gt: One more flush for Baytrail
clear residuals
URL : https://patchwork.freedesktop.org/series/86038/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9643 -> Patchwork_19406
If we enable_breadcrumbs for a request while that request is being
removed from HW; we may see that the request is active as we take the
ce->signal_lock and proceed to attach the request to ce->signals.
However, during unsubmission after marking the request as inactive, we
see that the request has
On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
>
> flush_write_domain() is only used within the GEM domain managament code,
management
> so move it to i915_gem_domain.c and drop the export.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mat
On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, Jan 19, 2021 at 10:52:47AM -0500, Rodrigo Vivi wrote:
> On Mon, Jan 11, 2021 at 05:30:00PM -0800, Matt Roper wrote:
> > On Mon, Jan 11, 2021 at 07:21:55PM -0500, Rodrigo Vivi wrote:
> > > On Fri, Jan 08, 2021 at 05:39:22PM +0530, Tejas Upadhyay wrote:
> > > > We have TGP PCH support for Tig
== Series Details ==
Series: series starting with [CI,1/6] drm/i915/gt: One more flush for Baytrail
clear residuals
URL : https://patchwork.freedesktop.org/series/86038/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't b
On Mon, Jan 11, 2021 at 05:30:00PM -0800, Matt Roper wrote:
> On Mon, Jan 11, 2021 at 07:21:55PM -0500, Rodrigo Vivi wrote:
> > On Fri, Jan 08, 2021 at 05:39:22PM +0530, Tejas Upadhyay wrote:
> > > We have TGP PCH support for Tigerlake and Rocketlake. Similarly
> > > now TGP PCH can be used with Co
On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoting Matthew Auld (2021-01-19 15:30:41)
> On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
> >
> > When flushing objects larger than the CPU cache it is preferrable to use
> > a single wbinvd() rather than overlapping clflush(). At runtime, we
> > avoid wbinvd() due to its system-wide latencie
On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
>
> When flushing objects larger than the CPU cache it is preferrable to use
> a single wbinvd() rather than overlapping clflush(). At runtime, we
> avoid wbinvd() due to its system-wide latencies, but during
> singlethreaded suspend, no one will o
On Tue, 19 Jan 2021 at 14:49, Chris Wilson wrote:
>
> When flushing objects larger than the CPU cache it is preferrable to use
> a single wbinvd() rather than overlapping clflush(). At runtime, we
> avoid wbinvd() due to its system-wide latencies, but during
> singlethreaded suspend, no one will o
FYI patches 1 and 5 are now in drm-misc-next.
Am 18.01.21 um 14:14 schrieb Thomas Zimmermann:
I merged more patches into drm-misc-next. I'm mostly sending out v4 of
this patchset to split the final patch into the core changes and the
patch for moving pdev behind CONFIG_DRM_LEGACY. The former are
When flushing objects larger than the CPU cache it is preferrable to use
a single wbinvd() rather than overlapping clflush(). At runtime, we
avoid wbinvd() due to its system-wide latencies, but during
singlethreaded suspend, no one will observe the imposed latency and we
can opt for the faster wbin
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 4 ++--
drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 ++
drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 4 ++--
drivers/gpu/drm/i915/gem/i915_gem_phys.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem
flush_write_domain() is only used within the GEM domain managament code,
so move it to i915_gem_domain.c and drop the export.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 58 +++---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 47 --
Simplify the frontbuffer unpin by removing the lock requirement. The LRU
bumping was primarily to protect the GTT from being evicted and from
frontbuffers being eagerly shrunk. Now we protect frontbuffers from the
shrinker, and we avoid accidentally evicting from the GTT, so the
benefit from bumpin
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_object.h| 18 ++
.../gpu/drm/i915/gem/i915_gem_object_types.h | 7 +--
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 19 +++
drivers/gpu/drm/i915/gem/i915_gem_phys.c | 2 +-
drivers
When flushing objects larger than the CPU cache it is preferrable to use
a single wbinvd() rather than overlapping clflush(). At runtime, we
avoid wbinvd() due to its system-wide latencies, but during
singlethreaded suspend, no one will observe the imposed latency and we
can opt for the faster wbin
Hi Dan,
On Tue, Jan 19, 2021 at 11:29:37AM +0300, Dan Carpenter wrote:
> Hi Imre,
>
> url:
> https://github.com/0day-ci/linux/commits/Imre-Deak/drm-i915-gen12-Add-display-render-clear-color-decompression-support/20210115-113136
> ...
> d5de4516a9de74 drivers/gpu/drm/i915/display/intel_display
== Series Details ==
Series: drm/i915/dp: read eDP sink MSO configuration
URL : https://patchwork.freedesktop.org/series/86036/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9640 -> Patchwork_19405
Summary
---
**FAIL
From: Tvrtko Ursulin
Expose a list of clients with open file handles in sysfs.
This will be a basis for a top-like utility showing per-client and per-
engine GPU load.
Currently we only expose each client's pid and name under opaque numbered
directories in /sys/class/drm/card0/clients/.
For in
On 1/15/21 4:56 PM, Chris Wilson wrote:
> Quoting Jinoh Kang (2021-01-15 16:23:31)
>> If GUP-ineligible pages are passed to a GEM userptr object, -EFAULT is
>> returned only when the object is actually bound.
>>
>> The xf86-video-intel userspace driver cannot differentiate this
>> condition, and ma
On 1/15/21 5:07 PM, Chris Wilson wrote:
> Quoting Chris Wilson (2021-01-15 16:56:42)
>> Quoting Jinoh Kang (2021-01-15 16:23:31)
>>> If GUP-ineligible pages are passed to a GEM userptr object, -EFAULT is
>>> returned only when the object is actually bound.
>>>
>>> The xf86-video-intel userspace dri
== Series Details ==
Series: drm/i915/dp: read eDP sink MSO configuration
URL : https://patchwork.freedesktop.org/series/86036/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: One more flush for Baytrail
clear residuals
URL : https://patchwork.freedesktop.org/series/86034/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9640 -> Patchwork_19404
===
Looks like it belongs there anyway, otherwise we have to include the
entirety of i915_gem_object.h just to get at the enum.
Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_object.h | 8
drivers/gpu/drm/i915/gem/i915_gem_object_types.h |
In a few places we always end up mapping the pool object with the FORCE
constraint(to prevent hitting -EBUSY) which will destroy the cached
mapping if it has a different type. As a simple first step, make the
mapping type part of the pool interface, where the behaviour is to only
give out pool obje
From: Kui Wen
For the device local-memory case, sgt.pfn will always be equal to zero,
since we instead use sgt.dma. Also, for device local-memory it is
perfectly valid for it to start from zero anyway, so no need to add a
new check for that either.
Signed-off-by: Kui Wen
Signed-off-by: Matthew
From: CQ Tang
io_mapping_map_wc() expects the offset to be relative to the iomapping
base address. Currently we just pass in the physical address for the
page which only works if the region.start starts at zero.
Signed-off-by: CQ Tang
Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
---
Am 19.01.21 um 14:03 schrieb Daniel Vetter:
While reviewing Christian's annotation patch I noticed that we have a
user-after-free for the WAIT_FOR_SUBMIT case: We drop the syncobj
reference before we've completed the waiting.
Of course usually there's nothing bad happening here since userspace
k
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: One more flush for Baytrail
clear residuals
URL : https://patchwork.freedesktop.org/series/86034/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be c
== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev23)
URL : https://patchwork.freedesktop.org/series/84620/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9640 -> Patchwork_19403
Summary
--
While reviewing Christian's annotation patch I noticed that we have a
user-after-free for the WAIT_FOR_SUBMIT case: We drop the syncobj
reference before we've completed the waiting.
Of course usually there's nothing bad happening here since userspace
keeps the reference, but we can't rely on users
== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev23)
URL : https://patchwork.freedesktop.org/series/84620/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ca9c47130ec2 drm/i915/pxp: Introduce Intel PXP component
-:123: WARNING:FILE_PATH_CHANGES
On Tue, 2021-01-19 at 09:42 +0100, Janusz Krzysztofik wrote:
> Since igt_fixture sections are processed unconditionally regardless
> of
> which subtest has been requested, they can now emit a lot of
> unrelated
> debug messages which can make the picture less clear. Avoid emitting
> those messages
From: Tvrtko Ursulin
When available prefer context tracked context busyness because it provides
visibility into currently executing contexts as well.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamsetty
Reviewed-by: Chris Wilson
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/
Since we already report the per-engine runtime via PMU (using sampling
if a direct measure is not available), and in debugfs, also trivially
include the information for each engine under sysfs as a read-only
property. We only present the total milliseconds to hide any misleading
accuracy and to pur
From: Tvrtko Ursulin
If we make GEM contexts keep a reference to i915_drm_client for the whole
of their lifetime, we can consolidate the current task pid and name usage
by getting it from the client.
v2: Don't bother supporting selftests contexts from debugfs. (Chris)
v3 (Lucas): Finish construc
From: Tvrtko Ursulin
Some clients have the DRM fd passed to them over a socket by the X server.
Grab the real client and pid when they create their first context and
update the exposed data for more useful enumeration.
To enable lockless access to client name and pid data from the following
pat
From: Tvrtko Ursulin
We soon want to start answering questions like how much GPU time is the
context belonging to a client which exited still using.
To enable this we start tracking all context belonging to a client on a
separate list.
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Aravind Iddamse
From: Tvrtko Ursulin
Expose per-client and per-engine busyness under the previously added sysfs
client root.
The new files are one per-engine instance and located under the 'busy'
directory. Each contains a monotonically increasing nano-second resolution
times each client's jobs were executing o
From: Tvrtko Ursulin
Expose a list of clients with open file handles in sysfs.
This will be a basis for a top-like utility showing per-client and per-
engine GPU load.
Currently we only expose each client's pid and name under opaque numbered
directories in /sys/class/drm/card0/clients/.
For in
From: Tvrtko Ursulin
Track context active (on hardware) status together with the start
timestamp.
This will be used to provide better granularity of context
runtime reporting in conjunction with already tracked pphwsp accumulated
runtime.
The latter is only updated on context save so does not g
From: Tvrtko Ursulin
As contexts are abandoned we want to remember how much GPU time they used
(per class) so later we can used it for smarter purposes.
As GEM contexts are closed we want to have the DRM client remember how
much GPU time they used (per class) so later we can used it for smarter
drm-misc-next-2021-01-19:
drm-misc-next for v5.12:
UAPI Changes:
- Fix fourcc macro for amlogic video fbc.
Cross-subsystem Changes:
- Export pci_rebar_bytes_to_size.
- Add a PCI quirk to increase bar0 for RX 5600 XT Pulse to max possible size.
- Convert devicetree bindings to use the OF graph sch
1 - 100 of 134 matches
Mail list logo
