== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev22)
URL : https://patchwork.freedesktop.org/series/84620/
State : failure
== Summary ==
Applying: drm/i915/pxp: Add plane decryption support
Applying: drm/i915/pxp: set KCR reg init during the boot time
Using
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. pxp session is enabled.
2. Buffer object is protected.
v2:
- Rebased to libva_cp-drm-tip_tgl_cp tree.
- Used gen fb obj user_flags instead gem_objec
== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev21)
URL : https://patchwork.freedesktop.org/series/84620/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9629 -> Patchwork_19387
Summary
--
On 2021.01.15 13:01:49 +0200, Joonas Lahtinen wrote:
> Quoting Jani Nikula (2021-01-15 12:50:54)
> > On Thu, 14 Jan 2021, Zhenyu Wang wrote:
> > > On 2021.01.14 08:58:19 +0800, Xiong Zhang wrote:
> > >> From: Zhenyu Wang
> > >>
> > >> Some vmm like hyperv and crosvm don't supply any ISA bridge t
== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev21)
URL : https://patchwork.freedesktop.org/series/84620/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4396cc471fa4 drm/i915/pxp: Introduce Intel PXP component
-:123: WARNING:FILE_PATH_CHANGES
Create the irq worker that serves as callback handler, those
callback stubs should be called while the hardware key teardown
occurs.
rev21:
- Fix bug, access i915 pointer before assigning the value at
intel_pxp_irq_handler()
- Writing register GEN11_CRYPTO_RSVD_INTR_ENABLE to enable the P
From: Bommu Krishnaiah
This api allow user mode to create Protected buffer and context creation.
rev21:
- Only allow set I915_CONTEXT_PARAM_PROTECTED_CONTENT during context
creation (i915_gem_context_create_ioctl), but not allow during
context set param (i915_gem_context_setparam
During the power event S3+ sleep/resume, hardware will lose all the
encryption keys for every hardware session, even though the
software session state was marked as alive after resume. So to
handle such case, PXP should terminate all the hardware sessions
and cleanup all the software states after t
From: Bommu Krishnaiah
Same old gem_create but with now with extensions support. This is needed
to support various upcoming usecases. For now we use the extensions
mechanism to support PAVP.
rev21:
- Fix "Fi.CI.CHECKPATCH" warnings
Signed-off-by: Bommu Krishnaiah
Signed-off-by: Matthew Aul
Teardown is triggered when the display topology changes and no
long meets the secure playback requirement, and hardware trashes
all the encryption keys for display. So as a result, PXP should
handle such case and terminate the type0 sessions, which including
arb session
rev21:
- Bug fixing, we
Implement the intel_pxp_gem_object_status() to allow i915 display
querying the current PXP session state. In the design, display
should not perform protection flip on the protected buffers if
there is no PXP session alive. And Implement the funciton to set
the protected flag for gem context.
Signe
From: Anshuman Gupta
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PAVP session is enabled.
2. Buffer object is protected.
v2:
- Rebased to libva_cp-drm-tip_tgl_cp tree.
- Used gen fb obj user
Implement the funcs to create the TEE channel, so kernel can
send the TEE commands directly to TEE for creating the arbitrary
(default) session.
rev21:
- Remove debug print_hex_dump() from intel_pxp_tee_io_message()
- In struct i915_pxp_component_ops, change "receive" to "recv"
Signed-off
Implement the functions to allow PXP to send a GPU command, in
order to terminate the hardware session, so hardware can recycle
this session slot for the next usage.
rev21:
In intel_pxp_cmd.c:
- Remove the debug print as well as print_hex_dump()
- Should call i915_gem_object_flush_map(
Create the arbitrary session, with the fixed session id 0xf, after
system boot, for the case that application allocates the protected
buffer without establishing any protection session. Because the
hardware requires at least one alive session for protected buffer
creation. This arbitrary session n
From: Vitaly Lubart
Export PAVP client to work with i915_cp driver,
for binding it uses kernel component framework.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/Kconfig | 2 +
drivers/misc/mei/Makefile | 1 +
drivers/misc/mei/pxp/Kconfig | 1
Set the KCR init during the boot time, which is
required by hardware, to allow us doing further
protection operation such as sending commands to
GPU or TEE.
rev21:
- Remove "#define KCR_INIT_MASK_SHIFT (16)", but still keep the
macro in this .c file
- Write KCR_INIT reg inly for gen1
PXP (Protected Xe Path) is an i915 componment, available on GEN12+,
that helps to establish the hardware protected session and manage
the status of the alive software session, as well as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session (
PXP (Protected Xe Path) is an i915 component, available on
GEN12+ that helps to establish the hardware protected session
and manage the status of the alive software session, as well
as its life cycle.
This patch series is to allow the kernel space to create and
manage a single hardware session (a.
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev2)
URL : https://patchwork.freedesktop.org/series/84494/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9629 -> Patchwork_19386
Summary
---
**F
Hi,
This is GVT next for 5.12 against drm-intel-gt-next which is mostly
for cmd parser enhancement which adds extra check on register load
depending on initial context and handles vGPU register state
accordingly.
Thanks.
--
The following changes since commit fe7bcfaeb2b775f257348dc7b935f8e80eef3
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev2)
URL : https://patchwork.freedesktop.org/series/84494/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4261de669e0b vfio/pci: Add support for opregion v2.0+
-:74: CHECK:PARENTHESIS_ALIGNMENT: Alignment sh
> -Original Message-
> From: Chris Wilson
> Sent: Sunday, January 17, 2021 1:30 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Mika Kuoppala
> ; Abodunrin, Akeem G
>
> Subject: [PATCH] drm/i915/gt: Clear CACHE_MODE prior to clearing residuals
>
> Since we do a bare cont
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
However, When VBT data exceeds 6KB size and cannot be within mailbox #4
starting from opregion v2.0+, Extended VBT region, next to opregion, is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT
== Series Details ==
Series: drm/i915: support two CSC module on gen11 and later (rev3)
URL : https://patchwork.freedesktop.org/series/85847/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9629 -> Patchwork_19385
Summary
---
There are two CSC on pipeline on gen11 and later platform.
User space application is allowed to enable CTM and RGB
to YCbCr coversion at the same time now.
v2: check csc capability in {}_color_check function.
v3: can't support two CSC at the same time in {ivb,glk}_color_check.
Cc: Ville Syrjala
On Mon, 18 Jan 2021 at 10:59, Stephen Rothwell wrote:
>
> Hi all,
>
> On Mon, 11 Jan 2021 10:56:54 +1100 Stephen Rothwell
> wrote:
> >
> > On Fri, 8 Jan 2021 12:25:40 +1100 Stephen Rothwell
> > wrote:
> > >
> > > On Fri, 8 Jan 2021 11:55:18 +1100 Stephen Rothwell
> > > wrote:
> > > >
> > > >
Hi all,
On Mon, 11 Jan 2021 10:56:54 +1100 Stephen Rothwell
wrote:
>
> On Fri, 8 Jan 2021 12:25:40 +1100 Stephen Rothwell
> wrote:
> >
> > On Fri, 8 Jan 2021 11:55:18 +1100 Stephen Rothwell
> > wrote:
> > >
> > > After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
>
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/gt: Reduce engine runtime stats
from seqlock to a latch
URL : https://patchwork.freedesktop.org/series/85967/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9628_full -> Patchwork_19384_full
==
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/gt: Reduce engine runtime stats
from seqlock to a latch
URL : https://patchwork.freedesktop.org/series/85967/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9628 -> Patchwork_19384
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/gt: Reduce engine runtime stats
from seqlock to a latch
URL : https://patchwork.freedesktop.org/series/85967/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit
== Series Details ==
Series: drm/i915/gt: Add arbitration check before semaphore wait
URL : https://patchwork.freedesktop.org/series/85964/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9628_full -> Patchwork_19383_full
Sum
Since we can compute the elapsed time to add to the total, during the
PMU sample we only need to have a consistent view of the (start, total,
active) tuple to be able to locally determine the runtime. That can be
arrange by a pair of memory bariiers and carefully sequencing of the
writes and reads.
Since we can compute the elapsed time to add to the total, during the
PMU sample we only need to have a consistent view of the (start, total,
active) tuple to be able to locally determine the runtime. That can be
arrange by a pair of memory bariiers and carefully sequencing of the
writes and reads.
Mesa uses set-cache-level on userptr, so verify it doesn't arbitrary
fail.
Signed-off-by: Chris Wilson
---
tests/i915/gem_userptr_blits.c | 41 ++
1 file changed, 41 insertions(+)
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index
== Series Details ==
Series: drm/i915/gt: Clear CACHE_MODE prior to clearing residuals (rev3)
URL : https://patchwork.freedesktop.org/series/85962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9628_full -> Patchwork_19382_full
=
== Series Details ==
Series: drm/i915/gt: Add arbitration check before semaphore wait
URL : https://patchwork.freedesktop.org/series/85964/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9628 -> Patchwork_19383
Summary
-
Similar to commit 49b20dbf7497 ("drm/i915/gt: Perform an arbitration
check before busywaiting"), also add a check prior to the busywait
on gen8+, as we have now seen (because we added a selftest to add fault
injection into the engine resets) the same engine reset failure leading
to an indefinite wa
== Series Details ==
Series: drm/i915/gt: Clear CACHE_MODE prior to clearing residuals (rev3)
URL : https://patchwork.freedesktop.org/series/85962/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9628 -> Patchwork_19382
Summa
Since we do a bare context switch with no restore, the clear residual
kernel runs on dirty state, and we must be careful to avoid executing
bad state from context registers inherited from a malicious client.
Fixes: 008ead6ef8f5 ("drm/i915/gt: Restore clear-residual mitigations for
Ivybridge, Bayt
40 matches
Mail list logo
