== Series Details ==
Series: drm/i915: Try to guess PCH type even without ISA bridge (rev3)
URL : https://patchwork.freedesktop.org/series/84886/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9596 -> Patchwork_19330
Summary
== Series Details ==
Series: drm/i915: Try to guess PCH type even without ISA bridge (rev3)
URL : https://patchwork.freedesktop.org/series/84886/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+dr
From: Zhenyu Wang
Some vmm like hyperv and crosvm don't supply any ISA bridge to their guest,
when igd passthrough is equipped on these vmm, guest i915 display may
couldn't work as guest i915 detects PCH_NONE pch type.
When i915 runs as guest, this patch guess pch type through gpu type even
with
Sparse warning was not related to this patch series.
Pushed to drm-intel-next.
Thanks for Reviews and Ack.
Thanks,
Anshuman Gupta
> -Original Message-
> From: Patchwork
> Sent: Monday, January 11, 2021 2:07 PM
> To: Gupta, Anshuman
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.
== Series Details ==
Series: series starting with [v2,1/4] drm/i915/guc: Delete GuC code unused in
future patches
URL : https://patchwork.freedesktop.org/series/85778/
State : failure
== Summary ==
Patch is empty.
When you have resolved this problem, run "git am --continue".
If you prefer to
== Series Details ==
Series: drm/i915/lmem: make intel_region_lmem_ops static
URL : https://patchwork.freedesktop.org/series/85763/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9595_full -> Patchwork_19327_full
Summary
---
Initialize all required entries from guc_set_default_submission, instead
of calling the execlists function. The previously inherited setup has
been copied over from the execlist code and simplified by removing the
execlists submission-specific parts.
v2: move setting of relative_mmio flag to engin
Instead of starting the engine in execlists submission mode and then
switching to GuC, start directly in GuC submission mode. The initial
setup functions have been copied over from the execlists code
and simplified by removing the execlists submission-specific parts.
v2: remove unneeded unexpected
GuC owns the execlists state and the context IDs used for submission, so
the status of the ports and the CSB entries are not something we control
or can decode from the i915 side, therefore we can avoid dumping it. A
follow-up patch will also stop setting the csb pointers when using GuC
submission.
From: Matthew Brost
Delete GuC code unused in future patches that rewrite the GuC interface
to work with the new firmware. Most of the code deleted relates to
workqueues or execlist port. The code is safe to remove because we still
don't allow GuC submission to be enabled, even when overriding th
Now that we have a common set of function for general lrc management,
the only remaining dependency the guc submission code has towards the
execlists submission is the engine setup. This series gets rid of that
by copying the required execlists setup function in the GuC submission
file; the copied
== Series Details ==
Series: drm/i915/region: make intel_region_map static
URL : https://patchwork.freedesktop.org/series/85761/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9595_full -> Patchwork_19326_full
Summary
--
On 1/6/2021 11:43 AM, Chris Wilson wrote:
Quoting Daniele Ceraolo Spurio (2021-01-06 17:21:16)
On 1/5/2021 6:55 PM, Chris Wilson wrote:
Quoting Daniele Ceraolo Spurio (2021-01-06 02:32:28)
On 1/5/2021 4:58 PM, Chris Wilson wrote:
Quoting Daniele Ceraolo Spurio (2021-01-05 23:19:44)
GuC o
On Fri, Dec 04, 2020 at 05:08:31PM -0800, Aditya Swarup wrote:
> Add changes to configure port clock registers for ADL-S. Combo phy port
> clocks are configured by DPCLKA_CFGCR0 and DPCLKA_CFGCR1 registers.
>
> The DDI to internal clock mappings in DPCLKA_CFGCR0 register for ADL-S
> translates to
== Series Details ==
Series: drm/i915/debugfs : PM_REQ and PM_RES registers (rev2)
URL : https://patchwork.freedesktop.org/series/85437/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9594_full -> Patchwork_19324_full
Summar
On Tue, 2021-01-12 at 22:35 +0200, Imre Deak wrote:
> On Tue, Jan 12, 2021 at 08:10:40PM +0200, Ville Syrjälä wrote:
> > On Tue, Dec 29, 2020 at 07:22:01PM +0200, Imre Deak wrote:
> > > The DP PHY vswing/pre-emphasis level programming the driver does
> > > is
> > > related to the DPTX -> first LTTP
Quoting Matthew Auld (2021-01-12 17:26:41)
> On Tue, 12 Jan 2021 at 17:23, Jani Nikula wrote:
> >
> > There are no users outside of intel_region_lmem.c.
> >
> > Signed-off-by: Jani Nikula
> Reviewed-by: Matthew Auld
I pushed this and its companion, and then applied Matthew's git mv.
Thanks,
-Ch
Quoting Matthew Auld (2021-01-12 16:43:00)
> Device local-memory should be thought of as part the GT, which means it
> should also sit under gt/.
>
> Suggested-by: Chris Wilson
> Signed-off-by: Matthew Auld
No significant change, yet.
Reviewed-by: Chris Wilson
-Chris
__
Quoting Mika Kuoppala (2021-01-12 17:07:13)
> > + if (count & 1) {
> > + err = intel_engine_reset(engine, NULL);
> > + if (err) {
> > + GEM_TRACE_ERR("intel_engine_reset(%s)
> > failed,
Quoting Mika Kuoppala (2021-01-12 19:19:34)
> Chris Wilson writes:
>
> > In our tests where we measure the elapsed time on both the CPU and CS
> > using a udelay, our CS results match the udelay much more accurately
> > than the ktime (even when using ktime_get_fast_ns). With preemption
> > disab
On Tue, Jan 12, 2021 at 08:10:40PM +0200, Ville Syrjälä wrote:
> On Tue, Dec 29, 2020 at 07:22:01PM +0200, Imre Deak wrote:
> > The DP PHY vswing/pre-emphasis level programming the driver does is
> > related to the DPTX -> first LTTPR link segment only. Accordingly it
> > should be only programmed
== Series Details ==
Series: drm/i915/lmem: make intel_region_lmem_ops static
URL : https://patchwork.freedesktop.org/series/85763/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9595 -> Patchwork_19327
Summary
---
**
== Series Details ==
Series: Introduce Intel PXP component - Mesa single session (rev20)
URL : https://patchwork.freedesktop.org/series/84620/
State : failure
== Summary ==
Applying: drm/i915/pxp: Introduce Intel PXP component
Applying: drm/i915/pxp: set KCR reg init during the boot time
Apply
== Series Details ==
Series: drm/i915/region: make intel_region_map static
URL : https://patchwork.freedesktop.org/series/85761/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9595 -> Patchwork_19326
Summary
---
**SUC
Chris Wilson writes:
> In our tests where we measure the elapsed time on both the CPU and CS
> using a udelay, our CS results match the udelay much more accurately
> than the ktime (even when using ktime_get_fast_ns). With preemption
> disabled, we can go one step lower than ktime and use local_c
Hi Rodrigo,
According to our design we terminate the session after resume, and then
re-create the session at i915_pxp_tee_component_bind() in intel_pxp_tee.c
We only can terminate the session after resume, instead of during the
intel_pxp_pm_prepare_suspend() call, because there is a change that
Hi Rodrigo,
I made the modification as below according to Chris and your suggestion, will
reflect at rev20. All my comments (// sean: ...) the won't be checked in.
This change can address part of the comment Chris provided. But please let me
go through the remaining comments at rev19 first.
Be
On Tue, Dec 29, 2020 at 07:22:01PM +0200, Imre Deak wrote:
> The DP PHY vswing/pre-emphasis level programming the driver does is
> related to the DPTX -> first LTTPR link segment only. Accordingly it
> should be only programmed when link training the first LTTPR and kept
> as-is when training subse
On Tue, Dec 29, 2020 at 07:22:00PM +0200, Imre Deak wrote:
> intel_dp_set_signal_levels() is needed for link training, so move it to
> intel_dp_link_training.c.
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/display/intel_dp.c| 18 --
> drivers/gpu/drm/i915/dis
Anshuman, please review.
BR,
Jani.
On Wed, 06 Jan 2021, Sean Paul wrote:
> From: Sean Paul
>
> The HDCP 1.4 spec does not require the QUERY_STREAM_ENCRYPTION_STATUS
> check, it was always a nice-to-have. After deploying this across various
> devices, we've determined that some MST bridge chip
Hi Dave and Daniel,
A very short collection of patches, mostly with display fixes. Plus GVT.
The goal is to get both drm-intel-next and drm-intel-gt-next in sync again
through drm-next backports so we can continue with ADL enabling in a topic
branch.
Please be aware that there's a drm only patch
On Tue, 12 Jan 2021, "Vivi, Rodrigo" wrote:
> On Mon, 2021-01-11 at 13:25 -0800, Lucas De Marchi wrote:
>> last time we talked about this was regarding dg1 AFAIR and the
>> consensus was to create a topic branch and that topic branch to be
>> merged in both branches. That would avoid having 2 comm
On Mon, 2021-01-11 at 13:25 -0800, Lucas De Marchi wrote:
> On Mon, Jan 11, 2021 at 12:57:43PM -0800, Matt Roper wrote:
> > On Mon, Jan 11, 2021 at 10:18:45PM +0200, Jani Nikula wrote:
> > > On Mon, 11 Jan 2021, Jani Nikula
> > > wrote:
> > > > On Fri, 08 Jan 2021, Matt Roper
> > > > wrote:
> > >
On Tue, 12 Jan 2021 at 17:23, Jani Nikula wrote:
>
> There are no users outside of intel_region_lmem.c.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/ma
== Series Details ==
Series: drm/i915: move region_lmem under gt
URL : https://patchwork.freedesktop.org/series/85760/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9594 -> Patchwork_19325
Summary
---
**FAILURE**
There are no users outside of intel_region_lmem.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_region_lmem.c | 2 +-
drivers/gpu/drm/i915/intel_region_lmem.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c
b/drivers/gp
On Tue, Jan 12, 2021 at 06:24:50PM +0200, Jani Nikula wrote:
> On Mon, 11 Jan 2021, Lucas De Marchi wrote:
> > On Mon, Jan 11, 2021 at 12:57:43PM -0800, Matt Roper wrote:
> >>On Mon, Jan 11, 2021 at 10:18:45PM +0200, Jani Nikula wrote:
> >>So to clarify, it looks like we have a bunch of revid chan
On Tue, 12 Jan 2021 at 17:05, Jani Nikula wrote:
>
> There are no users outside of intel_memory_region.c.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/
Chris Wilson writes:
> Inject a fault into the engine reset and check that the outstanding
> requests are completed despite the failed reset.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 133 +++
> 1 file changed, 133 insertions(+)
>
> d
There are no users outside of intel_memory_region.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_memory_region.c | 2 +-
drivers/gpu/drm/i915/intel_memory_region.h | 5 -
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_memory_region.c
b
== Series Details ==
Series: drm/i915: move region_lmem under gt
URL : https://patchwork.freedesktop.org/series/85760/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b7c79e86103e drm/i915: move region_lmem under gt
-:34: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s)
== Series Details ==
Series: drm/i915/selftests: Force a failed engine reset
URL : https://patchwork.freedesktop.org/series/85749/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9590_full -> Patchwork_19323_full
Summary
Device local-memory should be thought of as part the GT, which means it
should also sit under gt/.
Suggested-by: Chris Wilson
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/{ => gt}/intel_region_lmem.c | 0
drivers/gpu/drm/i915/{ =
On Mon, 11 Jan 2021, Aditya Swarup wrote:
> On 1/11/21 12:57 PM, Matt Roper wrote:
>> On Mon, Jan 11, 2021 at 10:18:45PM +0200, Jani Nikula wrote:
>>> On Mon, 11 Jan 2021, Jani Nikula wrote:
On Fri, 08 Jan 2021, Matt Roper wrote:
> On Fri, Jan 08, 2021 at 03:18:52PM -0800, Aditya Swarup
On Mon, 11 Jan 2021, Lucas De Marchi wrote:
> On Mon, Jan 11, 2021 at 12:57:43PM -0800, Matt Roper wrote:
>>On Mon, Jan 11, 2021 at 10:18:45PM +0200, Jani Nikula wrote:
>>So to clarify, it looks like we have a bunch of revid changes to the
>>display code that got merged to the gt-next tree but not
On Mon, 11 Jan 2021, Lucas De Marchi wrote:
> On Mon, Jan 11, 2021 at 10:13:15PM +0200, Jani Nikula wrote:
>>On Fri, 08 Jan 2021, Matt Roper wrote:
> in the end both sides will need that (even if it was a mistake to merge
> it in drm-intel-gt-next). I got an ack from Rodrigo to actually
> cherry
== Series Details ==
Series: drm/i915/debugfs : PM_REQ and PM_RES registers (rev2)
URL : https://patchwork.freedesktop.org/series/85437/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9594 -> Patchwork_19324
Summary
---
On Mon, 11 Jan 2021, Aditya Swarup wrote:
> On 1/11/21 12:13 PM, Jani Nikula wrote:
>> On Fri, 08 Jan 2021, Matt Roper wrote:
>> FWIW I have a wip series changing the whole thing to abstract steppings
>> enums that are shared between platforms, but it's in a bit of limbo
>> because the previous r
On Tue, 12 Jan 2021, "Vivi, Rodrigo" wrote:
> On Mon, 2021-01-11 at 21:38 +, Huang, Sean Z wrote:
>> Hello,
>>
>> I see, based on Joonas and Rodrigo's feedback.
>>
>> I made the modification as below, I will still keep the macro in this
>> .c instead of i915_reg.h, and this change will be re
> -Original Message-
> From: S, Saichandana
> Sent: Tuesday, January 12, 2021 7:04 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Gupta, Anshuman
> ; S, Saichandana
> Subject: [PATCH v3] drm/i915/debugfs : PM_REQ and PM_RES registers
>
> PM_REQ register provides the val
On Tue, Jan 12, 2021 at 10:47:57AM +, Matthew Auld wrote:
> On Fri, 27 Nov 2020 at 13:32, Chris Wilson wrote:
> >
> > Quoting Matthew Auld (2020-11-27 12:06:14)
> > > We need to general our accessor for the page directories and tables from
> > > using the simple kmap_atomic to support local me
PM_REQ register provides the value of the last PM request from PCU to
Display Engine. PM_RES register provides the value of the last PM
response from Display Engine to PCU.
This debugfs will be used by DC9 IGT test to know about "DC9 Ready"
status.
B.Spec : 49501, 49502
V2:
Added a functional prin
Hi Dave and Daniel,
here's this week's PR for drm-misc-fixes.
Best regards
Thomas
drm-misc-fixes-2021-01-12:
* dma-buf: Fix a memory leak in CMAV heap
* drm: Fix format check for legacy pageflips
* ttm: Pass correct address to dma_mapping_error(); Use mutex in pool
shrinker
The following c
== Series Details ==
Series: drm/i915/selftests: Force a failed engine reset
URL : https://patchwork.freedesktop.org/series/85749/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9590 -> Patchwork_19323
Summary
---
**S
== Series Details ==
Series: drm/i915/selftests: Force a failed engine reset
URL : https://patchwork.freedesktop.org/series/85749/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4fd279f422ea drm/i915/selftests: Force a failed engine reset
-:44: WARNING:LINE_SPACING: Missing a bl
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/gt: Check for arbitration after
writing start seqno
URL : https://patchwork.freedesktop.org/series/85746/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9590 -> Patchwork_19322
Inject a fault into the engine reset and check that the outstanding
requests are completed despite the failed reset.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 133 +++
1 file changed, 133 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/sel
On Mon, 2021-01-11 at 21:38 +, Huang, Sean Z wrote:
> Hello,
>
> I see, based on Joonas and Rodrigo's feedback.
>
> I made the modification as below, I will still keep the macro in this
> .c instead of i915_reg.h, and this change will be reflected in rev20.
>
> /* KCR register definitions */
On Fri, 27 Nov 2020 at 13:32, Chris Wilson wrote:
>
> Quoting Matthew Auld (2020-11-27 12:06:14)
> > We need to general our accessor for the page directories and tables from
> > using the simple kmap_atomic to support local memory, and this setup
> > must be done on acquisition of the backing stor
During igt_reset_nop_engine, it was observed that an unexpected failed
engine reset lead to us busywaiting on the stop-ring semaphore (set
during the reset preparations) on the first request afterwards. There was
no explicit MI_ARB_CHECK in this sequence as the presumption was that
the failed MI_SE
On the off chance that we need to arbitrate before launching the
payload, perform the check after we signal the request is ready to
start. Assuming instantaneous processing of the CS event, the request
will then be treated as having started when we make the decisions as to
how to process that CS ev
On Tue, 12 Jan 2021 at 02:00, Chris Wilson wrote:
>
> A new fi-cml-dallium CI machine has 8G and apparently plenty free, yet
> fails some selftests with ENOMEM. The failures all seem to be from
> huge_gem_object which does not try very hard to allocate memory,
> skipping reclaim entirely. Let's tr
On Tue, 12 Jan 2021 at 01:50, Chris Wilson wrote:
>
> If this stolen object holds the last reference to the region, we need to
> remove our drm_mm_node before freeing the region's drm_mm.
>
> <4> [431.679591] Memory manager not clean during takedown.
> <4> [431.679633] WARNING: CPU: 0 PID: 110 at
On 11/01/2021 21:54, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-01-11 17:12:57)
On 11/01/2021 16:27, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-01-11 16:19:40)
On 11/01/2021 10:57, Chris Wilson wrote:
During igt_reset_nop_engine, it was observed that an unexpected failed
engin
On Mon, Jan 11, 2021 at 04:28:31PM -0500, Alex Deucher wrote:
> On Mon, Jan 11, 2021 at 11:39 AM Bas Nieuwenhuizen
> wrote:
> >
> > On Mon, Jan 11, 2021 at 4:02 PM Alex Deucher wrote:
> > >
> > > On Sat, Jan 9, 2021 at 9:11 PM Bas Nieuwenhuizen
> > > wrote:
> > > >
> > > > With modifiers one can
On 11/01/2021 16:10, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-01-11 16:03:48)
On 11/01/2021 10:57, Chris Wilson wrote:
On the off chance that we need to arbitrate before launching the
payload, perform the check after we signal the request is ready to
start. Assuming instantaneous pro
== Series Details ==
Series: drm/i915/selftests: Allow huge_gem_object to kick the shrinker
URL : https://patchwork.freedesktop.org/series/85729/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9586_full -> Patchwork_19321_full
===
On Thu, Jan 7, 2021 at 2:52 PM Lyude Paul wrote:
>
> Currently, every different type of backlight hook that i915 supports is
> pretty straight forward - you have a backlight, probably through PWM
> (but maybe DPCD), with a single set of platform-specific hooks that are
> used for controlling it.
>
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