[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Program DBUF_CTL tracker state service

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/display: Program DBUF_CTL tracker state service URL : https://patchwork.freedesktop.org/series/82785/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9152_full -> Patchwork_18723_full Sum

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms()

2020-10-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms() URL : https://patchwork.freedesktop.org/series/82784/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9152_full -> Patchwork_18722_full ===

Re: [Intel-gfx] [PATCH] drm/i915: Add plane .{min, max}_width() and .max_height() vfuncs

2020-10-16 Thread Aditya Swarup
On 9/24/20 11:51 AM, Ville Syrjala wrote: > From: Ville Syrjälä > > Reduce this maintenance nightmare a bit by converting the plane > min/max width/height stuff into vfuncs. > > Now, if I could just think of a nice way to also use this for > intel_mode_valid_max_plane_size()... > > Signed-off-b

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Flush the old heartbeat on interval change (rev3)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Flush the old heartbeat on interval change (rev3) URL : https://patchwork.freedesktop.org/series/82772/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9152_full -> Patchwork_18721_full ===

Re: [Intel-gfx] [RFC v2 1/8] drm/i915/dp: Program source OUI on eDP panels

2020-10-16 Thread Vasily Khoruzhick
On Wed, Sep 16, 2020 at 10:19 AM Lyude Paul wrote: > > Since we're about to start adding support for Intel's magic HDR > backlight interface over DPCD, we need to ensure we're properly > programming this field so that Intel specific sink services are exposed. > Otherwise, 0x300-0x3ff will just rea

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Limit VFE threads based on GT

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Limit VFE threads based on GT URL : https://patchwork.freedesktop.org/series/82783/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9151_full -> Patchwork_18720_full Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Program DBUF_CTL tracker state service

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/display: Program DBUF_CTL tracker state service URL : https://patchwork.freedesktop.org/series/82785/ State : success == Summary == CI Bug Log - changes from CI_DRM_9152 -> Patchwork_18723 Summary -

Re: [Intel-gfx] [PATCH] drm/i915/edp/jsl: Update vswing table for HBR and HBR2

2020-10-16 Thread Souza, Jose
Please fix the checkpatch errors, you can run it locally by running "dim checkpatch drm-tip/drm-tip..HEAD", search for instructions of how to fetch and setup dim. Also no need to CC drm-devel for patches that only touches i915, drm-devel is for drivers that don't have it's own list and for chang

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms()

2020-10-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms() URL : https://patchwork.freedesktop.org/series/82784/ State : success == Summary == CI Bug Log - changes from CI_DRM_9152 -> Patchwork_18722 =

[Intel-gfx] [PATCH] drm/i915/display: Program DBUF_CTL tracker state service

2020-10-16 Thread José Roberto de Souza
This sequence is not part of "Sequences to Initialize Display" but as noted in the MBus page the DBUF_CTL.Tracker_state_service needs to be set to 8. BSpec: 49213 Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_display_power.c | 13 + drivers/gpu/drm/i915/

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Flush the old heartbeat on interval change (rev3)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Flush the old heartbeat on interval change (rev3) URL : https://patchwork.freedesktop.org/series/82772/ State : success == Summary == CI Bug Log - changes from CI_DRM_9152 -> Patchwork_18721 Summary

[Intel-gfx] [PATCH 2/2] drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/

2020-10-16 Thread Ville Syrjala
From: Ville Syrjälä Rename intel_dp_sink_dpms() to intel_dp_set_power() so one doesn't always have to convert from the DPMS enum values to the actual DP D-states. Also when dealing with a branch device this has nothing to do with any sink, so the old name was nonsense anyway. Also adjust the deb

[Intel-gfx] [PATCH 1/2] drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms()

2020-10-16 Thread Ville Syrjala
From: Ville Syrjälä Rather that try to trick LSPCON back into PCON mode from the .reset() hook let's just do that as a regular part of the normal modeset sequence, which is going to take care of the system resume case. During a normal modeset this should normally be a nop as the mode should have

Re: [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.

2020-10-16 Thread Navare, Manasi
On Fri, Oct 16, 2020 at 09:50:00PM +0300, Ville Syrjälä wrote: > On Fri, Oct 16, 2020 at 11:17:33AM -0700, Navare, Manasi wrote: > > On Fri, Oct 16, 2020 at 07:06:20PM +0300, Ville Syrjälä wrote: > > > On Thu, Oct 15, 2020 at 09:37:47AM -0700, Navare, Manasi wrote: > > > > On Thu, Oct 15, 2020 at 0

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Rate limit 'Fault errors' message

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Rate limit 'Fault errors' message URL : https://patchwork.freedesktop.org/series/82779/ State : success == Summary == CI Bug Log - changes from CI_DRM_9149_full -> Patchwork_18719_full Summary ---

Re: [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.

2020-10-16 Thread Ville Syrjälä
On Fri, Oct 16, 2020 at 11:17:33AM -0700, Navare, Manasi wrote: > On Fri, Oct 16, 2020 at 07:06:20PM +0300, Ville Syrjälä wrote: > > On Thu, Oct 15, 2020 at 09:37:47AM -0700, Navare, Manasi wrote: > > > On Thu, Oct 15, 2020 at 04:07:05PM +0300, Ville Syrjälä wrote: > > > > On Thu, Oct 08, 2020 at 0

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Remove obj->mm.lock! (rev8)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev8) URL : https://patchwork.freedesktop.org/series/82337/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9149_full -> Patchwork_18718_full Summary --- **F

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Limit VFE threads based on GT

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Limit VFE threads based on GT URL : https://patchwork.freedesktop.org/series/82783/ State : success == Summary == CI Bug Log - changes from CI_DRM_9151 -> Patchwork_18720 Summary --- **SUCCES

Re: [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.

2020-10-16 Thread Navare, Manasi
On Fri, Oct 16, 2020 at 07:06:20PM +0300, Ville Syrjälä wrote: > On Thu, Oct 15, 2020 at 09:37:47AM -0700, Navare, Manasi wrote: > > On Thu, Oct 15, 2020 at 04:07:05PM +0300, Ville Syrjälä wrote: > > > On Thu, Oct 08, 2020 at 02:45:30PM -0700, Manasi Navare wrote: > > > > @@ -4504,6 +4514,29 @@ voi

[Intel-gfx] [PATCH] drm/i915/gt: Limit VFE threads based on GT

2020-10-16 Thread Chris Wilson
MEDIA_STATE_VFE only accepts the 'maximum number of threads' in the range [0, n-1] where n is #EU * (#threads/EU) with the number of threads based on plaform and the number of EU based on the number of slices and subslices. This is a fixed number per platform/gt, so appropriately limit the number o

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Flush the old heartbeat on interval change (rev2)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Flush the old heartbeat on interval change (rev2) URL : https://patchwork.freedesktop.org/series/82772/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9149_full -> Patchwork_18717_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Rate limit 'Fault errors' message

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Rate limit 'Fault errors' message URL : https://patchwork.freedesktop.org/series/82779/ State : success == Summary == CI Bug Log - changes from CI_DRM_9149 -> Patchwork_18719 Summary --- **SUCCE

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Rate limit 'Fault errors' message

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Rate limit 'Fault errors' message URL : https://patchwork.freedesktop.org/series/82779/ State : warning == Summary == $ dim checkpatch origin/drm-tip 059a20cb0904 drm/i915: Rate limit 'Fault errors' message -:22: CHECK:PARENTHESIS_ALIGNMENT: Alignment sho

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove obj->mm.lock! (rev8)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev8) URL : https://patchwork.freedesktop.org/series/82337/ State : success == Summary == CI Bug Log - changes from CI_DRM_9149 -> Patchwork_18718 Summary --- **SUCCESS**

Re: [Intel-gfx] i915 dma faults on Xen

2020-10-16 Thread Jason Andryuk
On Thu, Oct 15, 2020 at 11:16 AM Jason Andryuk wrote: > > On Thu, Oct 15, 2020 at 7:31 AM Roger Pau Monné wrote: > > > > On Wed, Oct 14, 2020 at 08:37:06PM +0100, Andrew Cooper wrote: > > > On 14/10/2020 20:28, Jason Andryuk wrote: > > > > Hi, > > > > > > > > Bug opened at https://gitlab.freedesk

Re: [Intel-gfx] [PATCH v10 06/11] drm/i915: Enable big joiner support in enable and disable sequences.

2020-10-16 Thread Ville Syrjälä
On Thu, Oct 15, 2020 at 09:37:47AM -0700, Navare, Manasi wrote: > On Thu, Oct 15, 2020 at 04:07:05PM +0300, Ville Syrjälä wrote: > > On Thu, Oct 08, 2020 at 02:45:30PM -0700, Manasi Navare wrote: > > > @@ -4504,6 +4514,29 @@ void intel_ddi_get_config(struct intel_encoder > > > *encoder, > > > de

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Remove obj->mm.lock! (rev8)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev8) URL : https://patchwork.freedesktop.org/series/82337/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' no

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Remove obj->mm.lock! (rev8)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev8) URL : https://patchwork.freedesktop.org/series/82337/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/i

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev8)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev8) URL : https://patchwork.freedesktop.org/series/82337/ State : warning == Summary == $ dim checkpatch origin/drm-tip d212e6113fa5 drm/i915: Move cmd parser pinning to execbuffer 21b445301cb6 drm/i915: Add missing -EDEADLK handli

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Flush the old heartbeat on interval change (rev2)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Flush the old heartbeat on interval change (rev2) URL : https://patchwork.freedesktop.org/series/82772/ State : success == Summary == CI Bug Log - changes from CI_DRM_9149 -> Patchwork_18717 Summary

[Intel-gfx] drm/i915: Detecting Vt-d when running as guest os

2020-10-16 Thread Stefan Fritsch
Hi, if Linux is running as a guest and the host is doing igd-pass-thorugh with VT-d enabled, the i915 driver does not work all that great. The most obvious problem is that there are dozens of 'Fault errors on pipe A' errrors logged per second, but depending on the hardware there can be other i

Re: [Intel-gfx] [PATCH v6 44/80] docs: gpu: i915.rst: Fix several C duplication warnings

2020-10-16 Thread Mauro Carvalho Chehab
Em Fri, 16 Oct 2020 14:01:07 +0300 Joonas Lahtinen escreveu: > + Lionel > > Can you please take a look at best resolving the below problem. > > Maybe we should eliminate the duplicate declarations? Updating such > a list manually seems error prone to me. For Kernel 5.10, IMO the best is to app

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Force state->modeset=true when distrust_bios_wm==true"

2020-10-16 Thread Stefan Joosten
Dear Ville Syrjälä, Thank you for responding so quickly. I was occupied with work and life for the past two weeks, sorry about the wait, but have now managed to find some time to continue pursuing this issue again. On Thu, 2020-10-01 at 18:23 +0300, Ville Syrjälä wrote: > Argh. If only I had mana

[Intel-gfx] [PATCH] drm/i915: Rate limit 'Fault errors' message

2020-10-16 Thread Stefan Fritsch
If linux is running as a guest and the host is doing igd pass-through with VT-d enabled, this message is logged dozens of times per second. Cc: sta...@vger.kernel.org Signed-off-by: Stefan Fritsch --- The i915 driver should also detect VT-d in this case, but that is a different issue. I have se

[Intel-gfx] [PATCH v4.2] drm/i915: Pin timeline map after first timeline pin, v3.

2020-10-16 Thread Maarten Lankhorst
We're starting to require the reservation lock for pinning, so wait until we have that. Update the selftests to handle this correctly, and ensure pin is called in live_hwsp_rollover_user() and mock_hwsp_freelist(). Changes since v1: - Fix NULL + XX arithmatic, use casts. (kbuild) Changes since v2

[Intel-gfx] [PATCH v4.1] drm/i915: Make __engine_unpark() compatible with ww locking.

2020-10-16 Thread Maarten Lankhorst
Take the ww lock around engine_unpark. Because of the many many places where rpm is used, I chose the safest option and used a trylock to opportunistically take this lock for __engine_unpark. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 1 file changed,

Re: [Intel-gfx] [PATCH] drm/i915: Use the active reference on the vma while capturing

2020-10-16 Thread Matthew Auld
On Fri, 16 Oct 2020 at 10:25, Chris Wilson wrote: > > During error capture, we need to take a reference to the vma from the > before the reset in order to catpure the contents of the vma later. > Currently we are using both an active reference and a kref, but due to > nature of the i915_vma refere

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Flush the old heartbeat on interval change

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915/gt: Flush the old heartbeat on interval change URL : https://patchwork.freedesktop.org/series/82772/ State : success == Summary == CI Bug Log - changes from CI_DRM_9147 -> Patchwork_18716 Summary --

[Intel-gfx] [PATCH] drm/i915/gt: Flush the old heartbeat on interval change

2020-10-16 Thread Chris Wilson
To try and avoid too rapid change causing premature heart attacks, let us flush the old heartbeat before changing the interval. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev6)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev6) URL : https://patchwork.freedesktop.org/series/82337/ State : failure == Summary == Applying: drm/i915: Move cmd parser pinning to execbuffer Applying: drm/i915: Add missing -EDEADLK handling to execbuf pinning Applying: drm/i9

[Intel-gfx] [PATCH v4.1] drm/i915: Pin timeline map after first timeline pin, v3.

2020-10-16 Thread Maarten Lankhorst
We're starting to require the reservation lock for pinning, so wait until we have that. Update the selftests to handle this correctly, and ensure pin is called in live_hwsp_rollover_user() and mock_hwsp_freelist(). Changes since v1: - Fix NULL + XX arithmatic, use casts. (kbuild) Changes since v2

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/gem: Poison stolen pages before use

2020-10-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82769/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9147 -> Patchwork_18714

Re: [Intel-gfx] [PATCH v6 44/80] docs: gpu: i915.rst: Fix several C duplication warnings

2020-10-16 Thread Lionel Landwerlin
On 13/10/2020 14:53, Mauro Carvalho Chehab wrote: As reported by Sphinx: ./Documentation/gpu/i915:646: ./drivers/gpu/drm/i915/i915_perf.c:1147: WARNING: Duplicate C declaration, also defined in 'gpu/i915'. Declaration is 'i915_oa_wait_unlocked'. ./Documentation/gpu/i915:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gem: Poison stolen pages before use

2020-10-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82769/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separa

Re: [Intel-gfx] [PATCH v6 44/80] docs: gpu: i915.rst: Fix several C duplication warnings

2020-10-16 Thread Lionel Landwerlin
On 16/10/2020 14:50, Jani Nikula wrote: On Fri, 16 Oct 2020, Lionel Landwerlin wrote: On 16/10/2020 14:37, Mauro Carvalho Chehab wrote: Em Fri, 16 Oct 2020 14:01:07 +0300 Joonas Lahtinen escreveu: + Lionel Can you please take a look at best resolving the below problem. Maybe we should eli

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/gem: Poison stolen pages before use

2020-10-16 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gem: Poison stolen pages before use URL : https://patchwork.freedesktop.org/series/82769/ State : warning == Summary == $ dim checkpatch origin/drm-tip 66cd9f3821f0 drm/i915/gem: Poison stolen pages before use -:38: WARNING:MEMOR

Re: [Intel-gfx] [RFC i-g-t] intel_gpu_top: User friendly device listing

2020-10-16 Thread Zbigniew Kempczyński
On Fri, Oct 16, 2020 at 10:11:04AM +0100, Tvrtko Ursulin wrote: > > On 16/10/2020 05:07, Zbigniew Kempczyński wrote: > > On Thu, Oct 15, 2020 at 09:09:02AM +0100, Tvrtko Ursulin wrote: > >> > >> On 15/10/2020 05:36, Zbigniew Kempczyński wrote: > >>> On Wed, Oct 14, 2020 at 11:48:53AM +0100, Tvrtko

Re: [Intel-gfx] [PATCH v6 44/80] docs: gpu: i915.rst: Fix several C duplication warnings

2020-10-16 Thread Jani Nikula
On Fri, 16 Oct 2020, Lionel Landwerlin wrote: > On 16/10/2020 14:37, Mauro Carvalho Chehab wrote: >> Em Fri, 16 Oct 2020 14:01:07 +0300 >> Joonas Lahtinen escreveu: >> >>> + Lionel >>> >>> Can you please take a look at best resolving the below problem. >>> >>> Maybe we should eliminate the duplic

Re: [Intel-gfx] [PATCH v6 44/80] docs: gpu: i915.rst: Fix several C duplication warnings

2020-10-16 Thread Lionel Landwerlin
On 16/10/2020 14:37, Mauro Carvalho Chehab wrote: Em Fri, 16 Oct 2020 14:01:07 +0300 Joonas Lahtinen escreveu: + Lionel Can you please take a look at best resolving the below problem. Maybe we should eliminate the duplicate declarations? Updating such a list manually seems error prone to me.

[Intel-gfx] [PATCH 2/2] drm/i915: Exclude low pages (128KiB) of stolen from use

2020-10-16 Thread Chris Wilson
The GPU is trashing the low pages of its reserved memory upon reset. If we are using this memory for ringbuffers, then we will dutiful resubmit the trashed rings after the reset causing further resets, and worse. We must exclude this range from our own use. The value of 128KiB was found by empirica

[Intel-gfx] [PATCH 1/2] drm/i915/gem: Poison stolen pages before use

2020-10-16 Thread Chris Wilson
When allocating objects from stolen, memset() the backing store to POISON_INUSE (0x5a) to help identify any uninitialised use of a stolen object. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 45 ++ 1 file changed, 45

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Use the active reference on the vma while capturing

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Use the active reference on the vma while capturing URL : https://patchwork.freedesktop.org/series/82763/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9145_full -> Patchwork_18711_full

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev5)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev5) URL : https://patchwork.freedesktop.org/series/82337/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M] d

Re: [Intel-gfx] [PATCH v6 44/80] docs: gpu: i915.rst: Fix several C duplication warnings

2020-10-16 Thread Joonas Lahtinen
+ Lionel Can you please take a look at best resolving the below problem. Maybe we should eliminate the duplicate declarations? Updating such a list manually seems error prone to me. Regards, Joonas Quoting Mauro Carvalho Chehab (2020-10-13 14:53:59) > As reported by Sphinx: > > ./Docum

[Intel-gfx] [PATCH v4] drm/i915: Do not share hwsp across contexts any more, v4.

2020-10-16 Thread Maarten Lankhorst
Instead of sharing pages with breadcrumbs, give each timeline a single page. This allows unrelated timelines not to share locks any more during command submission. As an additional benefit, seqno wraparound no longer requires i915_vma_pin, which means we no longer need to worry about a potential -

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev4)

2020-10-16 Thread Patchwork
== Series Details == Series: drm/i915: Remove obj->mm.lock! (rev4) URL : https://patchwork.freedesktop.org/series/82337/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M] d

[Intel-gfx] [PATCH v4 55/61] drm/i915/selftests: Prepare timeline tests for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
We can no longer call intel_timeline_pin with a null argument, so add a ww loop that locks the backing object. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_timeline.c | 26 ++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] [PATCH v4 31/61] drm/i915: Prepare for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
From: Thomas Hellström Stolen objects need to lock, and we may call put_pages when refcount drops to 0, ensure all calls are handled correctly. Idea-from: Thomas Hellström Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.h | 14 ++ drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 24/61] drm/i915: Take reservation lock around i915_vma_pin.

2020-10-16 Thread Maarten Lankhorst
We previously complained when ww == NULL. This function is now only used in selftests to pin an object, and ww locking is now fixed. Signed-off-by: Maarten Lankhorst --- .../i915/gem/selftests/i915_gem_coherency.c | 14 + drivers/gpu/drm/i915/i915_gem.c | 6 +-

[Intel-gfx] [PATCH v4 13/61] drm/i915: Reject more ioctls for userptr

2020-10-16 Thread Maarten Lankhorst
Allow set_domain to fail silently, waiting for idle should be good enough. set_tiling and set_caching are rejected with -ENXIO, there's no valid reason to allow it. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_domain.

[Intel-gfx] [PATCH v4 28/61] drm/i915: Defer pin calls in buffer pool until first use by caller.

2020-10-16 Thread Maarten Lankhorst
We need to take the obj lock to pin pages, so wait until the callers have done so, before making the object unshrinkable. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 2 + .../gpu/drm/i915/gem/i915_gem_object_blt.c| 6 +++ .../gpu/drm/i915/gt/intel_g

[Intel-gfx] [PATCH v4 50/61] drm/i915/selftests: Prepare context selftest for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Only needs to convert a single call to the unlocked version. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_context.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_cont

[Intel-gfx] [PATCH v4 06/61] drm/i915: Add gem object locking to madvise.

2020-10-16 Thread Maarten Lankhorst
Doesn't need the full ww lock, only checking if pages are bound. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_gem.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index bb0c12975f38..3

[Intel-gfx] [PATCH v4 35/61] drm/i915: Lock ww in ucode objects correctly

2020-10-16 Thread Maarten Lankhorst
In the ucode functions, the calls are done before userspace runs, when debugging using debugfs, or when creating semi-permanent mappings; we can safely use the unlocked versions that does the ww dance for us. Because there is no pin_pages_unlocked yet, add it as convenience function. This removes

[Intel-gfx] [PATCH v4 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane

2020-10-16 Thread Maarten Lankhorst
Instead of multiple lockings, lock the object once, and perform the ww dance around attach_phys and pin_pages. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/display/intel_display.c | 69 --- drivers/gpu/drm/i915/display/intel_display.h | 2 +- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v4 39/61] drm/i915: Use a single page table lock for each gtt.

2020-10-16 Thread Maarten Lankhorst
We may create page table objects on the fly, but we may need to wait with the ww lock held. Instead of waiting on a freed obj lock, ensure we have the same lock for each object to keep -EDEADLK working. This ensures that i915_vma_pin_ww can lock the page tables when required. Signed-off-by: Maarte

[Intel-gfx] [PATCH v4 60/61] drm/i915: Finally remove obj->mm.lock.

2020-10-16 Thread Maarten Lankhorst
With all callers and selftests fixed to use ww locking, we can now finally remove this lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 - drivers/gpu/drm/i915/gem/i915_gem_object.h| 5 +-- .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 - dr

[Intel-gfx] [PATCH v4 61/61] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2.

2020-10-16 Thread Maarten Lankhorst
Instead of force unbinding and rebinding every time, we try to check if our notifier seqcount is still correct when pages are bound. This way we only rebind userptr when we need to, and prevent stalls. Changes since v1: - Missing mutex_unlock, reported by kbuild. Reported-by: kernel test robot R

[Intel-gfx] [PATCH v4 17/61] drm/i915: Populate logical context during first pin.

2020-10-16 Thread Maarten Lankhorst
This allows us to remove pin_map from state allocation, which saves us a few retry loops. We won't need this until first pin, anyway. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_context_types.h | 13 ++- drivers/gpu/drm/i915/gt/intel_lrc.c | 107 +---

[Intel-gfx] [PATCH v4 56/61] drm/i915/selftests: Prepare i915_request tests for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Straightforward conversion by using unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/selftests/i915_request.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests

[Intel-gfx] [PATCH v4 46/61] drm/i915/selftests: Prepare mman testcases for obj->mm.lock removal.

2020-10-16 Thread Maarten Lankhorst
Ensure we hold the lock around put_pages, and use the unlocked wrappers for pinning pages and mappings. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/

[Intel-gfx] [PATCH v4 58/61] drm/i915/selftests: Prepare cs engine tests for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Same as other tests, use pin_map_unlocked. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c index

[Intel-gfx] [PATCH v4 19/61] drm/i915: Handle ww locking in init_status_page

2020-10-16 Thread Maarten Lankhorst
Try to pin to ggtt first, and use a full ww loop to handle eviction correctly. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 37 +++ 1 file changed, 24 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b

[Intel-gfx] [PATCH v4 59/61] drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
We need to lock the global gtt dma_resv, use i915_vm_lock_objects to handle this correctly. Add ww handling for this where required. Add the object lock around unpin/put pages, and use the unlocked versions of pin_pages and pin_map where required. Signed-off-by: Maarten Lankhorst --- drivers/gp

[Intel-gfx] [PATCH v4 51/61] drm/i915/selftests: Prepare hangcheck for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Convert a few calls to use the unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangche

[Intel-gfx] [PATCH v4 52/61] drm/i915/selftests: Prepare execlists for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Convert normal functions to unlocked versions where needed. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v4 12/61] drm/i915: No longer allow exporting userptr through dma-buf

2020-10-16 Thread Maarten Lankhorst
It doesn't make sense to export a memory address, we will prevent allowing access this way to different address spaces when we rework userptr handling, so best to explicitly disable it. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 5 ++--- 1 file changed, 2

[Intel-gfx] [PATCH v4 27/61] drm/i915: Take obj lock around set_domain ioctl

2020-10-16 Thread Maarten Lankhorst
We need to lock the object to move it to the correct domain, add the missing lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/d

[Intel-gfx] [PATCH v4 54/61] drm/i915/selftests: Prepare ring submission for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Use unlocked versions when the ww lock is not held. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c b/drivers/gpu/drm/i915/gt/selfte

[Intel-gfx] [PATCH v4 49/61] drm/i915/selftests: Prepare igt_gem_utils for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
igt_emit_store_dw needs to use the unlocked version, as it's not holding a lock. This fixes igt_gpu_fill_dw() which is used by some other selftests. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[Intel-gfx] [PATCH v4 08/61] drm/i915: Rework struct phys attachment handling

2020-10-16 Thread Maarten Lankhorst
Instead of creating a separate object type, we make changes to the shmem type, to clear struct page backing. This will allow us to ensure we never run into a race when we exchange obj->ops with other function pointers. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object

[Intel-gfx] [PATCH v4 16/61] drm/i915: Flatten obj->mm.lock

2020-10-16 Thread Maarten Lankhorst
With userptr fixed, there is no need for all separate lockdep classes now, and we can remove all lockdep tricks used. A trylock in the shrinker is all we need now to flatten the locking hierarchy. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 +--- driver

[Intel-gfx] [PATCH v4 15/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v4.

2020-10-16 Thread Maarten Lankhorst
Instead of doing what we do currently, which will never work with PROVE_LOCKING, do the same as AMD does, and something similar to relocation slowpath. When all locks are dropped, we acquire the pages for pinning. When the locks are taken, we transfer those pages in .get_pages() to the bo. As a fin

[Intel-gfx] [PATCH v4 48/61] drm/i915/selftests: Prepare object blit tests for obj->mm.lock removal.

2020-10-16 Thread Maarten Lankhorst
Use some unlocked versions where we're not holding the ww lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c b/driv

[Intel-gfx] [PATCH v4 53/61] drm/i915/selftests: Prepare mocs tests for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Use pin_map_unlocked when we're not holding locks. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c index b25eba50c88

[Intel-gfx] [PATCH v4 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal.

2020-10-16 Thread Maarten Lankhorst
Straightforward conversion, just convert a bunch of calls to unlocked versions. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 28 ++- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_page

[Intel-gfx] [PATCH v4 33/61] drm/i915: Add ww locking around vm_access()

2020-10-16 Thread Maarten Lankhorst
i915_gem_object_pin_map potentially needs a ww context, so ensure we have one we can revoke. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 24 ++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_g

[Intel-gfx] [PATCH v4 41/61] drm/i915/selftests: Prepare client blit for obj->mm.lock removal.

2020-10-16 Thread Maarten Lankhorst
Straightforward conversion, just convert a bunch of calls to unlocked versions. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_cl

[Intel-gfx] [PATCH v4 23/61] drm/i915: Move pinning to inside engine_wa_list_verify()

2020-10-16 Thread Maarten Lankhorst
This should be done as part of the ww loop, in order to remove a i915_vma_pin that needs ww held. Now only i915_ggtt_pin() callers remaining. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 24 -- .../gpu/drm/i915/gt/selftest_workarounds.c

[Intel-gfx] [PATCH v4 07/61] drm/i915: Move HAS_STRUCT_PAGE to obj->flags

2020-10-16 Thread Maarten Lankhorst
We want to remove the changing of ops structure for attaching phys pages, so we need to kill off HAS_STRUCT_PAGE from ops->flags, and put it in the bo. This will remove a potential race of dereferencing the wrong obj->ops without ww mutex held. Signed-off-by: Maarten Lankhorst --- drivers/gpu/d

[Intel-gfx] [PATCH v4 10/61] drm/i915: make lockdep slightly happier about execbuf.

2020-10-16 Thread Maarten Lankhorst
As soon as we install fences, we should stop allocating memory in order to prevent any potential deadlocks. This is required later on, when we start adding support for dma-fence annotations. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 24 ++--

[Intel-gfx] [PATCH v4 32/61] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner.

2020-10-16 Thread Maarten Lankhorst
By default, we assume that it's called inside igt_create_request to keep existing selftests working, but allow for manual pinning when passing a ww context. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/selftests/igt_spinner.c | 136 --- drivers/gpu/drm/i915/selftests

[Intel-gfx] [PATCH v4 02/61] drm/i915: Add missing -EDEADLK handling to execbuf pinning

2020-10-16 Thread Maarten Lankhorst
i915_vma_pin may fail with -EDEADLK when we start locking page tables, so ensure we handle this correctly. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 23 +++ 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH v4 29/61] drm/i915: Fix pread/pwrite to work with new locking rules.

2020-10-16 Thread Maarten Lankhorst
We are removing obj->mm.lock, and need to take the reservation lock before we can pin pages. Move the pinning pages into the helper, and merge gtt pwrite/pread preparation and cleanup paths. The fence lock is also removed; it will conflict with fence annotations, because of memory allocations done

[Intel-gfx] [PATCH v4 25/61] drm/i915: Make intel_init_workaround_bb more compatible with ww locking.

2020-10-16 Thread Maarten Lankhorst
Make creation separate from pinning, in order to take the lock only once, and pin the mapping with the lock held. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_lrc.c | 43 ++--- 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/g

[Intel-gfx] [PATCH v4 01/61] drm/i915: Move cmd parser pinning to execbuffer

2020-10-16 Thread Maarten Lankhorst
We need to get rid of allocations in the cmd parser, because it needs to be called from a signaling context, first move all pinning to execbuf, where we already hold all locks. Allocate jump_whitelist in the execbuffer, and add annotations around intel_engine_cmd_parser(), to ensure we only call t

[Intel-gfx] [PATCH v4 57/61] drm/i915/selftests: Prepare memory region tests for obj->mm.lock removal

2020-10-16 Thread Maarten Lankhorst
Use the unlocked variants for pin_map and pin_pages, and add lock around unpinning/putting pages. Signed-off-by: Maarten Lankhorst --- .../drm/i915/selftests/intel_memory_region.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/selft

[Intel-gfx] [PATCH v4 14/61] drm/i915: Reject UNSYNCHRONIZED for userptr

2020-10-16 Thread Maarten Lankhorst
We should not allow this any more, as it will break with the new userptr implementation, it could still be made to work, but there's no point in doing so. Signed-off-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 2 + drivers/gpu/drm/i915/gem/i915_gem_object.h| 4

[Intel-gfx] [PATCH v4 36/61] drm/i915: Add ww locking to dma-buf ops.

2020-10-16 Thread Maarten Lankhorst
vmap is using pin_pages, but needs to use ww locking, add pin_pages_unlocked to correctly lock the mapping. Also add ww locking to begin/end cpu access. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 60 -- 1 file changed, 33 insertions(+),

[Intel-gfx] [PATCH v4 26/61] drm/i915: Make __engine_unpark() compatible with ww locking.

2020-10-16 Thread Maarten Lankhorst
Take the ww lock around engine_unpark. Because of the many many places where rpm is used, I chose the safest option and used a trylock to opportunistically take this lock for __engine_unpark. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +++- 1 file changed,

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