Re: [Intel-gfx] linux-next: manual merge of the kspp tree with the drm-misc tree

Hi all, On Fri, 3 Jul 2020 14:35:50 +1000 Stephen Rothwell wrote: > > Today's linux-next merge of the kspp tree got a conflict in: > > drivers/gpu/drm/drm_edid.c > > between commit: > > 948de84233d3 ("drm : Insert blank lines after declarations.") > > from the drm-misc tree and commit:

Re: [Intel-gfx] Time, where did it go?

On Mon, 3 Aug 2020 at 05:36, Chris Wilson wrote: > > Quoting Dave Airlie (2020-08-02 18:56:44) > > On Mon, 3 Aug 2020 at 02:44, Chris Wilson wrote: > > > > > > Lots of small incremental improvements to reduce execution latency > > > which basically offsets the small regressions incurred when comp

Re: [Intel-gfx] [PATCH 2/2] drm/i915: add syncobj timeline support

On 04/08/2020 21:42, Chris Wilson wrote: Quoting Lionel Landwerlin (2020-08-04 09:59:54) Introduces a new parameters to execbuf so that we can specify syncobj handles as well as timeline points. v2: Reuse i915_user_extension_fn v3: Check that the chained extension is only present once (Chris)

[Intel-gfx] ✗ Fi.CI.IGT: failure for Allow privileged user to map the OA buffer

== Series Details == Series: Allow privileged user to map the OA buffer URL : https://patchwork.freedesktop.org/series/80250/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8841_full -> Patchwork_18307_full Summary ---

Re: [Intel-gfx] [PATCH 1/2] drm/i915: introduce a mechanism to extend execbuf2

Quoting Lionel Landwerlin (2020-08-04 09:59:53) > We're planning to use this for a couple of new feature where we need > to provide additional parameters to execbuf. > > v2: Check for invalid flags in execbuffer2 (Lionel) > > v3: Rename I915_EXEC_EXT -> I915_EXEC_USE_EXTENSIONS (Chris) > > v4: R

Re: [Intel-gfx] [PATCH 2/2] drm/i915: add syncobj timeline support

Quoting Lionel Landwerlin (2020-08-04 09:59:54) > Introduces a new parameters to execbuf so that we can specify syncobj > handles as well as timeline points. > > v2: Reuse i915_user_extension_fn > > v3: Check that the chained extension is only present once (Chris) > > v4: Check that dma_fence_ch

[Intel-gfx] ✓ Fi.CI.BAT: success for Allow privileged user to map the OA buffer

== Series Details == Series: Allow privileged user to map the OA buffer URL : https://patchwork.freedesktop.org/series/80250/ State : success == Summary == CI Bug Log - changes from CI_DRM_8841 -> Patchwork_18307 Summary --- **SUCCES

[Intel-gfx] ✗ Fi.CI.DOCS: warning for Allow privileged user to map the OA buffer

== Series Details == Series: Allow privileged user to map the OA buffer URL : https://patchwork.freedesktop.org/series/80250/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/i915_perf.c:3281: warning: Function parameter or member 'cmd' not des

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Allow privileged user to map the OA buffer

== Series Details == Series: Allow privileged user to map the OA buffer URL : https://patchwork.freedesktop.org/series/80250/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. _

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization"

On Tue, Aug 04, 2020 at 06:44:07AM +, Patchwork wrote: > == Series Details == > > Series: Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization" > URL : https://patchwork.freedesktop.org/series/80235/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_8836

[Intel-gfx] [PATCH 4/4] drm/i915/perf: Map OA buffer to user space for gen12 performance query

i915 used to support time based sampling mode which is good for overall system monitoring, but is not enough for query mode used to measure a single draw call or dispatch. Gen9-Gen11 are using current i915 perf implementation for query, but Gen12+ requires a new approach for query based on triggere

[Intel-gfx] [PATCH 2/4] drm/i915/perf: Whitelist OA report trigger registers

OA reports can be triggered into the OA buffer by writing into the OAREPORTTRIG registers. Whitelist the registers to allow non-privileged user to trigger reports. Whitelist registers only if perf_stream_paranoid is set to 0. In i915_perf_open_ioctl, this setting is checked and the whitelist is en

[Intel-gfx] [PATCH 0/4] Allow privileged user to map the OA buffer

v1: Fixes a memory corruption due to addition of OA whitelist on demand. v2: Spinlock when applying whitelist v3: Use uncore->lock. Do not check for wal->count when applying whitelist. This cover letter is included to trigger "Test-with" an IGT patch. Tests - https://patchwork.freedesktop.org/ser

[Intel-gfx] [PATCH 1/4] drm/i915/perf: Ensure observation logic is not clock gated

From: Piotr Maciejewski A clock gating switch can control if the performance monitoring and observation logic is enaled or not. Ensure that we enable the clocks. v2: Separate code from other patches (Lionel) v3: Reset PMON enable when disabling perf to save power (Lionel) v4: Use intel_uncore_rm

[Intel-gfx] [PATCH 3/4] drm/i915/perf: Whitelist OA counter and buffer registers

It is useful to have markers in the OA reports to identify triggered reports. Whitelist some OA counters that can be used as markers. A triggered report can be found faster if we can sample the HW tail and head registers when the report was triggered. Whitelist OA buffer specific registers. v2: -

Re: [Intel-gfx] [PATCH] Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization"

On Mon, 2020-08-03 at 21:40 -0700, Matt Roper wrote: > The hardware team has dropped this workaround from the bspec; it is no > longer needed. > > This reverts commit 111822b21be995a3a4a731066db3d820523c57f7. Reviewed-by: José Roberto de Souza > > Bspec: 49291 > Cc: José Roberto de Souza < > j

Re: [Intel-gfx] [PATCH 1/6] xen/gntdev: Fix dmabuf import with non-zero sgt offset

On 8/4/20 9:11 AM, Jürgen Groß wrote: > On 31.07.20 14:51, Oleksandr Andrushchenko wrote: >> From: Oleksandr Andrushchenko >> >> It is possible that the scatter-gather table during dmabuf import has >> non-zero offset of the data, but user-space doesn't expect that. >> Fix this by failing the imp

Re: [Intel-gfx] [PATCH 2/6] drm/xen-front: Fix misused IS_ERR_OR_NULL checks

On 8/4/20 9:12 AM, Jürgen Groß wrote: > On 31.07.20 14:51, Oleksandr Andrushchenko wrote: >> From: Oleksandr Andrushchenko >> >> The patch c575b7eeb89f: "drm/xen-front: Add support for Xen PV >> display frontend" from Apr 3, 2018, leads to the following static >> checker warning: >> >> driver

Re: [Intel-gfx] [PATCH 11/66] drm/i915: Preallocate stashes for vma page-directories

On Tue, Aug 4, 2020 at 4:08 PM Chris Wilson wrote: > > Quoting Thomas Hellström (Intel) (2020-07-30 13:28:19) > > > > On 7/28/20 4:50 PM, Chris Wilson wrote: > > > > > > It's in the user critical path (the shortest path to perform their > > > sequence of operations), but it's before the dma-fence

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: add syncobj timeline support

== Series Details == Series: drm/i915: add syncobj timeline support URL : https://patchwork.freedesktop.org/series/80245/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8839_full -> Patchwork_18306_full Summary --- **

Re: [Intel-gfx] [PATCH 11/66] drm/i915: Preallocate stashes for vma page-directories

Quoting Thomas Hellström (Intel) (2020-07-30 13:28:19) > > On 7/28/20 4:50 PM, Chris Wilson wrote: > > > > It's in the user critical path (the shortest path to perform their > > sequence of operations), but it's before the dma-fence itself. I say > > that's a particularly nasty false claim that it

[Intel-gfx] [PULL] drm-misc-fixes

Hi Dave and Daniel, here's this week's PR for drm-misc-fixes. A number of small driver and HW fixes, one in TTM, one in docs. Three of the patches don't have a Fixes tag, which a find concerning. Best regards Thomas drm-misc-fixes-2020-08-04: * backmerge from drm-fixes at v5.8-rc7 * add orient

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: add syncobj timeline support

== Series Details == Series: drm/i915: add syncobj timeline support URL : https://patchwork.freedesktop.org/series/80245/ State : success == Summary == CI Bug Log - changes from CI_DRM_8839 -> Patchwork_18306 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: add syncobj timeline support

== Series Details == Series: drm/i915: add syncobj timeline support URL : https://patchwork.freedesktop.org/series/80245/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. _

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: add syncobj timeline support

== Series Details == Series: drm/i915: add syncobj timeline support URL : https://patchwork.freedesktop.org/series/80245/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3effdabf8574 drm/i915: introduce a mechanism to extend execbuf2 -:377: CHECK:SPACING: spaces preferred around

[Intel-gfx] [PATCH 2/2] drm/i915: add syncobj timeline support

Introduces a new parameters to execbuf so that we can specify syncobj handles as well as timeline points. v2: Reuse i915_user_extension_fn v3: Check that the chained extension is only present once (Chris) v4: Check that dma_fence_chain_find_seqno returns a non NULL fence (Lionel) v5: Use BIT_UL

[Intel-gfx] [PATCH 0/2] drm/i915: add syncobj timeline support

Hi all, Squashing Chris' patch from yesterday. Test-with: 20200804085057.349998-1-lionel.g.landwer...@intel.com Cheers, Lionel Landwerlin (2): drm/i915: introduce a mechanism to extend execbuf2 drm/i915: add syncobj timeline support .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 367

[Intel-gfx] [PATCH 1/2] drm/i915: introduce a mechanism to extend execbuf2

We're planning to use this for a couple of new feature where we need to provide additional parameters to execbuf. v2: Check for invalid flags in execbuffer2 (Lionel) v3: Rename I915_EXEC_EXT -> I915_EXEC_USE_EXTENSIONS (Chris) v4: Rebase Move array fence parsing in i915_gem_do_execbuffer()