Re: [Intel-gfx] [PATCH 3/4] drm/i915/perf: Whitelist OA counter and buffer registers

2020-07-20 Thread Lionel Landwerlin
On 21/07/2020 05:00, Umesh Nerlige Ramappa wrote: From: Piotr Maciejewski It is useful to have markers in the OA reports to identify triggered reports. Whitelist some OA counters that can be used as markers. A triggered report can be found faster if we can sample the HW tail and head registers

Re: [Intel-gfx] [PATCH 1/4] drm/i915/perf: Ensure observation logic is not clock gated

2020-07-20 Thread Lionel Landwerlin
On 21/07/2020 05:00, Umesh Nerlige Ramappa wrote: From: Piotr Maciejewski A clock gating switch can control if the performance monitoring and observation logic is enaled or not. Ensure that we enable the clocks. v2: Separate code from other patches (Lionel) v3: Reset PMON enable when disabling

[Intel-gfx] ✗ Fi.CI.BAT: failure for Allow privileged user to map the OA buffer (rev3)

2020-07-20 Thread Patchwork
== Series Details == Series: Allow privileged user to map the OA buffer (rev3) URL : https://patchwork.freedesktop.org/series/79460/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8768 -> Patchwork_18217 Summary --- *

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Allow privileged user to map the OA buffer (rev3)

2020-07-20 Thread Patchwork
== Series Details == Series: Allow privileged user to map the OA buffer (rev3) URL : https://patchwork.freedesktop.org/series/79460/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. __

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Allow privileged user to map the OA buffer (rev3)

2020-07-20 Thread Patchwork
== Series Details == Series: Allow privileged user to map the OA buffer (rev3) URL : https://patchwork.freedesktop.org/series/79460/ State : warning == Summary == $ dim checkpatch origin/drm-tip 60886d35a086 drm/i915/perf: Ensure observation logic is not clock gated d11b49577d7e drm/i915/perf:

Re: [Intel-gfx] [PATCH 4/4] drm/i915/perf: Map OA buffer to user space for gen12 performance query

2020-07-20 Thread Umesh Nerlige Ramappa
Hi Chris, I have added your comments, but I have a few questions below: Thanks for your help, Umesh On Mon, Jul 20, 2020 at 07:00:12PM -0700, Umesh Nerlige Ramappa wrote: From: Piotr Maciejewski i915 used to support time based sampling mode which is good for overall system monitoring, but is

[Intel-gfx] [PATCH 3/4] drm/i915/perf: Whitelist OA counter and buffer registers

2020-07-20 Thread Umesh Nerlige Ramappa
From: Piotr Maciejewski It is useful to have markers in the OA reports to identify triggered reports. Whitelist some OA counters that can be used as markers. A triggered report can be found faster if we can sample the HW tail and head registers when the report was triggered. Whitelist OA buffer

[Intel-gfx] [PATCH 2/4] drm/i915/perf: Whitelist OA report trigger registers

2020-07-20 Thread Umesh Nerlige Ramappa
From: Piotr Maciejewski OA reports can be triggered into the OA buffer by writing into the OAREPORTTRIG registers. Whitelist the registers to allow user to trigger reports. v2: - Move related change to this patch (Lionel) - Bump up perf revision (Lionel) v3: Pardon whitelisted registers for sel

[Intel-gfx] [PATCH 0/4] Allow privileged user to map the OA buffer

2020-07-20 Thread Umesh Nerlige Ramappa
This cover letter is included to trigger "Test-with" an IGT patch. Tests - https://patchwork.freedesktop.org/series/79695/ Signed-off-by: Umesh Nerlige Ramappa Test-with: 20200721015717.46279-1-umesh.nerlige.rama...@intel.com Piotr Maciejewski (4): drm/i915/perf: Ensure observation logic is n

[Intel-gfx] [PATCH 1/4] drm/i915/perf: Ensure observation logic is not clock gated

2020-07-20 Thread Umesh Nerlige Ramappa
From: Piotr Maciejewski A clock gating switch can control if the performance monitoring and observation logic is enaled or not. Ensure that we enable the clocks. v2: Separate code from other patches (Lionel) v3: Reset PMON enable when disabling perf to save power (Lionel) Fixes: 00a7f0d7155c ("

[Intel-gfx] [PATCH 4/4] drm/i915/perf: Map OA buffer to user space for gen12 performance query

2020-07-20 Thread Umesh Nerlige Ramappa
From: Piotr Maciejewski i915 used to support time based sampling mode which is good for overall system monitoring, but is not enough for query mode used to measure a single draw call or dispatch. Gen9-Gen11 are using current i915 perf implementation for query, but Gen12+ requires a new approach f

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells

2020-07-20 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells URL : https://patchwork.freedesktop.org/series/79691/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8767_full -> Patchwork_18215_full ===

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3 URL : https://patchwork.freedesktop.org/series/79693/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8768 -> Patchwork_18216

Re: [Intel-gfx] [PATCH 1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

2020-07-20 Thread Almahallawy, Khaled
On Mon, 2020-07-20 at 17:07 -0700, Manasi Navare wrote: > On Mon, Jul 20, 2020 at 04:41:25PM -0700, Khaled Almahallawy wrote: > > Add the missing CP2520 pattern 2 and 3 phy compliance patterns > > > > Signed-off-by: Khaled Almahallawy > > --- > > drivers/gpu/drm/drm_dp_helper.c | 2 +- > > inclu

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3 URL : https://patchwork.freedesktop.org/series/79693/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checke

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: TPS4 PHY test pattern compliance support

2020-07-20 Thread Almahallawy, Khaled
On Mon, 2020-07-20 at 17:11 -0700, Manasi Navare wrote: > On Mon, Jul 20, 2020 at 04:41:26PM -0700, Khaled Almahallawy wrote: > > Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source > > tests. > > > > Signed-off-by: Khaled Almahallawy > > --- > > drivers/gpu/drm/i915/display/intel_dp.c

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: TPS4 PHY test pattern compliance support

2020-07-20 Thread Manasi Navare
On Mon, Jul 20, 2020 at 04:41:26PM -0700, Khaled Almahallawy wrote: > Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. > > Signed-off-by: Khaled Almahallawy > --- > drivers/gpu/drm/i915/display/intel_dp.c | 14 -- > drivers/gpu/drm/i915/i915_reg.h | 4 +++

Re: [Intel-gfx] [PATCH 1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

2020-07-20 Thread Manasi Navare
On Mon, Jul 20, 2020 at 04:41:25PM -0700, Khaled Almahallawy wrote: > Add the missing CP2520 pattern 2 and 3 phy compliance patterns > > Signed-off-by: Khaled Almahallawy > --- > drivers/gpu/drm/drm_dp_helper.c | 2 +- > include/drm/drm_dp_helper.h | 4 +++- > 2 files changed, 4 insertions(+

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells

2020-07-20 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells URL : https://patchwork.freedesktop.org/series/79691/ State : success == Summary == CI Bug Log - changes from CI_DRM_8767 -> Patchwork_18215 =

Re: [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table

2020-07-20 Thread Almahallawy, Khaled
On Mon, 2020-07-20 at 10:09 -0700, José Roberto de Souza wrote: > This new HBR2 table for TGL-U and TGL-Y is required to pass > DisplayPort compliance. > > BSpec: 49291 > Cc: Khaled Almahallawy > Signed-off-by: José Roberto de Souza > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 19

[Intel-gfx] [PATCH 2/2] drm/i915/dp: TPS4 PHY test pattern compliance support

2020-07-20 Thread Khaled Almahallawy
Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 14 -- drivers/gpu/drm/i915/i915_reg.h | 4 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] [PATCH 1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

2020-07-20 Thread Khaled Almahallawy
Add the missing CP2520 pattern 2 and 3 phy compliance patterns Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 2 +- include/drm/drm_dp_helper.h | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells

2020-07-20 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells URL : https://patchwork.freedesktop.org/series/79691/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells

2020-07-20 Thread Souza, Jose
On Tue, 2020-07-21 at 02:29 +0300, Imre Deak wrote: > The dependency between power wells is determined by the ordering of the > power well list: when enabling the power wells for a domain, this > happens walking the power well list forward, while disabling them > happens in the reverse direction. A

[Intel-gfx] [PATCH] drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells

2020-07-20 Thread Imre Deak
The dependency between power wells is determined by the ordering of the power well list: when enabling the power wells for a domain, this happens walking the power well list forward, while disabling them happens in the reverse direction. Accordingly a power well on the list must follow any other po

[Intel-gfx] ✗ Fi.CI.IGT: failure for HAX sched/core: Paper over the ttwu() race

2020-07-20 Thread Patchwork
== Series Details == Series: HAX sched/core: Paper over the ttwu() race URL : https://patchwork.freedesktop.org/series/79682/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8766_full -> Patchwork_18214_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/tgl: Set subplatforms

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/tgl: Set subplatforms URL : https://patchwork.freedesktop.org/series/79681/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8766_full -> Patchwork_18213_full Su

[Intel-gfx] ✓ Fi.CI.BAT: success for HAX sched/core: Paper over the ttwu() race

2020-07-20 Thread Patchwork
== Series Details == Series: HAX sched/core: Paper over the ttwu() race URL : https://patchwork.freedesktop.org/series/79682/ State : success == Summary == CI Bug Log - changes from CI_DRM_8766 -> Patchwork_18214 Summary --- **SUCCES

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HAX sched/core: Paper over the ttwu() race

2020-07-20 Thread Patchwork
== Series Details == Series: HAX sched/core: Paper over the ttwu() race URL : https://patchwork.freedesktop.org/series/79682/ State : warning == Summary == $ dim checkpatch origin/drm-tip 61aff133b9cc HAX sched/core: Paper over the ttwu() race -:8: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrap

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/tgl: Set subplatforms

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/tgl: Set subplatforms URL : https://patchwork.freedesktop.org/series/79681/ State : success == Summary == CI Bug Log - changes from CI_DRM_8766 -> Patchwork_18213 Summary

[Intel-gfx] [CI] HAX sched/core: Paper over the ttwu() race

2020-07-20 Thread Chris Wilson
On all Core platforms we see <4> [181.766629] WARNING: CPU: 0 PID: 1524 at kernel/sched/core.c:2388 ttwu_queue_wakelist+0xbc/0xd0 <4> [181.766637] Modules linked in: i915(+) vgem snd_hda_codec_realtek snd_hda_codec_generic ledtrig_audio amdgpu mei_hdcp x86_pkg_temp_thermal coretemp crct10dif_pc

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/tgl: Set subplatforms

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/tgl: Set subplatforms URL : https://patchwork.freedesktop.org/series/79681/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. __

[Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add new voltage swing table

2020-07-20 Thread José Roberto de Souza
This new HBR2 table for TGL-U and TGL-Y is required to pass DisplayPort compliance. BSpec: 49291 Cc: Khaled Almahallawy Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_ddi.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms

2020-07-20 Thread José Roberto de Souza
There is no way to differentiate TGL-U from TGL-Y by the PCI ids as some ids are available in both SKUs. So here using the root device id in the PCI bus that iGPU is in to differentiate between U and Y. BSpec: 44455 Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] ✗ Fi.CI.IGT: failure for Asynchronous flip implementation for i915 (rev5)

2020-07-20 Thread Patchwork
== Series Details == Series: Asynchronous flip implementation for i915 (rev5) URL : https://patchwork.freedesktop.org/series/74386/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8766_full -> Patchwork_18212_full Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for Expose crtc dither state and connector max bpc via debugfs (rev2)

2020-07-20 Thread Patchwork
== Series Details == Series: Expose crtc dither state and connector max bpc via debugfs (rev2) URL : https://patchwork.freedesktop.org/series/79664/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8766_full -> Patchwork_18211_full

Re: [Intel-gfx] [PATCH 05/10] drm/i915/gt: Distinguish the virtual breadcrumbs from the irq breadcrumbs

2020-07-20 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-07-20 12:23:35) > > On 20/07/2020 10:23, Chris Wilson wrote: > > -void intel_engine_init_breadcrumbs(struct intel_engine_cs *engine) > > +struct intel_breadcrumbs * > > +intel_breadcrumbs_create(struct intel_engine_cs *irq_engine) > > { > > - struct intel_breadcr

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling URL : https://patchwork.freedesktop.org/series/79663/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8766_full -> Patchwork_18210_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for Asynchronous flip implementation for i915 (rev5)

2020-07-20 Thread Patchwork
== Series Details == Series: Asynchronous flip implementation for i915 (rev5) URL : https://patchwork.freedesktop.org/series/74386/ State : success == Summary == CI Bug Log - changes from CI_DRM_8766 -> Patchwork_18212 Summary --- **

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Asynchronous flip implementation for i915 (rev5)

2020-07-20 Thread Patchwork
== Series Details == Series: Asynchronous flip implementation for i915 (rev5) URL : https://patchwork.freedesktop.org/series/74386/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately. ___

[Intel-gfx] ✓ Fi.CI.BAT: success for Expose crtc dither state and connector max bpc via debugfs (rev2)

2020-07-20 Thread Patchwork
== Series Details == Series: Expose crtc dither state and connector max bpc via debugfs (rev2) URL : https://patchwork.freedesktop.org/series/79664/ State : success == Summary == CI Bug Log - changes from CI_DRM_8766 -> Patchwork_18211 Summ

Re: [Intel-gfx] [PATCH 4/4] drm/i915/perf: Map OA buffer to user space for gen12 performance query

2020-07-20 Thread Chris Wilson
Quoting Umesh Nerlige Ramappa (2020-07-18 01:04:37) > +static vm_fault_t vm_fault_oa(struct vm_fault *vmf) > +{ > + struct vm_area_struct *vma = vmf->vma; > + struct i915_perf_stream *stream = vma->vm_private_data; > + struct drm_i915_gem_object *obj = stream->oa_buffer.vma->obj;

[Intel-gfx] [RFC PATH i-g-t 14/15] tests/core_hotunplug: Assert expected device presence/absence

2020-07-20 Thread Janusz Krzysztofik
Don't rely on successful write to sysfs control files, assert existence / non-existence of a respective device sysfs node as well. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/tests/core_hotunplug.c b/tests/core_

[Intel-gfx] [RFC PATH i-g-t 13/15] tests/core_hotunplug: Process return values of sysfs operations

2020-07-20 Thread Janusz Krzysztofik
Return values of driver bind/unbind / device remove/recover sysfs operations are now ignored. Assert their correctness. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/tests/core_hotunplug.c b/tests

[Intel-gfx] [RFC PATH i-g-t 02/15] tests/core_hotunplug: Constify dev_bus_addr string

2020-07-20 Thread Janusz Krzysztofik
Device bus address structure field is always initialized with a pointer to a substring of the device sysfs path and never used for its modification. Declare it as a constant string. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-

[Intel-gfx] [RFC PATH i-g-t 00/15] tests/core_hotunplug: Fixes and enhancements

2020-07-20 Thread Janusz Krzysztofik
Since the test is still blocklisted due to driver issues and won't be executed on CI, I'm providing a link where results obtained from a rybot run with the test removed from the blocklist can be found: https://patchwork.freedesktop.org/series/79662/ Failures reported there come from driver and not

[Intel-gfx] [RFC PATH i-g-t 01/15] tests/core_hotunplug: Use igt_assert_fd()

2020-07-20 Thread Janusz Krzysztofik
There is a new library helper that asserts validity of open file descriptors. Use it instead of open coding. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.

[Intel-gfx] [RFC PATH i-g-t 15/15] tests/core_hotunplug: Explicitly ignore unused return values

2020-07-20 Thread Janusz Krzysztofik
Some return values are not useful and can be ignored. Wrap those cases inside igt_ignore_warn(), not only to make sure compilers are happy but also to clearly document our decisions. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 6 +++--- 1 file changed, 3 insertions(+), 3 dele

[Intel-gfx] [RFC PATH i-g-t 07/15] tests/core_hotunplug: Pass errors via a data structure field

2020-07-20 Thread Janusz Krzysztofik
A pointer to fatal error messages can be passed around via hotunplug structure, no need to declare it as global. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 92 +- 1 file changed, 45 insertions(+), 47 deletions(-) diff --git a/tests/cor

[Intel-gfx] [RFC PATH i-g-t 03/15] tests/core_hotunplug: Consolidate duplicated debug messages

2020-07-20 Thread Janusz Krzysztofik
Some debug messages which designate specific test operations, or their greater parts at least, sound always the same, no matter which subtest they are called from. Emit them, possibly updated with subtest specified modifiers, from inside respective helpers instead of duplicating them in subtest bo

[Intel-gfx] [RFC PATH i-g-t 09/15] tests/core_hotunplug: Prepare invariant data once per test run

2020-07-20 Thread Janusz Krzysztofik
Each subtest now calls a prepare() helper which opens a couple of files required by that subtest. Those files are then closed after use, either directly from the subtest body, or indirectly from inside one of helper functions called during the subtest execution. That approach not only makes lifec

[Intel-gfx] [RFC PATH i-g-t 12/15] tests/core_hotunplug: Fail subtests on device close errors

2020-07-20 Thread Janusz Krzysztofik
Since health checks are now run from follow-up fixture sections, it is safe to fail subtests without the need to abort the test execution. Do that on device close errors instead of emitting warnings. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 8 1 file changed, 4 in

[Intel-gfx] [RFC PATH i-g-t 11/15] tests/core_hotunplug: Follow failed subtests with health checks

2020-07-20 Thread Janusz Krzysztofik
Subtests now forcibly call or request igt_abort on failures in order to avoid silently leaving an exercised device in an unusable state. However, a failure inside a subtest doesn't always mean the device is no longer working correctly and reboot is needed. On the other hand, if a subtest just fail

[Intel-gfx] [RFC PATH i-g-t 10/15] tests/core_hotunplug: Skip selectively on sysfs close errors

2020-07-20 Thread Janusz Krzysztofik
Since we no longer open a device DRM sysfs node, only a PCI one, driver unbind operations are no longer affected by missed or unsuccessful sysfs file close attempts. Skip only affected subtests if that happens. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 9 + 1 file c

[Intel-gfx] [RFC PATH i-g-t 06/15] tests/core_hotunplug: Maintain a single data structure instance

2020-07-20 Thread Janusz Krzysztofik
The following changes to the test are planned: - avoid global variables, - skip subtest after device close errors, - prepare invariant data only once per test run, - move device health checks to igt_fixture sections, - try to recover from subtest failures instead of aborting. For that to be possibl

[Intel-gfx] [RFC PATH i-g-t 08/15] tests/core_hotunplug: Handle device close errors

2020-07-20 Thread Janusz Krzysztofik
The test now ignores device close errors. Those errors are believed to have no influence on device health so there is no need to process them the same way as we mostly do on errors, i.e., notify CI about a problem via igt_abort. However, those errors may indicate issues with the test itself. Mor

[Intel-gfx] [RFC PATH i-g-t 05/15] tests/core_hotunplug: Fix missing newline

2020-07-20 Thread Janusz Krzysztofik
A trailing newline is missing from one of fatal error messages, fix it. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c index 6ceb325ad..cac88c2f3 100644 --- a/tests/c

[Intel-gfx] [RFC PATH i-g-t 04/15] tests/core_hotunplug: Assert successful device filter application

2020-07-20 Thread Janusz Krzysztofik
Return value of igt_device_filter_add() representing a number of successfully installed device filters is now ignored. Fail if not 1. Signed-off-by: Janusz Krzysztofik --- tests/core_hotunplug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/core_hotunplug.c b/tests/c

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Expose crtc dither state and connector max bpc via debugfs (rev2)

2020-07-20 Thread Patchwork
== Series Details == Series: Expose crtc dither state and connector max bpc via debugfs (rev2) URL : https://patchwork.freedesktop.org/series/79664/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Expose crtc dither state and connector max bpc via debugfs (rev2)

2020-07-20 Thread Patchwork
== Series Details == Series: Expose crtc dither state and connector max bpc via debugfs (rev2) URL : https://patchwork.freedesktop.org/series/79664/ State : warning == Summary == $ dim checkpatch origin/drm-tip 525ee1f3c796 i915/debug: Expose crtc dither state via debugfs -:45: WARNING:SYMBOLI

[Intel-gfx] [PATCH v5 0/5] Asynchronous flip implementation for i915

2020-07-20 Thread Karthik B S
Without async flip support in the kernel, fullscreen apps where game resolution is equal to the screen resolution, must perform an extra blit per frame prior to flipping. Asynchronous page flips will also boost the FPS of Mesa benchmarks. v2: -Few patches have been squashed and patches have been

[Intel-gfx] [PATCH v5 4/5] drm/i915: Do not call drm_crtc_arm_vblank_event in async flips

2020-07-20 Thread Karthik B S
Since the flip done event will be sent in the flip_done_handler, no need to add the event to the list and delay it for later. v2: -Moved the async check above vblank_get as it was causing issues for PSR. v3: -No need to wait for vblank to pass, as this wait was causing a 16ms delay once

[Intel-gfx] [PATCH v5 1/5] drm/i915: Add enable/disable flip done and flip done handler

2020-07-20 Thread Karthik B S
Add enable/disable flip done functions and the flip done handler function which handles the flip done interrupt. Enable the flip done interrupt in IER. Enable flip done function is called before writing the surface address register as the write to this register triggers the flip done interrupt F

[Intel-gfx] [PATCH v5 2/5] drm/i915: Add support for async flips in I915

2020-07-20 Thread Karthik B S
Set the Async Address Update Enable bit in plane ctl when async flip is requested. v2: -Move the Async flip enablement to individual patch (Paulo) v3: -Rebased. v4: -Add separate plane hook for async flip case (Ville) v5: -Rebased. Signed-off-by: Karthik B S Signed-off-by: Vandita Kulkarni -

[Intel-gfx] [PATCH v5 3/5] drm/i915: Add checks specific to async flips

2020-07-20 Thread Karthik B S
Support added only for async flips on primary plane. If flip is requested on any other plane, reject it. Make sure there is no change in fbc, offset and framebuffer modifiers when async flip is requested. If any of these are modified, reject async flip. v2: -Replace DRM_ERROR (Paulo) -Add ch

[Intel-gfx] [PATCH v5 5/5] drm/i915: Enable async flips in i915

2020-07-20 Thread Karthik B S
Enable asynchronous flips in i915 for gen9+ platforms. v2: -Async flip enablement should be a stand alone patch (Paulo) v3: -Move the patch to the end of the serires (Paulo) v4: -Rebased. v5: -Rebased. Signed-off-by: Karthik B S Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/displ

[Intel-gfx] [PATCH 2/2] i915/debug: Expose Max BPC info via debugfs

2020-07-20 Thread Bhanuprakash Modem
[Why] It's useful to know the max supported panel BPC for IGT testing. [How] Expose the max supported BPC for the panel via a debugfs file on the connector, "output_bpc". Example usage: cat /sys/kernel/debug/dri/0/DP-1/output_bpc Signed-off-by: Bhanuprakash Modem --- .../drm/i915/display/intel

[Intel-gfx] [PATCH 1/2] i915/debug: Expose crtc dither state via debugfs

2020-07-20 Thread Bhanuprakash Modem
[Why] It's useful to know the dithering state for IGT testing. [How] Expose the dithering state for the crtc via a debugfs file "dither". Example usage: cat /sys/kernel/debug/dri/0/crtc-0/dither Signed-off-by: Bhanuprakash Modem --- drivers/gpu/drm/i915/i915_debugfs.c | 17 + 1

[Intel-gfx] [PATCH 0/2] Expose crtc dither state and connector max bpc via debugfs

2020-07-20 Thread Bhanuprakash Modem
[why] It's useful to know the max supported panel BPC and PIPE dither state for IGT testing. [how] * Expose the connector max supported BPC for the panel via a debugfs file on the connector, "output_bpc". Example: cat /sys/kernel/debug/dri/0/DP-1/output_bpc * Expose the dithering state for th

[Intel-gfx] [PATCH 0/2] Expose crtc dither state and connector max bpc via debugfs

2020-07-20 Thread Bhanuprakash Modem
[why] It's useful to know the max supported panel BPC and PIPE dither state for IGT testing. [how] * Expose the connector max supported BPC for the panel via a debugfs file on the connector, "output_bpc". Example: cat /sys/kernel/debug/dri/0/DP-1/output_bpc * Expose the dithering state for th

[Intel-gfx] [PATCH 2/2] i915/debug: Expose Max BPC info via debugfs

2020-07-20 Thread Bhanuprakash Modem
[Why] It's useful to know the max supported panel BPC for IGT testing. [How] Expose the max supported BPC for the panel via a debugfs file on the connector, "output_bpc". Example usage: cat /sys/kernel/debug/dri/0/DP-1/output_bpc Signed-off-by: Bhanuprakash Modem --- .../drm/i915/display/intel

[Intel-gfx] [PATCH 1/2] i915/debug: Expose crtc dither state via debugfs

2020-07-20 Thread Bhanuprakash Modem
[Why] It's useful to know the dithering state for IGT testing. [How] Expose the dithering state for the crtc via a debugfs file "dither". Example usage: cat /sys/kernel/debug/dri/0/crtc-0/dither Signed-off-by: Bhanuprakash Modem --- drivers/gpu/drm/i915/i915_debugfs.c | 17 + 1

Re: [Intel-gfx] [PATCH 05/10] drm/i915/gt: Distinguish the virtual breadcrumbs from the irq breadcrumbs

2020-07-20 Thread Tvrtko Ursulin
On 20/07/2020 10:23, Chris Wilson wrote: On the virtual engines, we only use the intel_breadcrumbs for tracking signaling of stale breadcrumbs from the irq_workers. They do not have any associated interrupt handling, active requests are passed to a physical engine and associated breadcrumb inter

Re: [Intel-gfx] [Linaro-mm-sig] [PATCH 1/2] dma-buf.rst: Document why indefinite fences are a bad idea

2020-07-20 Thread Intel
Hi, On 7/9/20 2:33 PM, Daniel Vetter wrote: Comes up every few years, gets somewhat tedious to discuss, let's write this down once and for all. What I'm not sure about is whether the text should be more explicit in flat out mandating the amdkfd eviction fences for long running compute workloads

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling URL : https://patchwork.freedesktop.org/series/79663/ State : success == Summary == CI Bug Log - changes from CI_DRM_8766 -> Patchwork_18210 =

Re: [Intel-gfx] [PATCH 12/66] drm/i915: Switch to object allocations for page directories

2020-07-20 Thread Chris Wilson
Quoting Matthew Auld (2020-07-20 11:34:10) > On 15/07/2020 12:50, Chris Wilson wrote: > > The GEM object is grossly overweight for the practicality of tracking > > large numbers of individual pages, yet it is currently our only > > abstraction for tracking DMA allocations. Since those allocations n

Re: [Intel-gfx] [PATCH 11/66] drm/i915: Preallocate stashes for vma page-directories

2020-07-20 Thread Matthew Auld
On 15/07/2020 12:50, Chris Wilson wrote: We need to make the DMA allocations used for page directories to be performed up front so that we can include those allocations in our memory reservation pass. The downside is that we have to assume the worst case, even before we know the final layout, and

Re: [Intel-gfx] [PATCH 12/66] drm/i915: Switch to object allocations for page directories

2020-07-20 Thread Matthew Auld
On 15/07/2020 12:50, Chris Wilson wrote: The GEM object is grossly overweight for the practicality of tracking large numbers of individual pages, yet it is currently our only abstraction for tracking DMA allocations. Since those allocations need to be reserved upfront before an operation, and tha

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling URL : https://patchwork.freedesktop.org/series/79663/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each com

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling

2020-07-20 Thread Patchwork
== Series Details == Series: series starting with [01/10] drm/i915/gem: Remove disordered per-file request list for throttling URL : https://patchwork.freedesktop.org/series/79663/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5658c6f4f5ec drm/i915/gem: Remove disordered per-f

Re: [Intel-gfx] [PATCH 03/10] drm/i915/gt: Replace intel_engine_transfer_stale_breadcrumbs

2020-07-20 Thread Tvrtko Ursulin
On 20/07/2020 10:23, Chris Wilson wrote: After staring at the breadcrumb enabling/cancellation and coming to the conclusion that the cause of the mysterious stale breadcrumbs must the act of submitting a completed requests, we can then redirect those completed requests onto a dedicated signaled

[Intel-gfx] [PATCH 10/10] drm/i915: Drop i915_request.lock serialisation around await_start

2020-07-20 Thread Chris Wilson
Originally, we used the signal->lock as a means of following the previous link in its timeline and peeking at the previous fence. However, we have replaced the explicit serialisation with a series of very careful probes that anticipate the links being deleted and the fences recycled before we are a

[Intel-gfx] [PATCH 06/10] drm/i915/gt: Move intel_breadcrumbs_arm_irq earlier

2020-07-20 Thread Chris Wilson
Move the __intel_breadcrumbs_arm_irq earlier, next to the disarm_irq, so that we can make use of it in the following patch. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 88 ++--- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/driv

[Intel-gfx] [PATCH 09/10] drm/i915/gt: Split the breadcrumb spinlock between global and contexts

2020-07-20 Thread Chris Wilson
As we funnel more and more contexts into the breadcrumbs on an engine, the hold time of b->irq_lock grows. As we may then contend with the b->irq_lock during request submission, this increases the burden upon the engine->active.lock and so directly impacts both our execution latency and client late

[Intel-gfx] [PATCH 03/10] drm/i915/gt: Replace intel_engine_transfer_stale_breadcrumbs

2020-07-20 Thread Chris Wilson
After staring at the breadcrumb enabling/cancellation and coming to the conclusion that the cause of the mysterious stale breadcrumbs must the act of submitting a completed requests, we can then redirect those completed requests onto a dedicated signaled_list at the time of construction and so elim

[Intel-gfx] [PATCH 04/10] drm/i915/gt: Only transfer the virtual context to the new engine if active

2020-07-20 Thread Chris Wilson
One more complication of preempt-to-busy with respect to the virtual engine is that we may have retired the last request along the virtual engine at the same time as preparing to submit the completed request to a new engine. That submit will be shortcircuited, but not before we have updated the con

[Intel-gfx] [PATCH 05/10] drm/i915/gt: Distinguish the virtual breadcrumbs from the irq breadcrumbs

2020-07-20 Thread Chris Wilson
On the virtual engines, we only use the intel_breadcrumbs for tracking signaling of stale breadcrumbs from the irq_workers. They do not have any associated interrupt handling, active requests are passed to a physical engine and associated breadcrumb interrupt handler. This causes issues for us as w

[Intel-gfx] [PATCH 01/10] drm/i915/gem: Remove disordered per-file request list for throttling

2020-07-20 Thread Chris Wilson
I915_GEM_THROTTLE dates back to the time before contexts where there was just a single engine, and therefore a single timeline and request list globally. That request list was in execution/retirement order, and so walking it to find a particular aged request made sense and could be split per file.

[Intel-gfx] [PATCH 07/10] drm/i915/gt: Hold context/request reference while breadcrumbs are active

2020-07-20 Thread Chris Wilson
Currently we hold no actual reference to the request nor context while they are attached to a breadcrumb. To avoid freeing the request/context too early, we serialise with cancel-breadcrumbs by taking the irq spinlock in i915_request_retire(). The alternative is to take a reference for a new breadc

[Intel-gfx] [PATCH 08/10] drm/i915/gt: Track signaled breadcrumbs outside of the breadcrumb spinlock

2020-07-20 Thread Chris Wilson
Make b->signaled_requests a lockless-list so that we can manipulate it outside of the b->irq_lock. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 42 +-- .../gpu/drm/i915/gt/intel_breadcrumbs_types.h | 2 +- drivers/gpu/drm/i915/i915_request.h

[Intel-gfx] [PATCH 02/10] drm/i915: Remove requirement for holding i915_request.lock for breadcrumbs

2020-07-20 Thread Chris Wilson
Since the breadcrumb enabling/cancelling itself is serialised by the breadcrumbs.irq_lock, with a bit of care we can remove the outer serialisation with i915_request.lock for concurrent dma_fence_enable_signaling(). This has the important side-effect of eliminating the nested i915_request.lock with

[Intel-gfx] [PULL] gvt-next

2020-07-20 Thread Zhenyu Wang
Hi, Sorry that this might be a bit late as last week our QA people were busy on something else..So this is gvt changes queued for 5.9 which is to improve guest suspend/resume with proper PCI PM state tracking for resource handling, e.g ppgtt. Hopefully this could still be in queue for 5.9. Thank