== Series Details ==
Series: SAGV support for Gen12+ (rev32)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8403_full -> Patchwork_17531_full
Summary
---
**SUCCESS
== Series Details ==
Series: Rebased Big Joiner patch series for 8K 2p1p (rev2)
URL : https://patchwork.freedesktop.org/series/76791/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8404 -> Patchwork_17536
Summary
---
== Series Details ==
Series: Rebased Big Joiner patch series for 8K 2p1p (rev2)
URL : https://patchwork.freedesktop.org/series/76791/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7cc206446898 HAX to make DSC work on the icelake test system
ed5182840902 drm/i915: Remove hw.mode
From: Maarten Lankhorst
v3:
* Change state to crtc_state, fix rebase err (Manasi)
v2:
* Manual Rebase (Manasi)
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_display.c | 61 ---
.../drm/i915/display/intel_display_types.h|
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
include/linux/dma-buf.h
between commit:
6f49c2515e22 ("dma-buf: fix documentation build warnings")
from the drm-misc-fixes tree and commit:
09606b5446c2 ("dma-buf: add peer2peer flag")
from the drm tree.
I fixed it up
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 2935ed5339c4 ("drm/i915: Remove logical HW ID").
The bot has tested the following trees: v5.6.7.
v5.6.7: Failed to apply! Possible dependencies:
1883a0a4658e ("drm/i915: Track hw
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 2935ed5339c4 ("drm/i915: Remove logical HW ID").
The bot has tested the following trees: v5.6.7.
v5.6.7: Failed to apply! Possible dependencies:
03d0ed8a8e93 ("drm/i915: Skip cap
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: ee5e5e7a5e0f ("drm/i915: Add HDCP framework + base
implementation").
The bot has tested the following trees: v5.6.7, v5.4.35, v4.19.118.
v5.6.7: Build failed! Errors:
drivers/gp
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: ee5e5e7a5e0f ("drm/i915: Add HDCP framework + base
implementation").
The bot has tested the following trees: v5.6.7, v5.4.35, v4.19.118.
v5.6.7: Failed to apply! Possible dependenci
== Series Details ==
Series: drm/i915/pmu: Keep a reference to module while active
URL : https://patchwork.freedesktop.org/series/76779/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8402_full -> Patchwork_17530_full
Summar
On Wed, Apr 29, 2020 at 01:10:23PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Display WA #1105 says that FBC requires PLANE_STRIDE to be a multiple
> of 512 bytes on gen9 and glk.
>
> This is definitely true for glk as certain tests (such as
> igt/kms_big_fb/linear-16bpp-rotate-0) are
== Series Details ==
Series: drm/i915/gem: Use chained reloc batches
URL : https://patchwork.freedesktop.org/series/76793/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8403 -> Patchwork_17535
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915/gem: Use chained reloc batches
URL : https://patchwork.freedesktop.org/series/76793/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
dffa147cbfe1 drm/i915/gem: Use chained reloc batches
-:200: CHECK:SPACING: spaces preferred around that '/' (
== Series Details ==
Series: Steer multicast register workaround verification
URL : https://patchwork.freedesktop.org/series/76792/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8403 -> Patchwork_17534
Summary
---
**
== Series Details ==
Series: Steer multicast register workaround verification
URL : https://patchwork.freedesktop.org/series/76792/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c89d34e2 drm/i915: Setup multicast register steering for all gen >= 10
4759117a6337 drm/i915: St
== Series Details ==
Series: Rebased Big Joiner patch series for 8K 2p1p
URL : https://patchwork.freedesktop.org/series/76791/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC
== Series Details ==
Series: series starting with [1/9] Revert "drm/i915/tgl: Include ro parts of l3
to invalidate"
URL : https://patchwork.freedesktop.org/series/76777/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401_full -> Patchwork_17529_full
==
Quoting Patchwork (2020-05-01 00:06:47)
> Possible regressions
>
> * igt@i915_selftest@live@mman:
> - fi-gdg-551: [PASS][1] -> [DMESG-FAIL][2]
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8403/fi-gdg-551/igt@i915_selftest@l...@mman.html
>[2]:
> https://
The ring is a precious resource: we anticipate to only use a few hundred
bytes for a request, and only try to reserve that before we start. If we
go beyond our guess in building the request, then instead of waiting at
the start of execbuf before we hold any locks or other resources, we
may trigger
We're seeing some CI errors indicating that a workaround did not apply
properly on EHL/JSL. The workaround in question is updating a multicast
register, the failures are only seen on specific CI machines, and the
failures only seem to happen on resets and such rather than on initial
driver load.
Reads of multicast registers give the value for slice/subslice 0 by
default unless we manually steer them to a specific slice/subslice. If
slice/subslice 0 are fused off in hardware, we'll always read back a
value of 0 rather than the value we wrote into the multicast register.
Although wa_init_mc
The multicast register ranges are slightly different for gen11 and gen12
than the table we have for gen8. This information never got updated in
the bspec, so this patch is based on a spreadsheet provided by the
hardware team while they work on getting the official documentation
updated.
Signed-of
Steering of multicast registers for workarounds is needed on all
platforms gen10 and above. Move the wa_init_mcr() call to the
higher-level gt_init_workarounds() rather than re-calling it for each
individual platform.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 9
Now that we manually steer multicast register reads during workaround
verification, it should be safe to verify these ones too.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/
From: Maarten Lankhorst
Enabling is done in a special sequence and so should plane updates
be. Ideally the end user never notices the second pipe is used,
so use the vblank evasion to cover both pipes.
This way ideally everything will be tear free, and updates are
really atomic as userspace expe
From: Maarten Lankhorst
Make sure that when a plane is set in a bigjoiner mode, we will add
their counterpart to the atomic state as well. This will allow us to
make sure all state is available when planes are checked.
Because of the funny interactions with bigjoiner and planar YUV
formats, w
From: Maarten Lankhorst
Small changes to intel_dp_mode_valid(), allow listing modes that
can only be supported in the bigjoiner configuration, which is
not supported yet.
eDP does not support bigjoiner, so do not expose bigjoiner only
modes on the eDP port.
Changes since v1:
- Disallow bigjoine
From: Maarten Lankhorst
Unfortunately I have no way to test this, but it should be correct
if the bios sets up bigjoiner in a sane way.
Skip iterating over bigjoiner slaves, only the master has the state we
care about.
Add the width of the bigjoiner slave to the reconstructed fb.
Hide the bigj
From: Maarten Lankhorst
We need to look at hw.fb for the framebuffer, and add the translation
for the slave_plane_state. With these changes we set the correct
rectangle on the bigjoiner slave, and don't set incorrect
src/dst/visibility on the slave plane.
v2:
* Manual rebase (Manasi)
Signed-off
From: Maarten Lankhorst
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the crtc's in software, no hardware or plane
programming is done yet. Blobs are also copied fr
From: Maarten Lankhorst
v2:
* Manual Rebase (Manasi)
Signed-off-by: Maarten Lankhorst
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_display.c | 61 ---
.../drm/i915/display/intel_display_types.h| 11 ++-
drivers/gpu/drm/i915/intel_pm.c | 76
From: Maarten Lankhorst
DSC is available on the display emulator, but not set in DPCD.
Override the entries to allow bigjoiner testing.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_dp_helper.c | 4 ++--
include/drm/drm_dp_helper.h | 1 +
2 files changed, 3 insertions(+), 2 dele
From: Maarten Lankhorst
The members in hw.mode can be used from adjusted_mode as well,
use that when available.
Some places that use hw.mode can be converted to use adjusted_mode
as well.
v2:
* Manual rebase (Manasi)
* remove the use of pipe_mode defined in patch 3 (Manasi)
Signed-off-by: Maar
From: Maarten Lankhorst
Make vdsc work when no output is enabled. The big joiner needs VDSC
on the slave, so enable it and set the appropriate bits.
Also update timestamping constants, because slave crtc's are not
updated in drm_atomic_helper_update_legacy_modeset_state().
This should be enough
This rebases the big joiner patch series from February:
https://patchwork.freedesktop.org/series/73014/
or from Maarten's internal tree:
https://patchwork.freedesktop.org/series/73014/
This especially needs a thorough review on Patch 10/11 due to
all the refactoring around commit_modeset_enables
From: Maarten Lankhorst
Dump debugfs and planar links as well, this will make it easier to debug
when things go wrong.
v4:
* Rebase
Changes since v1:
- Report planar slaves as such, now that we have the plane_state switch.
Changes since v2:
- Rebase on top of the new plane format dumping
Signed
== Series Details ==
Series: drm/i915: Implement vm_ops->access for gdb access into mmaps (rev3)
URL : https://patchwork.freedesktop.org/series/76783/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
== Series Details ==
Series: drm/i915: Implement vm_ops->access for gdb access into mmaps (rev3)
URL : https://patchwork.freedesktop.org/series/76783/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8403 -> Patchwork_17532
Su
== Series Details ==
Series: drm/i915/perf: Add support for multi context perf queries (rev4)
URL : https://patchwork.freedesktop.org/series/76588/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401_full -> Patchwork_17528_full
=
== Series Details ==
Series: SAGV support for Gen12+ (rev32)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8403 -> Patchwork_17531
Summary
---
**SUCCESS**
No r
Hi!
Here's this week drm-misc-fixes PR
Thanks!
Maxime
drm-misc-fixes-2020-04-30:
A few resources-related fixes for qxl, some doc build warnings and ioctl
fixes for dma-buf, an off-by-one fix in edid, and a return code fix in
DP-MST
The following changes since commit 9da67433f64eb89e5a7b479775078
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix glk watermark calculations
URL : https://patchwork.freedesktop.org/series/76774/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401_full -> Patchwork_17527_full
==
gdb uses ptrace() to peek and poke bytes of the target's address space.
The driver must implement an vm_ops->access() handler or else gdb will
be unable to inspect the pointer and report it as out-of-bounds.
Worse than useless as it causes immediate suspicion of the valid GTT
pointer, distracting t
gdb uses ptrace() to peek and poke bytes of the target's address space.
The driver must implement an vm_ops->access() handler or else gdb will
be unable to inspect the pointer and report it as out-of-bounds.
Worse than useless as it causes immediate suspicion of the valid GTT
pointer, distracting t
== Series Details ==
Series: series starting with [1/9] drm/i915/gt: Stop holding onto the
pinned_default_state
URL : https://patchwork.freedesktop.org/series/76771/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401_full -> Patchwork_17526_full
==
Starting from TGL we need to have a separate wm0
values for SAGV and non-SAGV which affects
how calculations are done.
v2: Remove long lines
v3: Removed COLOR_PLANE enum references
v4, v5, v6: Fixed rebase conflict
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_displa
Introduce platform dependent SAGV checking in
combination with bandwidth state pipe SAGV mask.
v2, v3, v4, v5, v6: Fix rebase conflict
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 30 --
1 file changed, 28 insertions(+), 2 deletions(-)
di
We need to calculate SAGV mask also in a non-modeset
commit, however currently active_pipes are only calculated
for modesets in global atomic state, thus now we will be
tracking those also in bw_state in order to be able to
properly access global data.
v2: - Removed pre/post plane SAGV updates fro
gdb uses ptrace() to peek and poke bytes of the target's address space.
The kernel must implement an vm_ops->access() handler or else gdb will
be unable to inspect the pointer and report it as out-of-bounds. Worse
than useless as it causes immediate suspicion of the valid GPU pointer.
Signed-off-b
gdb uses ptrace() to peek and poke bytes of the target's address space.
The kernel must implement an vm_ops->access() handler or else gdb will
be unable to inspect the pointer and report it as out-of-bounds. Worse
than useless as it causes immediate suspicion of the valid GTT pointer.
Signed-off-b
gdb uses ptrace() to peek and poke bytes of the target's address space.
The driver must implement an vm_ops->access() handler or else gdb will
be unable to inspect the pointer and report it as out-of-bounds.
Worse than useless as it causes immediate suspicion of the valid GTT
pointer, distracting t
== Series Details ==
Series: drm/i915/pmu: Keep a reference to module while active
URL : https://patchwork.freedesktop.org/series/76779/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8402 -> Patchwork_17530
Summary
---
We need to calculate SAGV mask also in a non-modeset
commit, however currently active_pipes are only calculated
for modesets in global atomic state, thus now we will be
tracking those also in bw_state in order to be able to
properly access global data.
v2: - Removed pre/post plane SAGV updates fro
Future platforms require per-crtc SAGV evaluation
and serializing global state when those are changed
from different commits.
v2: - Add has_sagv check to intel_crtc_can_enable_sagv
so that it sets bit in reject mask.
- Use bw_state in intel_pre/post_plane_enable_sagv
instead of ato
While a perf event is open, keep a reference to the module so we don't
remove the driver internals mid-sampling.
Testcase: igt/perf_pmu/module-unload
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/i915_pmu.c | 5 -
1 file changed, 4 insert
Quoting Chris Wilson (2020-04-30 19:28:59)
> +static void test_unload(void)
> +{
> + igt_fork(child, 1) {
...
> + igt_debug("Read %d events from perf and trial unload\n",
> count);
> + pmu_read_multi(fd, count, buf);
> + igt_assert_eq(unload_i915(),
On Thu, Apr 30, 2020 at 5:38 PM Sean Paul wrote:
>
> On Wed, Apr 29, 2020 at 4:57 AM Jani Nikula
> wrote:
> >
> > On Tue, 28 Apr 2020, Michal Orzel wrote:
> > > As suggested by the TODO list for the kernel DRM subsystem, replace
> > > the deprecated functions that take/drop modeset locks with n
If the PMU is active, it will be utilising the driver internals for its
sampling. Therefore we must not remove the driver while PMU is still
awake! Hence try to unload the module while the pmu is open.
Signed-off-by: Chris Wilson
---
tests/perf_pmu.c | 96
If the PMU is active, it will be utilising the driver internals for its
sampling. Therefore we must not remove the driver while PMU is still
awake! Hence try to unload the module while the pmu is open.
Signed-off-by: Chris Wilson
---
tests/perf_pmu.c | 96
On 30/04/2020 12:18, Chris Wilson wrote:
Since the introduction of 'soft-rc6', we aim to park the device quickly
and that results in frequent idling of the whole device. Currently upon
idling we free the batch buffer pool, and so this renders the cache
ineffective for many workloads. If we want
Quoting Patchwork (2020-04-30 17:25:55)
> == Series Details ==
>
> Series: series starting with [1/9] Revert "drm/i915/tgl: Include ro parts of
> l3 to invalidate"
> URL : https://patchwork.freedesktop.org/series/76777/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_
== Series Details ==
Series: series starting with [1/9] Revert "drm/i915/tgl: Include ro parts of l3
to invalidate"
URL : https://patchwork.freedesktop.org/series/76777/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401 -> Patchwork_17529
== Series Details ==
Series: series starting with [1/9] Revert "drm/i915/tgl: Include ro parts of l3
to invalidate"
URL : https://patchwork.freedesktop.org/series/76777/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
53177bdb8662 Revert "drm/i915/tgl: Include ro parts of l3 to
Aim for completeness for invalidating everything
and mark state pointers stale.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index b47230583494..
Request boundary is a global observation point for
all operations. Thus flush the LLC too.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915
This reverts commit 62037229b7d94f1db5ef8d2e2ec819832ef3.
L3 ro cache invalidation is part of the dword0 of pipe
control. Also it is not relevant to this gen.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 -
drivers/gpu/drm/i915/gt/intel_lrc.c |
HDC pipeline flush is bit on the first dword of
the PIPE_CONTROL, not the second. Make it so.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_engine.h | 23 +++
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 3
Flush enable bit is a sync point which makes this
pipecontrol to wait that everything on a previous
pipe control are flushed. Enable it to make
sure that our invalidates doesn't overlap.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 ++
1 file changed, 2 insertions(+)
Treat media state as any other state and invalidate it.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 789efece1fc0..859c901c8935 100644
---
Do a l3 fabric flush when emitting flush.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
b/drivers/gpu/drm/i915/
To ensure that we have global observation point wrt to
all data, flush amfs.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_
Flush TDL and L3.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index b3ddb928d231..0bbce218157f 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.
On Wed, Apr 29, 2020 at 4:57 AM Jani Nikula wrote:
>
> On Tue, 28 Apr 2020, Michal Orzel wrote:
> > As suggested by the TODO list for the kernel DRM subsystem, replace
> > the deprecated functions that take/drop modeset locks with new helpers.
> >
> > Signed-off-by: Michal Orzel
> > ---
> > dri
Quoting Lionel Landwerlin (2020-04-30 14:55:33)
> We want to enable performance monitoring on multiple contexts to cover
> the Iris use case of using 2 GEM contexts (3D & compute).
>
> So start by breaking the OA configuration BO which contains global &
> per context register writes.
>
> NOA muxe
== Series Details ==
Series: drm/i915/selftests: Add tiled blits selftest (rev2)
URL : https://patchwork.freedesktop.org/series/76746/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8399_full -> Patchwork_17525_full
Summary
On 30/04/2020 17:55, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-04-30 14:55:35)
@@ -1382,6 +1446,12 @@ static void i915_oa_stream_destroy(struct
i915_perf_stream *stream)
BUG_ON(stream != perf->exclusive_stream);
+ err = intel_context_pin(stream->config_context);
Quoting Lionel Landwerlin (2020-04-30 14:55:35)
> @@ -1382,6 +1446,12 @@ static void i915_oa_stream_destroy(struct
> i915_perf_stream *stream)
>
> BUG_ON(stream != perf->exclusive_stream);
>
> + err = intel_context_pin(stream->config_context);
> + if (err) {
> +
== Series Details ==
Series: drm/i915/perf: Add support for multi context perf queries (rev4)
URL : https://patchwork.freedesktop.org/series/76588/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401 -> Patchwork_17528
Summa
Hi
On 28.04.2020 16:27, Tvrtko Ursulin wrote:
>
> On 28/04/2020 14:19, Marek Szyprowski wrote:
>> The Documentation/DMA-API-HOWTO.txt states that dma_map_sg returns the
>> numer of the created entries in the DMA address space. However the
>> subsequent calls to dma_sync_sg_for_{device,cpu} and dma
== Series Details ==
Series: series starting with [01/25] perf/core: Only copy-to-user after
completely unlocking all locks, v3.
URL : https://patchwork.freedesktop.org/series/76724/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8391_full -> Patchwork_17513_full
=
== Series Details ==
Series: drm/i915/perf: Add support for multi context perf queries (rev4)
URL : https://patchwork.freedesktop.org/series/76588/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a350ade77f42 drm/i915/perf: break OA config buffer object in 2
5845f5921ffd drm/i915
On Wed, Apr 29, 2020 at 11:19:07AM +, k...@kl.wtf wrote:
> April 28, 2020 5:14 PM, "Daniel Vetter" wrote:
>
> > On Fri, Apr 24, 2020 at 06:26:15PM +0200, Kenny Levinsen wrote:
> >
> >> Some processes, such as systemd, are only polling for EPOLLERR|EPOLLHUP.
> >> As drm_file uses unkeyed wake
Hi Dave and Daniel,
Here goes drm-intel-fixes-2020-04-30:
- Fix selftest refcnt leak (Xiyu)
- Fix gem vma lock (Chris)
- Fix gt's i915_request.timeline acquire by checking if cacheline is valid
(Chris)
- Fix IRQ postinistall fault masks (Matt)
Thanks,
Rodrigo.
The following changes since commi
Chris doesn't like that.
v2: Don't forget to configure the kernel so that periodic reports are
written appropriately (Lionel)
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 153 +
drivers/gpu/drm/i915/i915_perf_types.h | 10 +-
2 files
Hi all,
Just adding Mesa MR links to the patches.
Cheers,
Lionel Landwerlin (4):
drm/i915/perf: break OA config buffer object in 2
drm/i915/perf: stop using the kernel context
drm/i915/perf: prepare driver to receive multiple ctx handles
drm/i915/perf: enable filtering on multiple contex
We want to enable performance monitoring on multiple contexts to cover
the Iris use case of using 2 GEM contexts (3D & compute).
So start by breaking the OA configuration BO which contains global &
per context register writes.
NOA muxes & OA configurations are global, while FLEXEU register
config
Make all the internal necessary changes before we flip the switch.
v2: Use an unlimited number of intel contexts (Chris)
v3: Handle GEM context with multiple RCS0 logical contexts (Chris)
v4: Let the intel_context create its own timeline (Chris)
Only pin configuration context when needed (Ch
Add 2 new properties to the i915-perf open ioctl to specify an array
of GEM context handles as well as the length of the array.
This can be used by drivers using multiple GEM contexts to implement a
single GL context.
Signed-off-by: Lionel Landwerlin
Link: https://gitlab.freedesktop.org/mesa/mes
Hi Ville
I don't fully grok the i915 changes to provide meaningful review.
There are couple of small comments below, but regardless of those
Patches 01-11 and 14-16 are:
Reviewed-by: Emil Velikov
On Tue, 28 Apr 2020 at 18:20, Ville Syrjala
wrote:
> The downside is that drm_mode_expose_to_user
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix glk watermark calculations
URL : https://patchwork.freedesktop.org/series/76774/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401 -> Patchwork_17527
Su
== Series Details ==
Series: drm/i915: Update Slylake PCI IDs
URL : https://patchwork.freedesktop.org/series/76750/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8399_full -> Patchwork_17524_full
Summary
---
**FAILUR
Quoting Ville Syrjala (2020-04-30 13:58:22)
> From: Ville Syrjälä
>
> Remove all the stepping dependent cnl workarounds. Bspec lists
> more steppings than this so presumably these are classed as
> pre-production. And this is cnl after all so no one should
> really care anyway.
>
> Signed-off-by:
Quoting Lionel Landwerlin (2020-04-28 13:08:16)
> Add 2 new properties to the i915-perf open ioctl to specify an array
> of GEM context handles as well as the length of the array.
>
> This can be used by drivers using multiple GEM contexts to implement a
> single GL context.
>
> Signed-off-by: Li
From: Ville Syrjälä
Remove all the stepping dependent cnl workarounds. Bspec lists
more steppings than this so presumably these are classed as
pre-production. And this is cnl after all so no one should
really care anyway.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/gt/intel_rc6.c
From: Ville Syrjälä
GLK wants the +1 adjustement for the "blocks per line" value
for x-tile/y-tile, just like cnl+.
Also the x-tile and linear cases are almost identical. The only
difference is this +1 which is always done for glk+, and only
done for linear on skl/bxt. Let's unify it to a single
: Update DRIVER_DATE to 20200417 (2020-04-17 09:35:00 +0300)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2020-04-30
for you to fetch changes up to 230982d8d8df7f9d9aa216840ea2db1df6ad5d37:
drm/i915: Update DRIVER_DATE to 20200430 (20
Quoting Zhenyu Wang (2020-04-26 05:46:19)
> On 2020.04.22 13:12:30 +0800, Zhenyu Wang wrote:
> >
> > Hi,
> >
> > Here's current gvt-next. This removes left non-upstream xen support bits
> > which will be kept out of tree instead. And several guest context shadow
> > optimizations from Yan.
> >
>
== Series Details ==
Series: series starting with [1/9] drm/i915/gt: Stop holding onto the
pinned_default_state
URL : https://patchwork.freedesktop.org/series/76771/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8401 -> Patchwork_17526
> -Original Message-
> From: Ville Syrjala
> Sent: Thursday, April 30, 2020 12:25 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Gupta, Anshuman ; Shankar, Uma
>
> Subject: [PATCH 3/3] drm/i915: Streamline the artihmetic
>
> From: Ville Syrjälä
>
> All these ROUNDIND_FACTORs and what
== Series Details ==
Series: series starting with [1/9] drm/i915/gt: Stop holding onto the
pinned_default_state
URL : https://patchwork.freedesktop.org/series/76771/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0e9eeaba9f3e drm/i915/gt: Stop holding onto the pinned_default_st
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