== Series Details ==
Series: drm/i915/perf: Do not clear pollin for small user read buffers (rev4)
URL : https://patchwork.freedesktop.org/series/75085/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8206 -> Patchwork_17121
Thanks for the patch, puhed to dinq
Manasi
On Wed, Mar 18, 2020 at 06:59:41PM -0700, Aditya Swarup wrote:
> Add definitions for registers grouped under Transcoder VRR function
> with necessary bitfields.
>
> Bspec: 49268
>
> v2: Use REG_GENMASK, correct tabs/space indentation and move the
> de
It is wrong to block the user thread in the next poll when OA data is
already available which could not fit in the user buffer provided in
the previous read. In several cases the exact user buffer size is not
known. Blocking user space in poll can lead to data loss when the
buffer size used is smal
It is wrong to block the user thread in the next poll when OA data is
already available which could not fit in the user buffer provided in
the previous read. In several cases the exact user buffer size is not
known. Blocking user space in poll can lead to data loss when the
buffer size used is smal
== Series Details ==
Series: series starting with [1/3] drm/i915/dp: Return the right vswing tables
URL : https://patchwork.freedesktop.org/series/75183/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8206 -> Patchwork_17120
Specification was updated with vswing tables for different
configurations.
Also reordering icl_mg_phy_ddi_buf_trans struct to match table order.
BSpec: 21735
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 93 +++-
1 file changed, 73 insert
EHL has now only one table for all DP transmission modes.
BSpec: 21257
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/di
DDI ports have its encoders initialized with INTEL_OUTPUT_DDI type and
later eDP ports that have the type changed to INTEL_OUTPUT_EDP.
But for all other DDI ports it can drive HDMI or DP depending on what
user connects to the ports.
ehl_get_combo_buf_trans() and tgl_get_combo_buf_trans() was check
== Series Details ==
Series: drm/i915/execlists: Workaround switching back to a complete context
URL : https://patchwork.freedesktop.org/series/75181/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8205 -> Patchwork_17119
Su
Quoting Mika Kuoppala (2020-03-27 20:33:29)
> Chris Wilson writes:
>
> > In what seems remarkably similar to the w/a required to not reload an
> > idle context with HEAD==TAIL, it appears we must prevent the HW from
> > switching to an idle context in ELSP[1], while simultaneously trying to
> > p
Chris Wilson writes:
> In what seems remarkably similar to the w/a required to not reload an
> idle context with HEAD==TAIL, it appears we must prevent the HW from
> switching to an idle context in ELSP[1], while simultaneously trying to
> preempt the HW to run another context and a continuation
Quoting Mika Kuoppala (2020-03-27 20:19:15)
> Chris Wilson writes:
>
> > Quoting Tvrtko Ursulin (2020-03-27 15:59:45)
> >>
> >> On 27/03/2020 11:26, Chris Wilson wrote:
> >> > In what seems remarkably similar to the w/a required to not reload an
> >> > idle context with HEAD==TAIL, it appears we
== Series Details ==
Series: drm/i915/execlists: Workaround switching back to a complete context
URL : https://patchwork.freedesktop.org/series/75181/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b7cd77b4f576 drm/i915/execlists: Workaround switching back to a complete context
Chris Wilson writes:
> Quoting Tvrtko Ursulin (2020-03-27 15:59:45)
>>
>> On 27/03/2020 11:26, Chris Wilson wrote:
>> > In what seems remarkably similar to the w/a required to not reload an
>> > idle context with HEAD==TAIL, it appears we must prevent the HW from
>> > switching to an idle contex
In what seems remarkably similar to the w/a required to not reload an
idle context with HEAD==TAIL, it appears we must prevent the HW from
switching to an idle context in ELSP[1], while simultaneously trying to
preempt the HW to run another context and a continuation of the idle
context (which is n
On Thu, Mar 26, 2020 at 04:49:55PM -0700, Swathi Dhanavanthri wrote:
> This workaround now applies to all steppings, not just A0.
> Wa_1409085225 is a temporary A0-only W/A however it is
> identical to Wa_14010229206 and hence the combined workaround
> is made permanent.
> Bspec: 52890
FYI, this p
On Tue, Mar 24, 2020 at 10:41:11AM +0530, Animesh Manna wrote:
> DP_COMP_CTL and DP_COMP_PAT register used to program DP
> compliance pattern.
>
> v1: Initial patch.
> v2: used pipe instead of port in macro definition. [Manasi]
> v3: used trans_offset for offset calculation. [Manasi]
> v4: Used MM
Hi Chris,
> > On Thu, Mar 26, 2020 at 02:27:27PM +, Chris Wilson wrote:
> > > Userptr causes lockdep to complain when we are using the aliasing-ppgtt
> > > (and ggtt, but for that it is rightfully so to complain about) in that
> > > when we revoke the userptr we take a mutex which we also us
On Fri, Mar 27, 2020 at 05:40:41PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 20, 2020 at 04:17:27PM -0700, Manasi Navare wrote:
> > On Fri, Mar 20, 2020 at 09:08:31PM +0200, Ville Syrjälä wrote:
> > > On Thu, Mar 19, 2020 at 03:20:50PM -0700, Manasi Navare wrote:
> > > > On Thu, Mar 19, 2020 at 06:
== Series Details ==
Series: drm/i915/hdcp: Update CP as per the kernel internal state (rev2)
URL : https://patchwork.freedesktop.org/series/72251/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8203 -> Patchwork_17118
Summa
On Wed, Mar 18, 2020 at 04:00:36PM -0700, Manasi Navare wrote:
> On Fri, Mar 13, 2020 at 06:48:24PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Dump the port sync stat in intel_dump_pipe_config().
> >
> > Signed-off-by: Ville Syrjälä
>
> Reviewed-by: Manasi Navare
Pushed up t
Hi Chris,
On Thu, Mar 26, 2020 at 02:27:27PM +, Chris Wilson wrote:
> Userptr causes lockdep to complain when we are using the aliasing-ppgtt
> (and ggtt, but for that it is rightfully so to complain about) in that
> when we revoke the userptr we take a mutex which we also use to revoke
> the
Quoting Tvrtko Ursulin (2020-03-27 15:59:45)
>
> On 27/03/2020 11:26, Chris Wilson wrote:
> > In what seems remarkably similar to the w/a required to not reload an
> > idle context with HEAD==TAIL, it appears we must prevent the HW from
> > switching to an idle context in ELSP[1], while simultaneo
Content Protection property should be updated as per the kernel
internal state. Let's say if Content protection is disabled
by userspace, CP property should be set to UNDESIRED so that
reauthentication will not happen until userspace request it again,
but when kernel disables the HDCP due to any DD
Quoting Andi Shyti (2020-03-27 16:27:27)
> Hi Chris,
>
> On Thu, Mar 26, 2020 at 02:27:27PM +, Chris Wilson wrote:
> > Userptr causes lockdep to complain when we are using the aliasing-ppgtt
> > (and ggtt, but for that it is rightfully so to complain about) in that
> > when we revoke the userp
== Series Details ==
Series: series starting with [01/21] Revert "drm/i915/gem: Drop relocation
slowpath"
URL : https://patchwork.freedesktop.org/series/75115/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8194_full -> Patchwork_17096_full
On 26/03/2020 23:18, Chris Wilson wrote:
Upon a GPU reset, we copy the default context image over top of the
guilty image. This will rollback the CTX_TIMESTAMP register to before
our value of ce->runtime.last. Reset both back to 0 so that we do not
encounter an underflow on the next schedule ou
On 27/03/2020 11:26, Chris Wilson wrote:
In what seems remarkably similar to the w/a required to not reload an
idle context with HEAD==TAIL, it appears we must prevent the HW from
switching to an idle context in ELSP[1], while simultaneously trying to
preempt the HW to run another context and a
On Tue, Mar 24, 2020 at 05:32:12PM +0200, Kai Vehmanen wrote:
> Commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup override
> enabled/disable callback"), added logic to toggle Codec Wake on gen9.
> This is used by audio driver when it resets the HDA controller.
>
> It seems explicit toggling o
On Fri, Mar 20, 2020 at 04:17:27PM -0700, Manasi Navare wrote:
> On Fri, Mar 20, 2020 at 09:08:31PM +0200, Ville Syrjälä wrote:
> > On Thu, Mar 19, 2020 at 03:20:50PM -0700, Manasi Navare wrote:
> > > On Thu, Mar 19, 2020 at 06:38:42PM +0200, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
> > >
>-Original Message-
>From: Intel-gfx On Behalf Of Chris
>Wilson
>Sent: Friday, March 27, 2020 7:22 AM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple
>kreffed struct
>
>For conveniences of callers that just want to use an i915_a
== Series Details ==
Series: drm/i915/tgl: Make Wa_14010229206 permanent
URL : https://patchwork.freedesktop.org/series/75139/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8197_full -> Patchwork_17107_full
Summary
---
== Series Details ==
Series: series starting with [RESEND,1/7] drm/dsc: use rc_model_size from DSC
config for PPS
URL : https://patchwork.freedesktop.org/series/75168/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Prevent GPU death on
ELSP[1] promotion to idle context
URL : https://patchwork.freedesktop.org/series/75138/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8197_full -> Patchwork_17106_full
===
== Series Details ==
Series: drm/i915/execlists: Prevent GPU death on ELSP[1] promotion to idle
context (rev7)
URL : https://patchwork.freedesktop.org/series/75130/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8201 -> Patchwork_17116
=
On Fri, Mar 27, 2020 at 07:27:56AM +, Mun, Gwan-gyeong wrote:
> On Fri, 2020-03-20 at 13:57 +0200, Laurent Pinchart wrote:
> > Hi Jani,
> >
> > On Fri, Mar 20, 2020 at 01:32:17PM +0200, Jani Nikula wrote:
> > > On Fri, 20 Mar 2020, Jani Nikula
> > > wrote:
> > > > On Tue, 11 Feb 2020, Gwan-gy
== Series Details ==
Series: drm/i915/execlists: Prevent GPU death on ELSP[1] promotion to idle
context (rev7)
URL : https://patchwork.freedesktop.org/series/75130/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ee89d7390a2e drm/i915/execlists: Prevent GPU death on ELSP[1] prom
The VBT fields match the DPCD data, so use the same helper.
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
Move the intialization of the rc_model_size from the common code into
encoder code, allowing different encoders to specify the size according
to their needs. Keep using the hard coded value in the encoders for now
to make this a non-functional change.
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signe
Stop overriding the VBT defined value for rc_model_size.
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index ca299a
The rc_model_size is specified in the DSC config, and the hardware
programming should respect that instead of hard coding a value of 8192.
Regardless, the rc_model_size in DSC config is currently hard coded to
the same value, so this should have no impact, other than allowing the
use of other size
The PPS is supposed to reflect the DSC config instead of hard coding the
rc_model_size. Make it so.
Currently all users of drm_dsc_pps_payload_pack() hard code the size to
8192 also in the DSC config, so this change should have no impact, other
than allowing the drivers to use other sizes as neede
Add a helper for calculating the rc buffer size from the DCPD offsets
DP_DSC_RC_BUF_BLK_SIZE and DP_DSC_RC_BUF_SIZE.
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_dsc.c | 27 +++
include/d
Use the new drm_dsc_dp_rc_buffer_size() helper to simplify rc buffer
size computation. No functional changes.
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 37 -
1 fi
== Series Details ==
Series: series starting with [1/3] drm/i915: Allow for different modes of
interruptible i915_active_wait
URL : https://patchwork.freedesktop.org/series/75166/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8201 -> Patchwork_17115
==
== Series Details ==
Series: drm/i915/execlists: Prevent GPU death on ELSP[1] promotion to idle
context (rev2)
URL : https://patchwork.freedesktop.org/series/75130/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8195_full -> Patchwork_17104_full
===
== Series Details ==
Series: drm/i915/perf: add support for multi context filtering
URL : https://patchwork.freedesktop.org/series/75164/
State : failure
== Summary ==
Applying: drm/i915/perf: break OA config buffer object in 2
Applying: drm/i915/perf: prepare driver to receive multiple ctx ha
== Series Details ==
Series: SAGV support for Gen12+ (rev3)
URL : https://patchwork.freedesktop.org/series/75129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8195_full -> Patchwork_17103_full
Summary
---
**SUCCESS*
In what seems remarkably similar to the w/a required to not reload an
idle context with HEAD==TAIL, it appears we must prevent the HW from
switching to an idle context in ELSP[1], while simultaneously trying to
preempt the HW to run another context and a continuation of the idle
context (which is n
== Series Details ==
Series: Re-org uC debugfs files and move them under GT (rev3)
URL : https://patchwork.freedesktop.org/series/74051/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8195_full -> Patchwork_17102_full
Summar
In what seems remarkably similar to the w/a required to not reload an
idle context with HEAD==TAIL, it appears we must prevent the HW from
switching to an idle context in ELSP[1], while simultaneously trying to
preempt the HW to run another context and a continuation of the idle
context (which is n
== Series Details ==
Series: drm/i915: Differentiate between aliasing-ppgtt and ggtt pinning (rev2)
URL : https://patchwork.freedesktop.org/series/75078/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8195_full -> Patchwork_17098_full
===
In what seems remarkably similar to the w/a required to not reload an
idle context with HEAD==TAIL, it appears we must prevent the HW from
switching to an idle context in ELSP[1], while simultaneously trying to
preempt the HW to run another context and a continuation of the idle
context (which is n
== Series Details ==
Series: i915 lpsp support for lpsp igt (rev5)
URL : https://patchwork.freedesktop.org/series/74648/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8195_full -> Patchwork_17097_full
Summary
---
**F
For conveniences of callers that just want to use an i915_active to
track a wide array of concurrent timelines, wrap the base i915_active
struct inside a kref. This i915_active will self-destruct after use.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Reviewed-by: Mika Kuoppala
---
drivers/gp
Allow some users the discretion to not immediately return on a normal
signal. Hopefully, they will opt to use TASK_KILLABLE instead.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_active.c | 6 --
drivers/gpu/drm/i915/i915_active.h | 6 +-
drivers/gpu/drm
We wish that the scheduler emit the context modification commands prior
to enabling the oa_config, for which we must explicitly inform it of the
ordering constraints. This is especially important as we now wait for
the final oa_config setup to be completed and as this wait may be on a
distinct cont
== Series Details ==
Series: drm/i915/execlists: Prevent GPU death on ELSP[1] promotion to idle
context (rev4)
URL : https://patchwork.freedesktop.org/series/75130/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8200 -> Patchwork_17113
=
On Thu, 26 Mar 2020 at 20:21, George Spelvin wrote:
>
> On Thu, Mar 26, 2020 at 05:04:43PM +, Matthew Auld wrote:
> > Reviewed-by: Matthew Auld
>
> Thank you! I got some incomprehensible error emails (reproduced at
> https://patchwork.freedesktop.org/series/75090/) from the patchwork
> daemo
Quoting Lionel Landwerlin (2020-03-27 10:32:06)
> Hi all,
>
> i915/perf has currently support for single context filtering. This
> allows mesa to read the content of the OA buffer and cut out any
> unrelated context running in a middle of a query.
>
> Iris currently uses 2 GEM contexts for 3D & c
Quoting Lionel Landwerlin (2020-03-27 10:32:07)
> We want to enable performance monitoring on multiple contexts to cover
> the Iris use case of using 2 GEM contexts (3D & compute).
>
> So start by breaking the OA configuration BO which contains global &
> per context register writes.
>
> NOA muxe
Make all the internal necessary changes before we flip the switch.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 493 ++---
drivers/gpu/drm/i915/i915_perf_types.h | 25 +-
2 files changed, 293 insertions(+), 225 deletions(-)
diff --git a/driv
Add 2 new properties to the i915-perf open ioctl to specify an arry of
GEM context handles as well as the length of the array.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 51 ++--
include/uapi/drm/i915_drm.h | 21 +
2 files
Hi all,
i915/perf has currently support for single context filtering. This
allows mesa to read the content of the OA buffer and cut out any
unrelated context running in a middle of a query.
Iris currently uses 2 GEM contexts for 3D & compute commands. In order
to support performance queries on th
We want to enable performance monitoring on multiple contexts to cover
the Iris use case of using 2 GEM contexts (3D & compute).
So start by breaking the OA configuration BO which contains global &
per context register writes.
NOA muxes & OA configurations are global, while FLEXEU register
config
== Series Details ==
Series: drm/i915/execlists: Prevent GPU death on ELSP[1] promotion to idle
context (rev4)
URL : https://patchwork.freedesktop.org/series/75130/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c9fccb8cc643 drm/i915/execlists: Prevent GPU death on ELSP[1] prom
In what seems remarkably similar to the w/a required to not reload an
idle context with HEAD==TAIL, it appears we must prevent the HW from
switching to an idle context in ELSP[1], while simultaneously trying to
preempt the HW to run another context and a continuation of the idle
context (which is n
== Series Details ==
Series: drm/i915/execlists: Prevent GPU death on ELSP[1] promotion to idle
context (rev3)
URL : https://patchwork.freedesktop.org/series/75130/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CH
== Series Details ==
Series: Enable HDR on Gen9 devices with lspcon hdr capability (rev4)
URL : https://patchwork.freedesktop.org/series/75148/
State : failure
== Summary ==
Applying: drm:i915:display: add checks for Gen9 devices with hdr capability
error: sha1 information is lacking or useles
In what seems remarkably similar to the w/a required to not reload an
idle context with HEAD==TAIL, it appears we must prevent the HW from
switching to an idle context in ELSP[1], while simultaneously trying to
preempt the HW to run another context and a continuation of the idle
context (which is n
== Series Details ==
Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev8)
URL : https://patchwork.freedesktop.org/series/72853/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8199 -> Patchwork_17110
this patch adds hdr capabilities checks for Gen9 devices with
lspcon support.
Signed-off-by: Vipin Anand
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 17 +
drivers/gpu/drm/i915/display/intel_lspcon.c | 9 +++--
2 files changed, 20 insertions(+), 6 deletions(-)
diff --g
Removing Uma's patches as it is already under review
https://patchwork.freedesktop.org/series/68081/
Once that is merged this patch need to be reviewed.
Vipin Anand (1):
drm:i915:display: add checks for Gen9 devices with hdr capability
drivers/gpu/drm/i915/display/intel_hdmi.c | 17
== Series Details ==
Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev8)
URL : https://patchwork.freedesktop.org/series/72853/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
63f769f40f4e video/hdmi: Add Unpack function for CTA-861-G DRM infoframe
DataB
Hi Dave and Daniel,
Here goes drm-intel-next-fixes-2020-03-27:
Fixes for instability on Baytrail and Haswell;
Ice Lake RPS; Sandy Bridge RC6; and few others around
GT hangchec/reset; livelock; and a null dereference.
Thanks,
Rodrigo.
The following changes since commit cb7adfd6ad12a11902ebe374be
> -Original Message-
> From: Intel-gfx On Behalf Of Vipin
> Anand
> Sent: Friday, March 27, 2020 1:02 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 0/7] Enable HDR on Gen9 devices with lspcon hdr
> capability
There is the series https://patchwork.freedeskto
On Thu, Mar 26, 2020 at 05:04:43PM +, Matthew Auld wrote:
> Reviewed-by: Matthew Auld
Thank you! I got some incomprehensible error emails (reproduced at
https://patchwork.freedesktop.org/series/75090/) from the patchwork
daemon, complaining about additional test failures. Obviously, I car
Hi Daniel, Dave,
Here's the first drm-misc-next-fixes PR for 5.7.
Thanks!
Maxime
drm-misc-next-fixes-2020-03-26:
Two main topics in that first drm-misc-next-fixes PR, first a revert of the
data-mapping property in the DT that turned out to be non-optimal (but
hasn't reached a stable release yet)
On Thu, Mar 26, 2020 at 2:44 PM Masahiro Yamada wrote:
> I collected more Reviewed-by and Acked-by,
> then pushed this series to
>
> git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git
> kbuild-asinstr
But not the version of the penultimate patch that Nick ack'd
_
On Sun, 1 Mar 2020, Serge Hallyn wrote:
> Thanks, this looks good to me, in keeping with the CAP_SYSLOG break.
>
> Acked-by: Serge E. Hallyn
>
> for the set.
>
> James/Ingo/Peter, if noone has remaining objections, whose branch
> should these go in through?
>
> thanks,
> -serge
>
> On Tue, F
On Fri, Mar 27, 2020 at 5:46 AM Jason A. Donenfeld wrote:
>
> On Thu, Mar 26, 2020 at 2:44 PM Masahiro Yamada wrote:
> > I collected more Reviewed-by and Acked-by,
> > then pushed this series to
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git
> > kbuild-asinstr
>
Hi all,
On Thu, Mar 26, 2020 at 6:22 PM Ingo Molnar wrote:
>
>
> * Jason A. Donenfeld wrote:
>
> > Very little has changed from last time, and this whole series still
> > looks good to me. I think I already ack'd most packages, but in case
> > it helps:
> >
> > Reviewed-by: Jason A. Donenfeld
>
this patch adds hdr capabilities checks for Gen9 devices with
lspcon support.
Signed-off-by: Vipin Anand
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 17 +
drivers/gpu/drm/i915/display/intel_lspcon.c | 9 +++--
2 files changed, 20 insertions(+), 6 deletions(-)
diff --g
From: Uma Shankar
Enable Colorspace as BT2020 if driving HDR content.Sending Colorimetry
data for HDR using AVI infoframe. LSPCON firmware expects this and though
SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device
which transfers the same to HDMI sink.
Signed-off-by: Uma Sh
Added missing signoff
Uma Shankar (6):
drm/i915/display: Add HDR Capability detection for LSPCON
drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
drm/i915/display: Attach HDR property for capable Gen9 devices
drm/i915/display: Set HDR Infoframe for HDR capable LSPCON devices
From: Uma Shankar
LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES
DPCD register. LSPCON implementations capable of supporting
HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch
reads the same, detects the HDR capability and adds this to
intel_lspcon struct.
Sign
From: Uma Shankar
Attach HDR property for Gen9 devices with MCA LSPCON
chips.
Signed-off-by: Uma Shankar
Signed-off-by: Vipin Anand
---
drivers/gpu/drm/i915/display/intel_lspcon.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
b/drivers/g
From: Uma Shankar
Blanking needs to be reduced to incorporate DP and HDMI timing/link
bandwidth limitations for CEA modes (4k@60 at 10 bpp). DP can drive
17.28Gbs while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps.
This will cause mode to blank out. Reduced Htotal by shortening the
back porc
From: Uma Shankar
Gen9 hardware supports HDMI2.0 through LSPCON chips.
Extending HDR support for MCA LSPCON based GEN9 devices.
SOC will drive LSPCON as DP and send HDR metadata as standard
DP SDP packets. LSPCON will be set to operate in PCON mode,
will receive the metadata and create Dynamic R
From: Uma Shankar
Send Dynamic Range and Mastering Infoframe (DRM for HDR metadata)
as SDP packet to LSPCON following the DP spec. LSPCON receives the
same and sends it to HDMI sink.
v2: Suppressed some warnings. No functional change.
Signed-off-by: Uma Shankar
Signed-off-by: Vipin Anand
---
Call intel_dp_set_infoframes() function on pipe updates to make sure
that we send VSC SDP and HDR Metadata Infoframe SDP (when applicable)
on fastsets.
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
1 file changed, 1 insertion(+)
dif
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it adds a compute routine for PSR VSC SDP.
As PSR routine can not use infoframes.vsc of crtc state, it also adds new
writing of DP SDPs (Secondary Data Packet) for PSR.
PSR routine has its own scenario and timings of writing a VS
Compared to implementation of DP and HDMI's encoder->infoframes_enabled,
the lspcon's implementation returns its active state. (we expect enabled
infoframe states of HW.) It leads to pipe state mismatch error
when ddi_get_config is called.
Because the current implementation of lspcon is not ready
In order to use computed config for DP SDPs (DP VSC SDP and DP HDR Metadata
Infoframe SDP), it replaces intel_dp_vsc_enable() function and
intel_dp_hdr_metadata_enable() function to intel_dp_set_infoframes()
function.
And it removes unused functions.
Before:
intel_dp_vsc_enable() and intel_dp_hdr
Added state readout for DP VSC SDP and enabled state validation
for DP VSC SDP.
v2: Minor style fix
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
v4: Use struct drm_device logging macros
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/dis
Call intel_dp_set_infoframes(false) function on intel_ddi_post_disable_dp()
to make sure not to send VSC SDP and HDR Metadata Infoframe SDP.
v5: Polish commit message [Uma]
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
1 file chang
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it uses a new psr vsc sdp compute routine.
Because PSR routine has its own scenario and timings of writing a VSC SDP,
the current PSR routine needs to have its own drm_dp_vsc_sdp structure
member variable on struct i915_psr.
In
It adds an unpack function for DRM infoframe for dynamic range and
mastering infoframe readout. It unpacks CTA-861-G DRM infoframe DataBytes
contained in the binary buffer into a structured frame of the HDMI Dynamic
Range and Mastering (DRM) infoframe.
CTA-861-G DRM infoframe spec is used for HDR
Dump out the HDMI Dynamic Range and Mastering (DRM) infoframe in the
normal crtc state dump.
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display
Added state readout for DP HDR Metadata Infoframe SDP.
Signed-off-by: Gwan-gyeong Mun
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_ddi.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_
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