* Masahiro Yamada wrote:
> This series of cleanups was prompted by Linus:
> https://lkml.org/lkml/2020/3/12/726
>
> First, this series drop always-on CONFIG_AS_* options.
> Some of those options were introduced in old days.
> For example, the check for CONFIG_AS_CFI dates back to 2006.
>
> We
== Series Details ==
Series: series starting with [v2,1/2] drm/dp: DRM DP helper for reading Ignore
MSA from DPCD
URL : https://patchwork.freedesktop.org/series/75042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8184_full -> Patchwork_17077_full
== Series Details ==
Series: drm_device managed resources (rev7)
URL : https://patchwork.freedesktop.org/series/73633/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8184_full -> Patchwork_17074_full
Summary
---
**FAI
== Series Details ==
Series: series starting with [v2,1/2] drm/dp: DRM DP helper for reading Ignore
MSA from DPCD
URL : https://patchwork.freedesktop.org/series/75042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8184 -> Patchwork_17077
==
Hi Daniele,
On Wed, Mar 11, 2020 at 06:16:25PM -0700, Daniele Ceraolo Spurio wrote:
> Rebased on top of Andi's patch. Note that some discussion is still
> ongoing on that patch.
>
> Also dropped the patch that caused a const->non-const conversion and
> fixed a couple of bugs:
> - keep printing HU
== Series Details ==
Series: series starting with [v2,1/2] drm/dp: DRM DP helper for reading Ignore
MSA from DPCD
URL : https://patchwork.freedesktop.org/series/75042/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b3e66fa48b38 drm/dp: DRM DP helper for reading Ignore MSA from
DP sink device sets the Ignore MSA bit in its
DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
ignore the MSA video timing paramaters and its ability to support
seamless video timing change over a range of timing exposed by
DisplayID and EDID.
This is required for the sink to indicate t
From: Aditya Swarup
This function sets the VRR property for connector based
on the platform support, EDID monitor range and DP sink
DPCD capability of outputing video without msa
timing information.
v2:
* Just set this in intel_dp_get_modes instead of new hook (Jani)
Cc: Ville Syrjälä
Cc: Jani
== Series Details ==
Series: drm/i915/selftests: Measure the energy consumed while in RC6 (rev4)
URL : https://patchwork.freedesktop.org/series/75035/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8184 -> Patchwork_17076
Su
Measure and compare the energy consumed, as reported by the rapl MSR,
by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not
at least halve the energy consumption of RC0, as this more than likely
means we failed to enter RC0 correctly.
If we can't measure the energy draw with the M
== Series Details ==
Series: drm/i915/selftests: Measure the energy consumed while in RC6 (rev3)
URL : https://patchwork.freedesktop.org/series/75035/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8184 -> Patchwork_17075
Su
== Series Details ==
Series: drm_device managed resources (rev7)
URL : https://patchwork.freedesktop.org/series/73633/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8184 -> Patchwork_17074
Summary
---
**SUCCESS**
== Series Details ==
Series: drm_device managed resources (rev7)
URL : https://patchwork.freedesktop.org/series/73633/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: mm/sl[uo]b: export __kmalloc_track(_node)_caller
Okay!
__
Chris Wilson writes:
> Quoting Francisco Jerez (2020-03-23 22:30:13)
>> Chris Wilson writes:
>>
>> > Quoting Francisco Jerez (2020-03-20 22:14:51)
>> >> Francisco Jerez writes:
>> >>
>> >> > Chris Wilson writes:
>> >> >
>> >> >> We dropped calling process_csb prior to handling direct submiss
== Series Details ==
Series: drm_device managed resources (rev7)
URL : https://patchwork.freedesktop.org/series/73633/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ccd08fc6b11b mm/sl[uo]b: export __kmalloc_track(_node)_caller
-:58: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-of
== Series Details ==
Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD
sequences
URL : https://patchwork.freedesktop.org/series/75034/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8183_full -> Patchwork_17073_full
===
On Tue, Mar 24, 2020 at 09:39:36PM +0100, Daniel Vetter wrote:
> The cleanup here is somewhat tricky, since we can't tell apart the
> allocated minor index from 0. So register a cleanup action first, and
> if the index allocation fails, unregister that cleanup action again to
> avoid bad mistakes.
On Mon, Mar 23, 2020 at 03:49:21PM +0100, Daniel Vetter wrote:
> The cleanup here is somewhat tricky, since we can't tell apart the
> allocated minor index from 0. So register a cleanup action first, and
> if the index allocation fails, unregister that cleanup action again to
> avoid bad mistakes.
On Tue, 24 Mar 2020 11:54:55 -0700, Umesh Nerlige Ramappa wrote:
>
> From: Lionel Landwerlin
>
> We're about to introduce an options to open the perf stream, giving
> the user ability to configure how often it wants the kernel to poll
> the OA registers for available data.
>
> Right now the workar
Hi Daniel.
On Mon, Mar 23, 2020 at 03:49:20PM +0100, Daniel Vetter wrote:
> Well for the simple stuff at least, vblank, gem and minor cleanup I
> want to further split up as a demonstration.
>
> v2: We need to clear drm_device->dev otherwise the debug drm printing
> after our cleanup hook (e.g. i
== Series Details ==
Series: drm/i915/perf: add OA interrupt support (rev8)
URL : https://patchwork.freedesktop.org/series/54280/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8183_full -> Patchwork_17072_full
Summary
-
Measure and compare the energy consumed, as reported by the rapl MSR,
by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not
at least halve the energy consumption of RC0, as this more than likely
means we failed to enter RC0 correctly.
If we can't measure the energy draw with the M
Quoting Chris Wilson (2020-03-24 20:44:55)
> + dt = ktime_get();
> + rc0_power = energy_uJ(rc6);
> res[0] = rc6_residency(rc6);
> msleep(250);
> res[1] = rc6_residency(rc6);
> + rc0_power = div64_u64(energy_uJ(rc6) - rc0_power,
> +
== Series Details ==
Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD
sequences
URL : https://patchwork.freedesktop.org/series/75034/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17073
=
Measure and compare the energy consumed, as reported by the rapl MSR,
by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not
at least halve the energy consumption of RC0, as this more than likely
means we failed to enter RC0 correctly.
If we can't measure the energy draw with the M
On Tue, 2020-03-24 at 20:28 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement
> TCCOLD sequences
> URL : https://patchwork.freedesktop.org/series/75034/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> 1
The cleanup here is somewhat tricky, since we can't tell apart the
allocated minor index from 0. So register a cleanup action first, and
if the index allocation fails, unregister that cleanup action again to
avoid bad mistakes.
The kdev for the minor already handles NULL, so no problem there.
Hen
== Series Details ==
Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD
sequences
URL : https://patchwork.freedesktop.org/series/75034/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
125d3dc52b2a drm/i915/tc/tgl: Implement TCCOLD sequences
ca5b103fb97c drm/
Measure and compare the energy consumed, as reported by the rapl MSR,
by the GPU while in RC0 and RC6 states. Throw an error if RC6 does not
at least halve the energy consumption of RC0, as this more than likely
means we failed to enter RC0 correctly.
If we can't measure the energy draw with the M
To implement ICL TC static sequences is required to get the port aux
powerwell without wait for hardware ack.
Cc: Imre Deak
Cc: Cooper Chiou
Cc: Kai-Heng Feng
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_power.c| 71 +++
.../drm/i915/display/
This is required for legacy/static TC ports as IOM is not aware of
the connection and will not trigger the TC cold exit.
Just request PCODE to exit TCCOLD is not enough as it could enter
again be driver makes use of the port, to prevent it BSpec states that
aux powerwell should be held.
So before
As now the cost to lock and use a TC port is higher due the
implementation of the TCCOLD sequences it is worty to hold a reference
of the TC port to avoid all this locking at every aux transaction
part of the DisplayPort detection.
Cc: Imre Deak
Cc: Cooper Chiou
Cc: Kai-Heng Feng
Signed-off-by:
This is a similar function to intel_aux_power_domain() but it do not
care about TBT ports, this will be needed by GEN11 TC sequences.
Cc: Imre Deak
Cc: Cooper Chiou
Cc: Kai-Heng Feng
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 14 --
dri
This function is meant to be used after
intel_display_power_get_without_ack() this way we can be sure that the
HW tied to the powerdomain will be powered and ready.
Cc: Imre Deak
Cc: Cooper Chiou
Cc: Kai-Heng Feng
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_pow
TC ports can enter in TCCOLD to save power and is required to request
to PCODE to exit this state before use or read to TC registers.
For TGL there is a new MBOX command to do that with a parameter to ask
PCODE to exit and block TCCOLD entry or unblock TCCOLD entry.
For GEN11 the sequence is more
On Tue, 2020-03-24 at 12:16 -0700, Francisco Jerez wrote:
> Francisco Jerez writes:
>
> > "Pandruvada, Srinivas" writes:
> >
> > > Hi Francisco,
> > >
> > > On Tue, 2020-03-10 at 14:41 -0700, Francisco Jerez wrote:
> > > > This is my second take on improving the energy efficiency of
> > > > th
== Series Details ==
Series: drm/i915/perf: add OA interrupt support (rev8)
URL : https://patchwork.freedesktop.org/series/54280/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17072
Summary
---
**SU
Hi Chris,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.6-rc7 next-20200324]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we
== Series Details ==
Series: drm/i915/perf: add OA interrupt support (rev8)
URL : https://patchwork.freedesktop.org/series/54280/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/perf: rework aging tail workaround
Okay!
Commit: drm/i915/perf: m
Francisco Jerez writes:
> "Pandruvada, Srinivas" writes:
>
>> Hi Francisco,
>>
>> On Tue, 2020-03-10 at 14:41 -0700, Francisco Jerez wrote:
>>> This is my second take on improving the energy efficiency of the
>>> intel_pstate driver under IO-bound conditions. The problem and
>>> approach to sol
From: Lionel Landwerlin
We're about to introduce an options to open the perf stream, giving
the user ability to configure how often it wants the kernel to poll
the OA registers for available data.
Right now the workaround against the OA tail pointer race condition
requires at least twice the int
Hi all,
This is a revival of an earlier patch series submitted by Lionel
Landwerlin - https://patchwork.freedesktop.org/series/54280/
The patches enable interrupt support for the perf OA unit in
i915, further details can be found in the orignal series linked
above.
v2: (Umesh)
- This series will
From: Lionel Landwerlin
This new parameter let's the application choose how often the OA
buffer should be checked on the CPU side for data availability. Longer
polling period tend to reduce CPU overhead if the application does not
care about somewhat real time data collection.
v2: Allow disablin
From: Lionel Landwerlin
This isn't really gen specific stuff, so just move it to the common
code.
v2: Rebase (Umesh)
v3: Remove comment, pollin is a per stream state already (Ashutosh)
Signed-off-by: Lionel Landwerlin
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Ashutosh Dixit
---
driv
== Series Details ==
Series: drm/i915: use forced codec wake on all gen9+ platforms
URL : https://patchwork.freedesktop.org/series/75024/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8183_full -> Patchwork_17070_full
Summa
Hey folks,
On Fri, 20 Mar 2020, Shankar, Uma wrote:
> Souza, Jose wrote:
> > On Wed, 2020-03-18 at 17:00 +0530, Uma Shankar wrote:
> > > This patch fixes the same by triggering a modeset at boot.
> >
> > We had the same issue for PSR, take a look to the fix:
> > commit 33e059a2e4df454359f642f223
== Series Details ==
Series: series starting with [01/21] Revert "drm/i915/gem: Drop relocation
slowpath"
URL : https://patchwork.freedesktop.org/series/75026/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17071
==
== Series Details ==
Series: drm/i915/gt: Select the deepest available parking mode for rc6 (rev2)
URL : https://patchwork.freedesktop.org/series/75009/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8182_full -> Patchwork_17069_full
== Series Details ==
Series: series starting with [01/21] Revert "drm/i915/gem: Drop relocation
slowpath"
URL : https://patchwork.freedesktop.org/series/75026/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f298bf3f0b01 Revert "drm/i915/gem: Drop relocation slowpath"
-:78: WARN
== Series Details ==
Series: drm/i915: use forced codec wake on all gen9+ platforms
URL : https://patchwork.freedesktop.org/series/75024/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8183 -> Patchwork_17070
Summary
---
On Tue, Mar 24, 2020 at 1:49 AM Masahiro Yamada wrote:
>
> If it is OK to queue this up to Kbuild tree,
> I will send a pull request to Linus.
Looks fine to me, assuming we didn't now get some confusion due to
duplicate patches (I think Jason got his tree added to -next already).
And yeah, that
As a preparation step for full object locking and wait/wound handling
during pin and object mapping, ensure that we always pass the ww context
in i915_gem_execbuffer.c to i915_vma_pin, use lockdep to ensure this
happens.
This also requires changing the order of eb_parse slightly, to ensure
we pass
This reverts commit 7dc8f1143778 ("drm/i915/gem: Drop relocation
slowpath"). We need the slowpath relocation for taking ww-mutex
inside the page fault handler, and we will take this mutex when
pinning all objects.
Cc: Chris Wilson
Cc: Matthew Auld
Signed-off-by: Maarten Lankhorst
---
.../gpu/d
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +-
drivers/gpu/drm/i915/i915_vma.c | 9 -
drivers/gpu/drm/i915/i915_vma.h | 1 +
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rend
Some i915 selftests still use i915_vma_lock() as inner lock, and
intel_context_create_request() intel_timeline->mutex as outer lock.
Fortunately for selftests this is not an issue, they should be fixed
but we can move ahead and cleanify lockdep now.
Signed-off-by: Maarten Lankhorst
---
drivers/g
This function does not use intel_context_create_request, so it has
to use the same locking order as normal code. This is required to
shut up lockdep in selftests.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 15 ---
1 file changed, 12 insertions(+), 3
i915_gem_ww_ctx is used to lock all gem bo's for pinning and memory
eviction. We don't use it yet, but lets start adding the definition
first.
To use it, we have to pass a non-NULL ww to gem_object_lock, and don't
unlock directly. It is done in i915_gem_ww_ctx_fini.
Changes since v1:
- Change ww_
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 57 --
1 file changed, 41 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index e9d3b587f562..1833f58fa615 10
Instead of doing everything inside of pin_mutex, we move all pinning
outside. Because i915_active has its own reference counting and
pinning is also having the same issues vs mutexes, we make sure
everything is pinned first, so the pinning in i915_active only needs
to bump refcounts. This allows us
We have the ordering of timeline->mutex vs resv_lock wrong,
convert the i915_pin_vma and intel_context_pin as well to
future-proof this.
We may need to do future changes to do this more transaction-like,
and only get down to a single i915_gem_ww_ctx, but for now this
should work.
Signed-off-by: M
We want to lock all gem objects, including the engine context objects,
rework the throttling to ensure that we can do this. Now we only throttle
once, but can take eb_pin_engine while acquiring objects. This means we
will have to drop the lock to wait. If we don't have to throttle we can
still take
We want to get rid of intel_context_pin(), convert
intel_context_create_request() first. :)
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gt/intel_context.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context
This is the last part outside of selftests that still don't use the
correct lock ordering of timeline->mutex vs resv_lock.
With gem fixed, there are a few places that still get locking wrong:
- gvt/scheduler.c
- i915_perf.c
- Most if not all selftests.
Changes since v1:
- Add intel_engine_pm_get/
We want to start using ww locking in intel_context_pin, for this
we need to lock multiple objects, and the single i915_gem_object_lock
is not enough.
Convert to using ww-waiting, and make sure we always pin intel_context_state,
even if we don't have a renderstate object.
Signed-off-by: Maarten La
Instead of using intel_context_create_request(), use intel_context_pin()
and i915_create_request directly.
Now all those calls are gone outside of selftests. :)
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 ++---
1 file changed, 29 insert
Signed-off-by: Maarten Lankhorst
---
.../i915/gem/selftests/i915_gem_coherency.c | 26 ++-
drivers/gpu/drm/i915/selftests/i915_request.c | 18 -
2 files changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
Execbuffer submission will perform its own WW locking, and we
cannot rely on the implicit lock there.
This also makes it clear that the GVT code will get a lockdep splat when
multiple batchbuffer shadows need to be performed in the same instance,
fix that up.
Signed-off-by: Maarten Lankhorst
---
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 51 +++-
1 file changed, 33 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index b39c24dae64e..e35e8d0b6938 100644
We want to introduce backoff logic, but we need to lock the
pool object as well for command parsing. Because of this, we
will need backoff logic for the engine pool obj, move the batch
validation up slightly to eb_lookup_vmas, and the actual command
parsing in a separate function which can get call
Now that we changed execbuf submission slightly to allow us to do all
pinning in one place, we can now simply add ww versions on top of
struct_mutex. All we have to do is a separate path for -EDEADLK
handling, which needs to unpin all gem bo's before dropping the lock,
then starting over.
This fin
This is required if we want to pass a ww context in intel_context_pin
and gen6_ppgtt_pin().
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 55 ++-
.../drm/i915/gem/selftests/i915_gem_context.c | 22 +++-
2 files changed, 48 insertions(+),
Those arguments are already set as eb.file and eb.args, so kill off
the extra arguments. This will allow us to move eb_pin_engine() to
after we reserved all BO's.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 17 +++--
1 file changed, 7 inserti
On Tue, Mar 24, 2020 at 03:32:09PM +, Laxminarayan Bharadiya, Pankaj wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: 23 March 2020 20:18
> > To: Laxminarayan Bharadiya, Pankaj
> >
> > Cc: Lattannavar, Sameer ;
> > jani.nik...@linux.intel.com; dan...@ffwll.ch;
>
On Tue, Mar 24, 2020 at 02:36:10PM +, Laxminarayan Bharadiya, Pankaj wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: 23 March 2020 20:09
> > To: Laxminarayan Bharadiya, Pankaj
> >
> > Cc: Lattannavar, Sameer ;
> > jani.nik...@linux.intel.com; dan...@ffwll.ch;
>
Quoting Tvrtko Ursulin (2020-03-24 16:11:10)
>
> On 24/03/2020 12:07, Chris Wilson wrote:
> > We dropped calling process_csb prior to handling direct submission in
> > order to avoid the nesting of spinlocks and lift process_csb() and the
> > majority of the tasklet out of irq-off. However, we do
Quoting Tvrtko Ursulin (2020-03-24 16:04:47)
>
> On 24/03/2020 12:07, Chris Wilson wrote:
> > We dropped calling process_csb prior to handling direct submission in
> > order to avoid the nesting of spinlocks and lift process_csb() and the
> > majority of the tasklet out of irq-off. However, we do
Quoting Tvrtko Ursulin (2020-03-24 16:13:04)
>
> On 23/03/2020 10:46, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-03-23 10:37:22)
> >>
> >> On 23/03/2020 09:28, Chris Wilson wrote:
> >>> If the caller allows and we do not have to wait for any signals,
> >>> immediately execute the work wi
On 23/03/2020 10:46, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-03-23 10:37:22)
On 23/03/2020 09:28, Chris Wilson wrote:
If the caller allows and we do not have to wait for any signals,
immediately execute the work within the caller's process. By doing so we
avoid the overhead of sched
On 24/03/2020 12:07, Chris Wilson wrote:
We dropped calling process_csb prior to handling direct submission in
order to avoid the nesting of spinlocks and lift process_csb() and the
majority of the tasklet out of irq-off. However, we do want to avoid
ksoftirqd latency in the fast path, so try a
On 24/03/2020 12:07, Chris Wilson wrote:
We dropped calling process_csb prior to handling direct submission in
order to avoid the nesting of spinlocks and lift process_csb() and the
majority of the tasklet out of irq-off. However, we do want to avoid
ksoftirqd latency in the fast path, so try a
On Tue, 24 Mar 2020, Anshuman Gupta wrote:
> Add connector debugfs attributes for each intel
> connector which is getting register.
Okay, so this is a good idea, and for that,
Reviewed-by: Jani Nikula
> v2:
> - adding connector debugfs for each connector in
> intel_connector_register() to fi
Hi Chris,
On Tue, Mar 24, 2020 at 12:52:33PM +, Chris Wilson wrote:
> The legacy ringbuffer submission lacks a fast soft-rc6
> mechanism as we have no interrupt for an idle ring. As such
> we are at the mercy of HW RC6... which is not quite as
> precise as we need to pass this test. Oh well.
>
On Tue, 24 Mar 2020, Anshuman Gupta wrote:
> New i915_pm_lpsp igt solution approach relies on connector specific
> debugfs attribute i915_lpsp_info, it exposes whether an output is
> capable of driving lpsp and exposes lpsp enablement info.
>
> v2:
> - CI fixup.
>
> Signed-off-by: Anshuman Gupta
Hi Ville and others,
On Fri, 13 Mar 2020, Kai Vehmanen wrote:
> I do know that on more recent hardware (gen12), I will get failures if I
> don't strictly follow the requirement. GLK is a special case as it has the
> 79Mhz low cdclk. I've not been able to trigger the problem on other old
> hard
> -Original Message-
> From: Ville Syrjälä
> Sent: 23 March 2020 20:18
> To: Laxminarayan Bharadiya, Pankaj
>
> Cc: Lattannavar, Sameer ;
> jani.nik...@linux.intel.com; dan...@ffwll.ch; intel-gfx@lists.freedesktop.org;
> dri-de...@lists.freedesktop.org; dani...@collabora.com; Joonas La
Commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup override
enabled/disable callback"), added logic to toggle Codec Wake on gen9.
This is used by audio driver when it resets the HDA controller.
It seems explicit toggling of the wakeline can help to fix problems
with probe failing on some gen12
On Thu, 12 Mar 2020, Vandita Kulkarni wrote:
> In case of dual link, we get the TE on slave.
> So clear the TE on slave DSI IIR.
>
> v2: Pass only relevant masked bits to the handler (Jani)
>
> v3: Fix the check for cmd mode in TE handler function.
>
> Signed-off-by: Vandita Kulkarni
> ---
> dri
== Series Details ==
Series: drm/i915/gt: Select the deepest available parking mode for rc6 (rev2)
URL : https://patchwork.freedesktop.org/series/75009/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8182 -> Patchwork_17069
On Thu, 12 Mar 2020, Vandita Kulkarni wrote:
> On dsi cmd mode we do not receive vblanks instead
> we would get TE and these flags indicate TE is expected on
> which port.
>
> Signed-off-by: Vandita Kulkarni
> Reviewed-by: Jani Nikula
Pushed up to and including this patch.
BR,
Jani.
> ---
>
Hi again, Chris,
> > @@ -622,7 +623,14 @@ void intel_rc6_park(struct intel_rc6 *rc6)
> >
> > /* Turn off the HW timers and go directly to rc6 */
> > set(uncore, GEN6_RC_CONTROL, GEN6_RC_CTL_RC6_ENABLE);
> > - set(uncore, GEN6_RC_STATE, 0x4 << RC_SW_TARGET_STATE_SHIFT);
> > +
> > + if
== Series Details ==
Series: i915 lpsp support for lpsp igt (rev4)
URL : https://patchwork.freedesktop.org/series/74648/
State : failure
== Summary ==
Patch is empty.
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To
Hi Chris,
> struct intel_uncore *uncore = rc6_to_uncore(rc6);
> + unsigned int target;
>
> if (!rc6->enabled)
> return;
> @@ -622,7 +623,14 @@ void intel_rc6_park(struct intel_rc6 *rc6)
>
> /* Turn off the HW timers and go directly to rc6 */
> set(unco
> -Original Message-
> From: Ville Syrjälä
> Sent: 23 March 2020 20:09
> To: Laxminarayan Bharadiya, Pankaj
>
> Cc: Lattannavar, Sameer ;
> jani.nik...@linux.intel.com; dan...@ffwll.ch; intel-gfx@lists.freedesktop.org;
> dri-de...@lists.freedesktop.org; dani...@collabora.com; Joonas La
== Series Details ==
Series: drm_device managed resources (rev6)
URL : https://patchwork.freedesktop.org/series/73633/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8182 -> Patchwork_17067
Summary
---
**FAILURE**
> -Original Message-
> From: Ville Syrjälä
> Sent: 23 March 2020 19:52
> To: Laxminarayan Bharadiya, Pankaj
>
> Cc: Lattannavar, Sameer ;
> jani.nik...@linux.intel.com; dan...@ffwll.ch; intel-gfx@lists.freedesktop.org;
> dri-de...@lists.freedesktop.org; dani...@collabora.com; Maarten La
== Series Details ==
Series: drm_device managed resources (rev6)
URL : https://patchwork.freedesktop.org/series/73633/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: mm/sl[uo]b: export __kmalloc_track(_node)_caller
Okay!
__
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Pull tasklet
interrupt-bh local to direct submission
URL : https://patchwork.freedesktop.org/series/75008/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8182_full -> Patchwork_17065_full
=
== Series Details ==
Series: drm_device managed resources (rev6)
URL : https://patchwork.freedesktop.org/series/73633/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ac41bc6ebdf2 mm/sl[uo]b: export __kmalloc_track(_node)_caller
-:58: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-of
On Ivybridge, we can go lower than rc6 to rc6p. And this is required for
Ivybridge to hit the same minimum power consumption as rc6 on other
platforms, so make it so.
v2: Update selftest to include all rc6 residency counters
Fixes: 730eaeb52426 ("drm/i915/gt: Manual rc6 entry upon parking")
Testc
New i915_pm_lpsp igt solution approach relies on connector specific
debugfs attribute i915_lpsp_info, it exposes whether an output is
capable of driving lpsp and exposes lpsp enablement info.
v2:
- CI fixup.
Signed-off-by: Anshuman Gupta
---
.../drm/i915/display/intel_display_debugfs.c | 104 +
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