On 2020-02-07 at 00:00:13 +0530, Anshuman Gupta wrote:
> On 2020-02-06 at 23:06:57 +0530, Ramalingam C wrote:
> > On 2020-02-06 at 22:39:28 +0530, Anshuman Gupta wrote:
> > > On 2020-02-06 at 22:30:27 +0530, Ramalingam C wrote:
> > > > On 2020-02-06 at 20:34:41 +0530, Anshuman Gupta wrote:
> > > >
== Series Details ==
Series: drm/i915/psr: pass i915 to psr_global_enabled()
URL : https://patchwork.freedesktop.org/series/72968/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7867_full -> Patchwork_16416_full
Summary
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Explicitly cleanup
initial_plane_config
URL : https://patchwork.freedesktop.org/series/72961/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7867_full -> Patchwork_16412_full
== Series Details ==
Series: series starting with [1/2] drm/i915/ehl: Update port clock voltage
level requirements
URL : https://patchwork.freedesktop.org/series/73123/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7881 -> Patchwork_16474
=
== Series Details ==
Series: RFC: pipe writeback design for i915
URL : https://patchwork.freedesktop.org/series/72958/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7866_full -> Patchwork_16409_full
Summary
---
**SUC
On Thu, 2020-02-06 at 15:46 +0200, Ville Syrjälä wrote:
> On Wed, Feb 05, 2020 at 06:08:49PM -0800, José Roberto de Souza
> wrote:
> > dGFX have local memory so it do not have aperture and do not
> > support
> > CPU fences but even for iGFX it have a small number of fences.
> >
> > As replacement
On Thu, 2020-02-06 at 16:14 -0800, Matt Roper wrote:
> A recent bspec update added an extra voltage level that we didn't
> have
> on ICL and new criteria for selecting the level.
Reviewed-by: José Roberto de Souza
>
> Bspec: 49208
> Cc: José Roberto de Souza
> Cc: Anusha Srivatsa
> Signed-off
On Thu, 2020-02-06 at 16:14 -0800, Matt Roper wrote:
> Voltage level depends not only on the cdclk, but also on the DDI
> clock.
> Last time the bspec voltage level table for EHL was updated, we only
> updated the cdclk requirements, but forgot to account for the new
> port
> clock criteria.
>
Re
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/gt: Tweak gen7 xcs flushing
URL : https://patchwork.freedesktop.org/series/73121/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7880 -> Patchwork_16473
Sum
A recent bspec update added an extra voltage level that we didn't have
on ICL and new criteria for selecting the level.
Bspec: 49208
Cc: José Roberto de Souza
Cc: Anusha Srivatsa
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 19 ++-
drivers/gpu/drm/
Voltage level depends not only on the cdclk, but also on the DDI clock.
Last time the bspec voltage level table for EHL was updated, we only
updated the cdclk requirements, but forgot to account for the new port
clock criteria.
Bspec: 21809
Fixes: d147483884ed ("drm/i915/ehl: Update voltage level
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: drop
igt_ppgtt_exhaust_huge
URL : https://patchwork.freedesktop.org/series/73118/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7880 -> Patchwork_16472
== Series Details ==
Series: drm: Add support for DP 1.4 Compliance edid corruption test (rev5)
URL : https://patchwork.freedesktop.org/series/70530/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7880 -> Patchwork_16471
Sum
== Series Details ==
Series: series starting with [1/4] drm/i915/gt: Prevent queuing retire workers
on the virtual engine
URL : https://patchwork.freedesktop.org/series/73116/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7880 -> Patchwork_16470
==
== Series Details ==
Series: drm/i915/ehl: Check VBT before updating the transcoder for pipe
URL : https://patchwork.freedesktop.org/series/72949/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7865_full -> Patchwork_16407_full
==
== Series Details ==
Series: series starting with [1/4] drm/i915/gt: Prevent queuing retire workers
on the virtual engine
URL : https://patchwork.freedesktop.org/series/73116/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
26ef32e64fba drm/i915/gt: Prevent queuing retire worker
Trust that the HW does the right thing after simply updating the
PD_DIR_BASE?
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submis
Don't immediately write the seqno into the breadcrumb slot, but wait
until we've attempted to flush the writes; that is we need to ensure the
memory is coherent prior to updating the breadcrumb so that any
observers who see the new seqno can proceed.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i
We want to be sure that the memory is coherent prior to writing to the
breadcrumb. This should be guaranteed by the post-sync operation, but
for that little bit of extra paranoia, split the flush into two and have
the breadcrumb write separate and explicitly wait on the prior
pipecontrol completion
On Thu, 2020-02-06 at 19:28 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value
> when clearing DDI select
> URL : https://patchwork.freedesktop.org/series/72943/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes fr
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix g4x+ sprite dotclock limit for
upscaling
URL : https://patchwork.freedesktop.org/series/73115/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7878 -> Patchwork_16469
=
== Series Details ==
Series: Commit early to GuC (rev2)
URL : https://patchwork.freedesktop.org/series/72031/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7864_full -> Patchwork_16406_full
Summary
---
**SUCCESS**
From: Andi Shyti
live_rc6_busy keeps the gpu busy and then goes in idle;
checks that we don't fall in rc6 when busy and that we do fall
in rc6 when idling.
The test is added as subtest of the bigger live_late_gt_pm
selftest.
The basic rc6 functionality is tested by checking the reference
counte
From: Matthew Auld
We already have tests that exhaustively exercise the most interesting
page-size combinations, along with tests that offer randomisation, and
so we should already be testing objects(local, system) with a varying
mix of page-sizes, which leaves igt_ppgtt_exhaust_huge providing no
Unlike DP 1.2 edid corruption test, DP 1.4 requires to calculate
real CRC value of the last edid data block, and write it back.
Current edid CRC calculates routine adds the last CRC byte,
and check if non-zero.
This behavior is not accurate; actually, we need to return
the actual CRC value when co
On 2020-02-05 10:22 a.m., Jerry (Fangzhi) Zuo wrote:
> Unlike DP 1.2 edid corruption test, DP 1.4 requires to calculate
> real CRC value of the last edid data block, and write it back.
> Current edid CRC calculates routine adds the last CRC byte,
> and check if non-zero.
>
> This behavior is no
If we have a set of active engines marked as being non-persistent, we
lose track of those if the user replaces those engines with
I915_CONTEXT_PARAM_ENGINES. As part of our uABI contract is that
non-persistent requests are terminated if they are no longer being
tracked by the user's context (in ord
As we may add new waiters to a request as it is being run, we need to
mark the list iteration as being safe for concurrent addition.
Fixes: 32ff621fd744 ("drm/i915/gt: Allow temporary suspension of inflight
requests")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/i
Mika spotted
<4>[17436.705441] general protection fault: [#1] PREEMPT SMP PTI
<4>[17436.705447] CPU: 2 PID: 0 Comm: swapper/2 Not tainted 5.5.0+ #1
<4>[17436.705449] Hardware name: System manufacturer System Product
Name/Z170M-PLUS, BIOS 3805 05/16/2018
<4>[17436.705512] RIP: 0010:__execlist
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not used.
Tvrtko tracked down an instance where we did indeed violate this rule.
In virtual_su
== Series Details ==
Series: series starting with [1/2] drm/i915/display/fbc: Make fences a
nice-to-have for GEN9+ (rev3)
URL : https://patchwork.freedesktop.org/series/72698/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7864_full -> Patchwork_16405_full
From: Ville Syrjälä
g4x+ sprites have an extra cdclk limitation listed for RGB formats.
For some random reason I chose to use cpp>=4 as the check for that.
While that does actually work let's deobfuscate it by checking
for !is_yuv instead. I suspect is_yuv didn't exist way back when
I originally
From: Ville Syrjälä
Even if we're not doing downscaling we should account for
some of the extra dotclock limitations for g4x+ sprites. In
particular we must never exceed the 90% rule, and with RGB
that limits actually drops to 80%.
So instead of bailing out when upscaling let's clamp the
scaling
== Series Details ==
Series: disable drm_global_mutex for most drivers (rev7)
URL : https://patchwork.freedesktop.org/series/72711/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a4ef0544be0f drm: Complain if drivers still use the ->load callback
-:48: WARNING:NO_AUTHOR_SIGN_OFF
== Series Details ==
Series: drm/i915/gt: Protect defer_request() from new waiters (rev2)
URL : https://patchwork.freedesktop.org/series/73109/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7877 -> Patchwork_16467
Summary
-
== Series Details ==
Series: drm/i915/gt: Protect defer_request() from new waiters (rev2)
URL : https://patchwork.freedesktop.org/series/73109/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a8aaf594d522 drm/i915/gt: Protect defer_request() from new waiters
-:10: WARNING:COMMIT_
== Series Details ==
Series: drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value when
clearing DDI select
URL : https://patchwork.freedesktop.org/series/72943/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7864_full -> Patchwork_16403_full
===
Quoting Mika Kuoppala (2020-02-06 16:35:12)
> Chris Wilson writes:
>
> > Don't immediately write the seqno into the breadcrumb slot, but wait
> > until we've attempted to flush the writes; that is we need to ensure the
> > memory is coherent prior to updating the breadcrumb so that any
> > observ
Quoting Mika Kuoppala (2020-02-06 16:32:22)
> Chris Wilson writes:
>
> > Trust that the HW does the right thing after simply updating the
> > PD_DIR_BASE?
>
> Bspec offers an invalidate before writing the base.
>
> So, lets assume the DCLV write is superfluous as it will be
> the same.
>
> The
On Tue, 04 Feb 2020 00:28:37 +0100, Daniele Ceraolo Spurio
wrote:
We are quite trigger happy in cleaning up the firmware blobs, as we do
so from several error/fini paths in GuC/HuC/uC code. We do have the
__uc_cleanup_firmwares cleanup function, which unwinds
__uc_fetch_firmwares and is alrea
== Series Details ==
Series: disable drm_global_mutex for most drivers (rev6)
URL : https://patchwork.freedesktop.org/series/72711/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
679ecfb063f6 drm: Complain if drivers still use the ->load callback
-:48: WARNING:NO_AUTHOR_SIGN_OFF
Quoting Patchwork (2020-02-06 18:33:34)
> == Series Details ==
>
> Series: drm/i915/gt: Apply Enable Boot Fetch to MBC control register (rev2)
> URL : https://patchwork.freedesktop.org/series/73107/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7876 -> Patchwork_1646
== Series Details ==
Series: drm/i915/gvt: more locking for ppgtt mm LRU list
URL : https://patchwork.freedesktop.org/series/72927/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7864_full -> Patchwork_16398_full
Summary
---
On 2020-02-06 at 23:06:57 +0530, Ramalingam C wrote:
> On 2020-02-06 at 22:39:28 +0530, Anshuman Gupta wrote:
> > On 2020-02-06 at 22:30:27 +0530, Ramalingam C wrote:
> > > On 2020-02-06 at 20:34:41 +0530, Anshuman Gupta wrote:
> > > > HDCP Repeater initializes seq_num_V to 0 at the beginning of
>
On 06.02.2020 21:30, Stephen Smalley wrote:
> On 2/6/20 1:26 PM, Alexey Budankov wrote:
>>
>> On 06.02.2020 21:23, Stephen Smalley wrote:
>>> On 2/5/20 12:30 PM, Alexey Budankov wrote:
Introduce CAP_PERFMON capability designed to secure system performance
monitoring and observabili
== Series Details ==
Series: drm/i915/gt: Apply Enable Boot Fetch to MBC control register (rev2)
URL : https://patchwork.freedesktop.org/series/73107/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16465
Su
On 2/6/20 1:26 PM, Alexey Budankov wrote:
On 06.02.2020 21:23, Stephen Smalley wrote:
On 2/5/20 12:30 PM, Alexey Budankov wrote:
Introduce CAP_PERFMON capability designed to secure system performance
monitoring and observability operations so that CAP_PERFMON would assist
CAP_SYS_ADMIN capabi
On 06.02.2020 21:23, Stephen Smalley wrote:
> On 2/5/20 12:30 PM, Alexey Budankov wrote:
>>
>> Introduce CAP_PERFMON capability designed to secure system performance
>> monitoring and observability operations so that CAP_PERFMON would assist
>> CAP_SYS_ADMIN capability in its governing role for pe
On 2/5/20 12:30 PM, Alexey Budankov wrote:
Introduce CAP_PERFMON capability designed to secure system performance
monitoring and observability operations so that CAP_PERFMON would assist
CAP_SYS_ADMIN capability in its governing role for performance monitoring
and observability subsystems.
CAP_
Mika spotted
<4>[17436.705441] general protection fault: [#1] PREEMPT SMP PTI
<4>[17436.705447] CPU: 2 PID: 0 Comm: swapper/2 Not tainted 5.5.0+ #1
<4>[17436.705449] Hardware name: System manufacturer System Product
Name/Z170M-PLUS, BIOS 3805 05/16/2018
<4>[17436.705512] RIP: 0010:__execlist
Mika spotted
<4>[17436.705441] general protection fault: [#1] PREEMPT SMP PTI
<4>[17436.705447] CPU: 2 PID: 0 Comm: swapper/2 Not tainted 5.5.0+ #1
<4>[17436.705449] Hardware name: System manufacturer System Product
Name/Z170M-PLUS, BIOS 3805 05/16/2018
<4>[17436.705512] RIP: 0010:__execlist
On Sun, Feb 02, 2020 at 05:37:31PM +, Chris Wilson wrote:
> Quoting Daniel Vetter (2020-02-02 13:21:33)
> > There's two references floating around here (for the object reference,
> > not the handle_count reference, that's a different thing):
> >
> > - The temporary reference held by vgem_gem_c
On 22.01.2020 17:25, Alexey Budankov wrote:
>
> On 22.01.2020 17:07, Stephen Smalley wrote:
>> On 1/22/20 5:45 AM, Alexey Budankov wrote:
>>>
>>> On 21.01.2020 21:27, Alexey Budankov wrote:
On 21.01.2020 20:55, Alexei Starovoitov wrote:
> On Tue, Jan 21, 2020 at 9:31 AM Alexey Budan
Mika spotted that we should be setting BIT(4) of MBCTL prior to
execution.
"The driver must set this bit in the following scenarios:
- To reload the HW boot context every time it gets loaded through the OS.
- After an FLR clears the register (the BIOS won’t run afterwards)."
Make it so.
Signed-o
== Series Details ==
Series: drm/i915/gt: Apply Enable Boot Fetch to MBC control register
URL : https://patchwork.freedesktop.org/series/73107/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generate
Mika spotted that we should be setting BIT(4) of MBCTL prior to
execution.
"The driver must set this bit in the following scenarios:
- To reload the HW boot context every time it gets loaded through the OS.
- After an FLR clears the register (the BIOS won’t run afterwards)."
Make it so.
Signed-o
On 2020-02-06 at 22:39:28 +0530, Anshuman Gupta wrote:
> On 2020-02-06 at 22:30:27 +0530, Ramalingam C wrote:
> > On 2020-02-06 at 20:34:41 +0530, Anshuman Gupta wrote:
> > > HDCP Repeater initializes seq_num_V to 0 at the beginning of
> > > hdcp Session i.e. after AKE_init received.
> > >
> > > H
== Series Details ==
Series: drm/i915/selftests: drop igt_ppgtt_exhaust_huge
URL : https://patchwork.freedesktop.org/series/73105/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16463
Summary
---
**S
Quoting Matthew Auld (2020-02-06 17:03:40)
> We already have tests that exhaustively exercise the most interesting
> page-size combinations, along with tests that offer randomisation, and
> so we should already be testing objects(local, system) with a varying
> mix of page-sizes, which leaves igt_p
On 2020-02-06 at 22:30:27 +0530, Ramalingam C wrote:
> On 2020-02-06 at 20:34:41 +0530, Anshuman Gupta wrote:
> > HDCP Repeater initializes seq_num_V to 0 at the beginning of
> > hdcp Session i.e. after AKE_init received.
> >
> > HDCP 2.2 Comp specs 1B-06 test verifies that whether DUT
> > conside
On 2020-02-06 at 20:34:42 +0530, Anshuman Gupta wrote:
> 1B-10 HDCP Comp test verifies that source DUT reattempts
> Content Stream Management following a failure of Content
> Stream Management, 1B-10 test fail if source DUT tries
> reauthentication following a Content Stream Management
> failure.
>
== Series Details ==
Series: drm/i915/gt: Prevent queuing retire workers on the virtual engine (rev4)
URL : https://patchwork.freedesktop.org/series/73102/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16462
===
We already have tests that exhaustively exercise the most interesting
page-size combinations, along with tests that offer randomisation, and
so we should already be testing objects(local, system) with a varying
mix of page-sizes, which leaves igt_ppgtt_exhaust_huge providing not
much in terms of ex
On 2020-02-06 at 20:34:41 +0530, Anshuman Gupta wrote:
> HDCP Repeater initializes seq_num_V to 0 at the beginning of
> hdcp Session i.e. after AKE_init received.
>
> HDCP 2.2 Comp specs 1B-06 test verifies that whether DUT
> considers failures of authentication if the repeater provides a
> non-ze
Quoting Tvrtko Ursulin (2020-02-06 16:44:34)
>
> On 06/02/2020 16:32, Chris Wilson wrote:
> > Virtual engines are fleeting. They carry a reference count and may be freed
> > when their last request is retired. This makes them unsuitable for the
> > task of housing engine->retire.work so assert tha
On 06/02/2020 16:32, Chris Wilson wrote:
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not used.
Tvrtko tracked down an instance where w
== Series Details ==
Series: HDCP 2.2 Comp fixes
URL : https://patchwork.freedesktop.org/series/73101/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16461
Summary
---
**SUCCESS**
No regressions f
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not used.
Tvrtko tracked down an instance where we did indeed violate this rule.
In virtual_su
Quoting Chris Wilson (2020-02-06 16:32:43)
> Virtual engines are fleeting. They carry a reference count and may be freed
> when their last request is retired. This makes them unsuitable for the
> task of housing engine->retire.work so assert that it is not used.
>
> Tvrtko tracked down an instance
Chris Wilson writes:
> Don't immediately write the seqno into the breadcrumb slot, but wait
> until we've attempted to flush the writes; that is we need to ensure the
> memory is coherent prior to updating the breadcrumb so that any
> observers who see the new seqno can proceed.
>
> Signed-off-by
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not used.
Tvrtko tracked down an instance where we did indeed violate this rule.
In virtual_su
Chris Wilson writes:
> Trust that the HW does the right thing after simply updating the
> PD_DIR_BASE?
Bspec offers an invalidate before writing the base.
So, lets assume the DCLV write is superfluous as it will be
the same.
Then the sequence would be TLB_INVLIDATE followed by
PP_DIR_BASE (whi
Quoting Chris Wilson (2020-02-06 16:12:32)
> +static void __ve_request_submit(const struct virtual_engine *ve,
> + struct i915_request *rq)
> +{
> + /*
> +* Select a real engine to act as our permanent storage
> +* and signaler for the stale reque
== Series Details ==
Series: drm/i915/gt: Check for a real engine on which to retire
URL : https://patchwork.freedesktop.org/series/73100/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16460
Summary
--
Chris Wilson writes:
> Always prime the page table registers before starting the ring. Even
> though we will update these to the per-context page tables during
> dispatch, it is prudent to ensure that the registers always point to a
> valid PD.
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not used.
Tvrtko tracked down an instance where we did indeed violate this rule.
In virtual_su
On Wed, Feb 05, 2020 at 01:49:45PM -0800, José Roberto de Souza wrote:
> Add a basic description about how DC3CO works to help people not
> familiar with it.
>
> While at it, I also improved the delayed work handle and function
> names and removed a debug message that is ambiguous and not much
> u
On 06/02/2020 15:29, Chris Wilson wrote:
Quoting Chris Wilson (2020-02-06 15:23:25)
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not us
On 06/02/20 02:06, Chris Wilson wrote:
The current implementation of the test only maps the arguments in gtt,
but we have similar problems arising from any of our own custom
pagefault handlers.
Signed-off-by: Chris Wilson
Cc: Antonio Argenziano
Cc: Dixit Ashutosh
For the series:
Reviewe
== Series Details ==
Series: Add basic selftests for rc6
URL : https://patchwork.freedesktop.org/series/73095/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16459
Summary
---
**FAILURE**
Serious
Chris Wilson writes:
> Virtual engines are fleeting. They carry a reference count and may be freed
> when their last request is retired. This makes them unsuitable for the
> task of housing engine->retire.work so assert that it is not used.
>
> Tvrtko tracked down an instance where we did indeed
with redundant (?) fw cleanups clarified,
Reviewed-by: Michal Wajdeczko
The re-org of the fw_cleanups is done separately in the next patch,
since it isn't as straightforward as just dropping the call. Is that
enough for the r-b on this patch or do you want something more?
somehow I miss
Quoting Chris Wilson (2020-02-06 15:23:25)
> Virtual engines are fleeting. They carry a reference count and may be freed
> when their last request is retired. This makes them unsuitable for the
> task of housing engine->retire.work so assert that it is not used.
>
> Tvrtko tracked down an instance
== Series Details ==
Series: drm/i915/selftests: Trim blitter block size (rev4)
URL : https://patchwork.freedesktop.org/series/73066/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16458
Summary
---
From: Andi Shyti
Hi,
unfortunately rc6 is still a mysterious system and not all tests
provide the expected results.
I split the three tests in three different patches in order to
have more flexibility in picking them.
Thanks Chris and Mika for the reviews,
Andi
Changelog:
* v5 -> v6:
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not used.
Tvrtko tracked down an instance where we did indeed violate this rule.
In virtal_sub
I've started looking at this and then I noticed that other guc debugfs
files can be moved as well and possibly squashed together, so IMO it'd
be better to change them all in one go. Since such a rework doesn't
belong in this series, do you mind if I keep this patch as-is and
follow-up wit
HDCP Repeater initializes seq_num_V to 0 at the beginning of
hdcp Session i.e. after AKE_init received.
HDCP 2.2 Comp specs 1B-06 test verifies that whether DUT
considers failures of authentication if the repeater provides a
non-zero value in seq_num_V in the first,
RepeaterAuth_Send_ReceiverID_Li
1B-10 HDCP Comp test verifies that source DUT reattempts
Content Stream Management following a failure of Content
Stream Management, 1B-10 test fail if source DUT tries
reauthentication following a Content Stream Management
failure.
Fixing this broken test.
Cc: Ramalingam C
Signed-off-by: Anshuma
There are few minor fixes required to pass the HDCP 2.2
Compliance.
Anshuman Gupta (2):
drm/i915/hdcp: Fix 1B-06 HDCP2.2 Comp test
drm/i915/hdcp: Fix 1B-10 HDCP 2.2 Comp test
.../drm/i915/display/intel_display_types.h| 6 +++
drivers/gpu/drm/i915/display/intel_hdcp.c | 45 ++
Virtual engines are fleeting. They carry a reference count and may be freed
when their last request is retired. This makes them unsuitable for the
task of housing engine->retire.work so assert that it is not used.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_
== Series Details ==
Series: drm/i915/selftests: Trim blitter block size (rev4)
URL : https://patchwork.freedesktop.org/series/73066/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d8de8a6b2e7e drm/i915/selftests: Trim blitter block size
-:69: WARNING:MEMORY_BARRIER: memory barr
== Series Details ==
Series: drm/i915/debugfs: Remove i915_energy_uJ
URL : https://patchwork.freedesktop.org/series/73096/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7876 -> Patchwork_16457
Summary
---
**SUCCESS**
From: Andi Shyti
live_rc6_basic simply checks if rc6 works when it's enabled
or stops when it's disabled.
The test is added as subtest of the bigger live_late_gt_pm
selftest.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 +
drivers/gpu/drm/i915/
Hmm, intel-gfx@ has taken exception to the last couple of sends.
Odd.
-Chris
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Quoting Tvrtko Ursulin (2020-02-06 14:07:25)
> From: Tvrtko Ursulin
>
> Last IGT user (intel_gpu_overlay) stopped using it in October 2019 so we
> are good to remove the file.
Ages. I feel old.
Just mention the much better replacement:
perf -a -x, -r1 \
-e "power/energy-pkg/" \
Reduce the amount of work we do to verify client blt correctness as
currently our 0.5s subtests takes about 15s on slower devices!
v2: Grow the maximum block size until we run out of time
Signed-off-by: Chris Wilson
---
.../i915/gem/selftests/i915_gem_object_blt.c | 54 +++
1 f
From: Andi Shyti
rc6 should not work when the evaluation interval is less than the
threshold and should work otherwise.
live_rc6_threshold tests such behavior
The test is added as subtest of the bigger live_late_gt_pm
selftest.
Signed-off-by: Andi Shyti
Cc: Chris Wilson
---
drivers/gpu/drm/
From: Tvrtko Ursulin
Last IGT user (intel_gpu_overlay) stopped using it in October 2019 so we
are good to remove the file.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 24
drivers/gpu/drm/i915/i915_reg.h | 2 --
2 files changed, 26 delet
From: Andi Shyti
live_rc6_busy keeps the gpu busy and then goes in idle;
checks that we don't fall in rc6 when busy and that we do fall
in rc6 when idling.
The test is added as subtest of the bigger live_late_gt_pm
selftest.
The basic rc6 functionality is tested by checking the reference
counte
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