[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: add basic selftests for rc6 (rev7)

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/selftests: add basic selftests for rc6 (rev7) URL : https://patchwork.freedesktop.org/series/69825/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7874 -> Patchwork_16452 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN11+

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN11+ URL : https://patchwork.freedesktop.org/series/73070/ State : success == Summary == CI Bug Log - changes from CI_DRM_7874 -> Patchwork_16451 =

[Intel-gfx] [drm-tip:drm-tip 6/9] drivers/gpu/drm/i915/display/intel_display.c:17667:12: error: 'sanitize_watermarks_add_affected' defined but not used

2020-02-05 Thread kbuild test robot
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: aed2ea22e07850d8f5fae07fcf3db8adf694b3d9 commit: 9c654e423507127b37b32e15543b2e04a719eab2 [6/9] Merge remote-tracking branch 'drm-intel/drm-intel-next-queued' into drm-tip config: i386-randconfig-g002-20200206 (attached as .config)

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN11+

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN11+ URL : https://patchwork.freedesktop.org/series/73070/ State : warning == Summary == $ dim checkpatch origin/drm-tip 33582ba1b9a2 drm/i915/display/fbc: Make fences a nice-to-h

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/gt: Tweak gen7 xcs flushing

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/gt: Tweak gen7 xcs flushing URL : https://patchwork.freedesktop.org/series/73068/ State : success == Summary == CI Bug Log - changes from CI_DRM_7874 -> Patchwork_16450 Summar

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Tweak gen7 xcs flushing

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/gt: Tweak gen7 xcs flushing URL : https://patchwork.freedesktop.org/series/73067/ State : success == Summary == CI Bug Log - changes from CI_DRM_7874 -> Patchwork_16449 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/gt: Tweak gen7 xcs flushing

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/gt: Tweak gen7 xcs flushing URL : https://patchwork.freedesktop.org/series/73068/ State : warning == Summary == $ dim checkpatch origin/drm-tip be0c11af059b drm/i915/gt: Tweak gen7 xcs flushing -:51: WARNING:LONG_LINE: line over

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Trim blitter block size

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Trim blitter block size URL : https://patchwork.freedesktop.org/series/73066/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7874 -> Patchwork_16448 Summary --- **FAILU

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Trim blitter block size

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Trim blitter block size URL : https://patchwork.freedesktop.org/series/73066/ State : warning == Summary == $ dim checkpatch origin/drm-tip b4454179762f drm/i915/selftests: Trim blitter block size -:39: WARNING:MEMORY_BARRIER: memory barrier wit

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix redefinition of sanitize_watermarks_add_affected

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915: Fix redefinition of sanitize_watermarks_add_affected URL : https://patchwork.freedesktop.org/series/73065/ State : failure == Summary == Applying: drm/i915: Fix redefinition of sanitize_watermarks_add_affected Using index info to reconstruct a base tree..

[Intel-gfx] [PATCH v5] drm/i915/selftests: add basic selftests for rc6

2020-02-05 Thread Andi Shyti
From: Andi Shyti Add three basic tests for rc6 power status: 1. live_rc6_basic - simply checks if rc6 works when it's enabled or stops when it's disabled. 2. live_rc6_threshold - rc6 should not work when the evaluation interval is less than the threshold and should work otherwise. 3. liv

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: add basic selftests for rc6 (rev6)

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/selftests: add basic selftests for rc6 (rev6) URL : https://patchwork.freedesktop.org/series/69825/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16446 Summary ---

[Intel-gfx] [PATCH v2 3/3] drm/i915: Fix redefinition of sanitize_watermarks_add_affected

2020-02-05 Thread José Roberto de Souza
Commit 44a67719497b ("drm/i915: Fix modeset locks in sanitize_watermarks()") that added this function is correctly, this issue was introduced when resolving the merge conflict. Fixes: 9c654e423507 ("Merge remote-tracking branch 'drm-intel/drm-intel-next-queued' into drm-tip") Cc: Jani Nikula Cc:

[Intel-gfx] [PATCH v2 2/3] drm/i915/display: Do not write in removed FBC fence registers

2020-02-05 Thread José Roberto de Souza
From: Radhakrishna Sripada Platforms without fences don't have FBC host tracking and those registers are marked as reserved in those platforms. v2: checking num_fences to write to FBC fence registers (Ville) Cc: Rodrigo Vivi Cc: Matt Roper Cc: Dhinakaran Pandiyan Cc: Ville Syrjälä Signed-of

[Intel-gfx] [PATCH v2 1/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN11+

2020-02-05 Thread José Roberto de Souza
dGFX have local memory so it do not have aperture and do not support CPU fences but even for iGFX it have a small number of fences. As replacement for fences to track frontbuffer modifications by CPU we have a software tracking that is already in used by FBC and PSR. PSR don't support fences so it

[Intel-gfx] [PATCH 2/3] drm/i915/gt: Set the PP_DIR registers upon enabling ring submission

2020-02-05 Thread Chris Wilson
Always prime the page table registers before starting the ring. Even though we will update these to the per-context page tables during dispatch, it is prudent to ensure that the registers always point to a valid PD. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- .../gpu/drm/i915/gt/intel_rin

[Intel-gfx] [PATCH 3/3] drm/i915/gt: Stop invalidating the PD cachelines for gen7

2020-02-05 Thread Chris Wilson
Trust that the HW does the right thing after simply updating the PD_DIR_BASE? Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_ring_submission.c | 10 +- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submis

[Intel-gfx] [PATCH 1/3] drm/i915/gt: Tweak gen7 xcs flushing

2020-02-05 Thread Chris Wilson
Don't immediately write the seqno into the breadcrumb slot, but wait until we've attempted to flush the writes; that is we need to ensure the memory is coherent prior to updating the breadcrumb so that any observers who see the new seqno can proceed. Signed-off-by: Chris Wilson --- .../gpu/drm/i

Re: [Intel-gfx] [v3] drm/i915/display: Force the state compute phase once to enable PSR

2020-02-05 Thread Souza, Jose
Hi Ross I'm unable to reproduce this issue, could you share the complete dmesg? On Wed, 2020-02-05 at 16:01 -0700, Ross Zwisler wrote: > On Mon, Jan 06, 2020 at 07:21:28AM -0800, José Roberto de Souza > wrote: > > Recent improvements in the state tracking in i915 caused PSR to not > > be > > enab

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gt: Set the PP_DIR registers upon enabling ring submission

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gt: Set the PP_DIR registers upon enabling ring submission URL : https://patchwork.freedesktop.org/series/73059/ State : success == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16445

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Expose exec parameter to force non IA-Coherent for Gen9+

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915: Expose exec parameter to force non IA-Coherent for Gen9+ URL : https://patchwork.freedesktop.org/series/2428/ State : failure == Summary == CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.o CC [M] drivers/gpu/drm/amd/amdgpu/../displ

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dc3co: Add description of how it works

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/dc3co: Add description of how it works URL : https://patchwork.freedesktop.org/series/73058/ State : success == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16444 Summary --- **S

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm: Add a detailed DP HDMI branch info on debugfs

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm: Add a detailed DP HDMI branch info on debugfs URL : https://patchwork.freedesktop.org/series/72914/ State : success == Summary == CI Bug Log - changes from CI_DRM_7859_full -> Patchwork_16392_full ===

[Intel-gfx] [PATCH] drm/i915/gt: Tweak gen7 xcs flushing

2020-02-05 Thread Chris Wilson
Don't immediately write the seqno into the breadcrumb slot, but wait until we've attempted to flush the writes; that is we need to ensure the memory is coherent prior to updating the breadcrumb so that any observers who see the new seqno can proceed. Signed-off-by: Chris Wilson --- drivers/gpu/d

[Intel-gfx] [PATCH] drm/i915/selftests: Trim blitter block size

2020-02-05 Thread Chris Wilson
Reduce the amount of work we do to verify client blt correctness as currently our 0.5s subtests takes about 15s on slower devices! Signed-off-by: Chris Wilson --- .../i915/gem/selftests/i915_gem_object_blt.c | 24 --- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git

[Intel-gfx] [PATCH] drm/i915: Fix redefinition of sanitize_watermarks_add_affected

2020-02-05 Thread José Roberto de Souza
Commit 44a67719497b ("drm/i915: Fix modeset locks in sanitize_watermarks()") that added this function is correctly, this issue was introduced when resolving the merge conflict. Fixes: 9c654e423507 ("Merge remote-tracking branch 'drm-intel/drm-intel-next-queued' into drm-tip") Cc: Jani Nikula Cc:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display/ehl: Add HBR2 and HBR3 voltage swing table

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/display/ehl: Add HBR2 and HBR3 voltage swing table URL : https://patchwork.freedesktop.org/series/73055/ State : success == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16443 Summary --

Re: [Intel-gfx] [PATCH v5 i-g-t 2/2] tests/kms_getfb: Add getfb2 tests

2020-02-05 Thread Li, Juston
On Wed, 2020-01-22 at 15:16 -0800, Juston Li wrote: > From: Daniel Stone > > Mirroring addfb2, add tests for the new ioctl which will return us > information about framebuffers containing multiple buffers, as well > as > modifiers. > > Changes since v4: > - Remove unnecessary bo creation for get

Re: [Intel-gfx] [PATCH v5] drm/i915/selftests: add basic selftests for rc6

2020-02-05 Thread Chris Wilson
Quoting Andi Shyti (2020-02-05 22:49:49) > +int live_rc6_busy(void *arg) > +{ > + struct intel_gt *gt = arg; > + struct intel_rc6 *rc6 = >->rc6; > + struct intel_engine_cs *engine; > + struct igt_spinner spin; > + intel_wakeref_t wakeref; > + enum intel_engine_id

[Intel-gfx] [PATCH v4] drm/i915/selftests: add basic selftests for rc6

2020-02-05 Thread Andi Shyti
From: Andi Shyti Add three basic tests for rc6 power status: 1. live_rc6_basic - simply checks if rc6 works when it's enabled or stops when it's disabled. 2. live_rc6_threshold - rc6 should not work when the evaluation interval is less than the threshold and should work otherwise. 3. liv

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev4)

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/gem: Don't leak non-persistent requests on changing engines (rev4) URL : https://patchwork.freedesktop.org/series/73023/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16442 ===

Re: [Intel-gfx] [PATCH] drm/i915/display/ehl: Add HBR2 and HBR3 voltage swing table

2020-02-05 Thread Matt Roper
On Wed, Feb 05, 2020 at 12:56:47PM -0800, José Roberto de Souza wrote: > EHL only differs from ICL on the voltage swing table for HBR2 and > HBR3. > > BSpec: 21257 > Cc: Matt Roper > Signed-off-by: José Roberto de Souza > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 34 +

[Intel-gfx] [PATCH 1/2] drm/i915/gt: Set the PP_DIR registers upon enabling ring submission

2020-02-05 Thread Chris Wilson
Always prime the page table registers before starting the ring. Even though we will update these to the per-context page tables during dispatch, it is prudent to ensure that the registers always point to a valid PD. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- .../gpu/drm/i915/gt/intel_rin

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Stop invalidating the PD cachelines for gen7

2020-02-05 Thread Chris Wilson
Trust that the HW does the right thing after simply updating the PD_DIR_BASE? Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_ring_submission.c | 10 +- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submis

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev4)

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/gem: Don't leak non-persistent requests on changing engines (rev4) URL : https://patchwork.freedesktop.org/series/73023/ State : warning == Summary == $ dim checkpatch origin/drm-tip 66727965053c drm/i915/gem: Don't leak non-persistent requests on changin

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Hotplug cleanups (rev3)

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915: Hotplug cleanups (rev3) URL : https://patchwork.freedesktop.org/series/72348/ State : success == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16441 Summary --- **SUCCESS** No

[Intel-gfx] [PATCH] drm/i915/dc3co: Add description of how it works

2020-02-05 Thread José Roberto de Souza
Add a basic description about how DC3CO works to help people not familiar with it. While at it, I also improved the delayed work handle and function names and removed a debug message that is ambiguous and not much useful, no changes in behavior here. Cc: Anshuman Gupta Cc: Imre Deak Signed-off-

[Intel-gfx] ✓ Fi.CI.BAT: success for Introduce CAP_PERFMON to secure system performance monitoring and observability (rev3)

2020-02-05 Thread Patchwork
== Series Details == Series: Introduce CAP_PERFMON to secure system performance monitoring and observability (rev3) URL : https://patchwork.freedesktop.org/series/72273/ State : success == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16439

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm: Introduce struct drm_device based WARN* and use them in i915 (rev6)

2020-02-05 Thread Patchwork
== Series Details == Series: drm: Introduce struct drm_device based WARN* and use them in i915 (rev6) URL : https://patchwork.freedesktop.org/series/72035/ State : failure == Summary == Applying: drm/i915/display/cdclk: Make WARN* drm specific where drm_priv ptr is available Applying: drm/i91

Re: [Intel-gfx] [PATCH] drm/i915/selftests: add basic selftests for rc6

2020-02-05 Thread Chris Wilson
Quoting Andi Shyti (2020-02-05 18:40:55) > Hi Mika, > > > I have a faint memory that the interval was not always 1.28us > > but gen dependant. > > 1.28 is the incremental step and I haven't seen any different > value in the docs. Have you? The rc6 residency counter does flip over to a different c

Re: [Intel-gfx] [PATCH] drm/i915/selftests: add basic selftests for rc6

2020-02-05 Thread Andi Shyti
Hi Mika, > > +static bool test_rc6(struct intel_rc6 *rc6, bool enabled) > > +{ > > + struct intel_uncore *uncore = rc6_to_uncore(rc6); > > + intel_wakeref_t wakeref; > > + u32 ec1, ec2; > > + u32 interval; > > + > > + wakeref = intel_runtime_pm_get(uncore->rpm); > > + > > + interval =

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce CAP_PERFMON to secure system performance monitoring and observability (rev3)

2020-02-05 Thread Patchwork
== Series Details == Series: Introduce CAP_PERFMON to secure system performance monitoring and observability (rev3) URL : https://patchwork.freedesktop.org/series/72273/ State : warning == Summary == $ dim checkpatch origin/drm-tip afa7aa8e74c6 capabilities: introduce CAP_PERFMON to kernel an

[Intel-gfx] [PATCH] drm/i915/display/ehl: Add HBR2 and HBR3 voltage swing table

2020-02-05 Thread José Roberto de Souza
EHL only differs from ICL on the voltage swing table for HBR2 and HBR3. BSpec: 21257 Cc: Matt Roper Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_ddi.c | 34 +++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] ✗ Fi.CI.BAT: failure for In order to readout DP SDPs, refactors the handling of DP SDPs (rev4)

2020-02-05 Thread Patchwork
== Series Details == Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev4) URL : https://patchwork.freedesktop.org/series/72853/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16438

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsb: Pre allocate and late cleanup of cmd buffer

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/dsb: Pre allocate and late cleanup of cmd buffer URL : https://patchwork.freedesktop.org/series/73036/ State : success == Summary == CI Bug Log - changes from CI_DRM_7871 -> Patchwork_16437 Summary

Re: [Intel-gfx] [PATCH v2 01/10] drm/i915/debugfs: Pass guc_log struct to i915_guc_log_info

2020-02-05 Thread Daniele Ceraolo Spurio
On 2/4/20 11:58 PM, Jani Nikula wrote: On Tue, 04 Feb 2020, "Michal Wajdeczko" wrote: On Tue, 04 Feb 2020 00:28:29 +0100, Daniele Ceraolo Spurio wrote: The log struct is the only thing the function needs (apart from the seq_file), so we can pass just that instead of the whole dev_priv. v

[Intel-gfx] [PATCH] drm/i915/gem: Don't leak non-persistent requests on changing engines

2020-02-05 Thread Chris Wilson
If we have a set of active engines marked as being non-persistent, we lose track of those if the user replaces those engines with I915_CONTEXT_PARAM_ENGINES. As part of our uABI contract is that non-persistent requests are terminated if they are no longer being tracked by the user's context (in ord

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for In order to readout DP SDPs, refactors the handling of DP SDPs (rev4)

2020-02-05 Thread Patchwork
== Series Details == Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev4) URL : https://patchwork.freedesktop.org/series/72853/ State : warning == Summary == $ dim checkpatch origin/drm-tip 337be6e4a25e drm: add DP 1.4 VSC SDP Payload related enums and a structure 8e6c

[Intel-gfx] [PATCH] drm/i915/gem: Don't leak non-persistent requests on changing engines

2020-02-05 Thread Chris Wilson
If we have a set of active engines marked as being non-persistent, we lose track of those if the user replaces those engines with I915_CONTEXT_PARAM_ENGINES. As part of our uABI contract is that non-persistent requests are terminated if they are no longer being tracked by the user's context (in ord

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Relax timeout for error-interrupt reset processing

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/selftests: Relax timeout for error-interrupt reset processing URL : https://patchwork.freedesktop.org/series/73032/ State : success == Summary == CI Bug Log - changes from CI_DRM_7870 -> Patchwork_16436

Re: [Intel-gfx] [PATCH v17 0/6] Enable second DBuf slice for ICL and TGL

2020-02-05 Thread Ville Syrjälä
On Mon, Feb 03, 2020 at 01:06:24AM +0200, Stanislav Lisovskiy wrote: > Those patch series, do some initial preparation DBuf manipulating code > cleanups, i.e remove redundant structures/code, switch to mask > based DBuf manupulation, get into use DBuf assignment according to > BSpec rules. > > Sta

Re: [Intel-gfx] [PATCH v2] drm/i915/gem: Don't leak non-persistent requests on changing engines

2020-02-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-02-05 18:33:57) > > On 05/02/2020 16:44, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2020-02-05 16:22:34) > >> On 05/02/2020 12:13, Chris Wilson wrote: > >>> If we have a set of active engines marked as being non-persistent, we > >>> lose track of those if the user

[Intel-gfx] [PATCH v2 0/5] drm/i915: Hotplug cleanups

2020-02-05 Thread Ville Syrjala
From: Ville Syrjälä Remainder of the earlier hotplug cleanups. This time without exposing functions between ddi and dp code, and instead we just duplicate a few of them. Ville Syrjälä (5): drm/i915/hpd: Replace the loop-within-loop with two independent loops drm/i915: Mark all HPD capabled c

[Intel-gfx] [PATCH v2 3/5] drm/i915: Turn intel_digital_port_connected() in a vfunc

2020-02-05 Thread Ville Syrjala
From: Ville Syrjälä Let's get rid of the platform if ladders in intel_digital_port_connected() and make it a vfunc. Now the if ladders are at the encoder initialization which makes them a bit less convoluted. v2: Add forward decl for intel_encoder in intel_tc.h v3: Duplicate stuff to avoid expos

[Intel-gfx] [PATCH v2 2/5] drm/i915: Mark all HPD capabled connectors as such

2020-02-05 Thread Ville Syrjala
From: Ville Syrjälä Currently we only set the DRM_CONNECTOR_POLL_{DISCONNECT,CONNECT} bits in intel_connector->polled (the base setting), leading to some confusing looking code to reset drm_connector->polled (the actual setting) to DRM_CONNECTOR_POLL_HPD. Let's set intel_connector->polled = DRM_C

[Intel-gfx] [PATCH v2 5/5] drm/i915: Use stashed away hpd isr bits in intel_digital_port_connected()

2020-02-05 Thread Ville Syrjala
From: Ville Syrjälä Get rid of several platform specific variants of intel_digital_port_connected() and just use the ISR bits we've stashed away. v2: Duplicate stuff to avoid exposing platform specific functions across files (Jani) Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/dis

[Intel-gfx] [PATCH v2 1/5] drm/i915/hpd: Replace the loop-within-loop with two independent loops

2020-02-05 Thread Ville Syrjala
From: Ville Syrjälä No point in looping over all connectors for each hpd pin. Just loop over each connector first and deal with each one's hpd pin. Then loop over all the hpd pins to mark them as enabled again. Also get rid of the MST special case as MST encoders simply don't have a HPD pin and

[Intel-gfx] [PATCH v2 4/5] drm/i915: Stash hpd status bits under dev_priv

2020-02-05 Thread Ville Syrjala
From: Ville Syrjälä Instead of constnantly having to figure out which hpd status bit array to use let's store them under dev_priv. Should perhaps take this further and stash even more stuff to make the hpd handling more abstract yet. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_

Re: [Intel-gfx] [PATCH v2] drm/i915/gem: Don't leak non-persistent requests on changing engines

2020-02-05 Thread Tvrtko Ursulin
On 05/02/2020 16:44, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-02-05 16:22:34) On 05/02/2020 12:13, Chris Wilson wrote: If we have a set of active engines marked as being non-persistent, we lose track of those if the user replaces those engines with I915_CONTEXT_PARAM_ENGINES. As part

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Mark i915.reset as unsigned

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915: Mark i915.reset as unsigned URL : https://patchwork.freedesktop.org/series/73024/ State : success == Summary == CI Bug Log - changes from CI_DRM_7869 -> Patchwork_16435 Summary --- **SUCCESS**

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] drm/i915: Hold reference to previous active fence as we queue

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915: Hold reference to previous active fence as we queue URL : https://patchwork.freedesktop.org/series/72906/ State : success == Summary == CI Bug Log - changes from CI_DRM_7857_full -> Patchwork_16390_full

[Intel-gfx] [PATCH v6 7/7] drm/i915/display/hdcp: Make WARN* drm specific where drm_priv ptr is available

2020-02-05 Thread Pankaj Bharadiya
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_i915_private struct pointer is readily available. The conversion was done automati

[Intel-gfx] [PATCH v6 1/7] drm/i915/display/cdclk: Make WARN* drm specific where drm_priv ptr is available

2020-02-05 Thread Pankaj Bharadiya
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_i915_private struct pointer is readily available. The conversion was done automati

[Intel-gfx] [PATCH v6 6/7] drm/i915/display/global_state: Make WARN* drm specific where drm_device ptr is available

2020-02-05 Thread Pankaj Bharadiya
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_device or drm_i915_private struct pointer is readily available. The conversion was

[Intel-gfx] [PATCH v6 2/7] drm/i915/display/ddi: Make WARN* drm specific where drm_device ptr is available

2020-02-05 Thread Pankaj Bharadiya
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_device or drm_i915_private struct pointer is readily available. The conversion was

[Intel-gfx] [PATCH v6 5/7] drm/i915/display/dp: Make WARN* drm specific where drm_device ptr is available

2020-02-05 Thread Pankaj Bharadiya
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_device or drm_i915_private struct pointer is readily available. The conversion was

[Intel-gfx] [PATCH v6 0/7] drm: Introduce struct drm_device based WARN* and use them in i915

2020-02-05 Thread Pankaj Bharadiya
Device specific dev_WARN and dev_WARN_ONCE macros available in kernel include device information in the backtrace, so we know what device the warnings originate from. Similar to this, add new struct drm_device based drm_WARN* macros. These macros include device information in the backtrace, so we

[Intel-gfx] [PATCH v6 4/7] drm/i915/display/power: Make WARN* drm specific where drm_priv ptr is available

2020-02-05 Thread Pankaj Bharadiya
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_i915_private struct pointer is readily available. The conversion was done automati

[Intel-gfx] [PATCH v6 3/7] drm/i915/display/display: Make WARN* drm specific where drm_device ptr is available

2020-02-05 Thread Pankaj Bharadiya
drm specific WARN* calls include device information in the backtrace, so we know what device the warnings originate from. Covert all the calls of WARN* with device specific drm_WARN* variants in functions where drm_device or drm_i915_private struct pointer is readily available. The conversion was

[Intel-gfx] [PATCH v6 10/10] drivers/oprofile: open access for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure. CAP_PERFMON implements the principal of least privil

[Intel-gfx] [PATCH v6 09/10] drivers/perf: open access for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure. CAP_PERFMON implements the principal of least privile

[Intel-gfx] [PATCH v6 07/10] powerpc/perf: open access for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure. CAP_PERFMON implements the principal of least privile

[Intel-gfx] [PATCH v6 08/10] parisc/perf: open access for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to monitoring for CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure. CAP_PERFMON implements the principal of least privile

[Intel-gfx] [PATCH v6 06/10] trace/bpf_trace: open access for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to bpf_trace monitoring for CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure. CAP_PERFMON implements the principal of lea

[Intel-gfx] [PATCH v6 05/10] drm/i915/perf: open access for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to i915_perf monitoring for CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure. CAP_PERFMON implements the principal of lea

[Intel-gfx] [PATCH v6 04/10] perf tool: extend Perf tool with CAP_PERFMON capability support

2020-02-05 Thread Alexey Budankov
Extend error messages to mention CAP_PERFMON capability as an option to substitute CAP_SYS_ADMIN capability for secure system performance monitoring and observability operations. Make perf_event_paranoid_check() and __cmd_ftrace() to be aware of CAP_PERFMON capability. CAP_PERFMON implements the

[Intel-gfx] [PATCH v6 03/10] perf/core: open access to probes for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to monitoring via kprobes and uprobes and eBPF tracing for CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure. perf kprobes

[Intel-gfx] [PATCH v6 02/10] perf/core: open access to the core for CAP_PERFMON privileged process

2020-02-05 Thread Alexey Budankov
Open access to monitoring of kernel code, cpus, tracepoints and namespaces data for a CAP_PERFMON privileged process. Providing the access under CAP_PERFMON capability singly, without the rest of CAP_SYS_ADMIN credentials, excludes chances to misuse the credentials and makes operation more secure

[Intel-gfx] [PATCH v6 01/10] capabilities: introduce CAP_PERFMON to kernel and user space

2020-02-05 Thread Alexey Budankov
Introduce CAP_PERFMON capability designed to secure system performance monitoring and observability operations so that CAP_PERFMON would assist CAP_SYS_ADMIN capability in its governing role for performance monitoring and observability subsystems. CAP_PERFMON hardens system security and integrit

[Intel-gfx] [PATCH v6 00/10] Introduce CAP_PERFMON to secure system performance monitoring and observability

2020-02-05 Thread Alexey Budankov
Currently access to perf_events, i915_perf and other performance monitoring and observability subsystems of the kernel is open only for a privileged process [1] with CAP_SYS_ADMIN capability enabled in the process effective set [2]. This patch set introduces CAP_PERFMON capability designed to se

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev2)

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915/gem: Don't leak non-persistent requests on changing engines (rev2) URL : https://patchwork.freedesktop.org/series/73023/ State : success == Summary == CI Bug Log - changes from CI_DRM_7869 -> Patchwork_16434 ===

Re: [Intel-gfx] [PATCH v3 17/17] drm/i915/psr: Use new DP VSC SDP compute routine on PSR

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v3 17/17] drm/i915/psr: Use new DP VSC

Re: [Intel-gfx] [PATCH v3 16/17] drm/i915/dp: Add compute routine for DP PSR VSC SDP

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 16/17] drm/i915/dp: Add compute routine for DP P

Re: [Intel-gfx] [PATCH v3 15/17] drm/i915: Stop sending DP SDPs on intel_ddi_post_disable_dp()

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 15/17] drm/i915: Stop sending DP SDPs on > intel

Re: [Intel-gfx] [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates

Re: [Intel-gfx] [PATCH v3 13/17] drm/i915: Add state readout for DP VSC SDP

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 13/17] drm/i915: Add state readout for DP VSC SD

Re: [Intel-gfx] [PATCH v3 12/17] drm/i915: Add state readout for DP HDR Metadata Infoframe SDP

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v3 12/17] drm/i915: Add state readout f

Re: [Intel-gfx] [PATCH v3 11/17] drm/i915: Program DP SDPs with computed configs

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v3 11/17] drm/i915: Program DP SDPs with

Re: [Intel-gfx] [PATCH v3 10/17] drm/i915: Include DP VSC SDP in the crtc state dump

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 10/17] drm/i915: Include DP VSC SDP in the crtc

Re: [Intel-gfx] [PATCH v3 09/17] drm/i915: Include DP HDR Metadata Infoframe SDP in the crtc state dump

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 09/17] drm/i915: Include DP HDR Metadata Infofra

Re: [Intel-gfx] [PATCH v2] drm/i915/gem: Don't leak non-persistent requests on changing engines

2020-02-05 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-02-05 16:22:34) > > > On 05/02/2020 12:13, Chris Wilson wrote: > > If we have a set of active engines marked as being non-persistent, we > > lose track of those if the user replaces those engines with > > I915_CONTEXT_PARAM_ENGINES. As part of our uABI contract is tha

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: align dumb buffer stride to page_sz of the region

2020-02-05 Thread Patchwork
== Series Details == Series: drm/i915: align dumb buffer stride to page_sz of the region URL : https://patchwork.freedesktop.org/series/73021/ State : success == Summary == CI Bug Log - changes from CI_DRM_7869 -> Patchwork_16433 Summary --

Re: [Intel-gfx] [PATCH v3 08/17] drm/i915: Include HDMI DRM infoframe in the crtc state dump

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 08/17] drm/i915: Include HDMI DRM infoframe in t

Re: [Intel-gfx] [PATCH v3 07/17] drm: Add logging function for DP VSC SDP

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v3 07/17] drm: Add logging function for

Re: [Intel-gfx] [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary Data Packet)

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary D

Re: [Intel-gfx] [PATCH v2] drm/i915/gem: Don't leak non-persistent requests on changing engines

2020-02-05 Thread Tvrtko Ursulin
On 05/02/2020 12:13, Chris Wilson wrote: If we have a set of active engines marked as being non-persistent, we lose track of those if the user replaces those engines with I915_CONTEXT_PARAM_ENGINES. As part of our uABI contract is that non-persistent requests are terminated if they are no long

Re: [Intel-gfx] [PATCH v3 05/17] video/hdmi: Add Unpack only function for DRM infoframe

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v3 05/17] video/hdmi: Add Unpack only f

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control

2020-02-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/display: Defer application of initial chv_phy_control URL : https://patchwork.freedesktop.org/series/72905/ State : success == Summary == CI Bug Log - changes from CI_DRM_7857_full -> Patchwork_16389_full ===

Re: [Intel-gfx] [PATCH v3 04/17] drm/i915/dp: Add writing of DP SDPs (Secondary Data Packet)

2020-02-05 Thread Shankar, Uma
> -Original Message- > From: dri-devel On Behalf Of Gwan- > gyeong Mun > Sent: Tuesday, February 4, 2020 4:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: linux-fb...@vger.kernel.org; dri-de...@lists.freedesktop.org > Subject: [PATCH v3 04/17] drm/i915/dp: Add writing of DP SDPs (Secon

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_persistence: Check that we cannot hide hangs on old engines

2020-02-05 Thread Tvrtko Ursulin
On 05/02/2020 13:48, Chris Wilson wrote: As the kernel loses track of the context's old engines, if we request that the context is non-persistent then any request on the untracked engines must be cancelled. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/i915/gem_ctx_persistence.c

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