Re: [Intel-gfx] [PATCH v2 01/10] drm/i915/debugfs: Pass guc_log struct to i915_guc_log_info

On Tue, 04 Feb 2020, "Michal Wajdeczko" wrote: > On Tue, 04 Feb 2020 00:28:29 +0100, Daniele Ceraolo Spurio > wrote: > >> The log struct is the only thing the function needs (apart from >> the seq_file), so we can pass just that instead of the whole dev_priv. >> >> v2: Split this change to its

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Check require bandwidth did not exceed LSPCON limitation (rev6)

== Series Details == Series: drm/i915: Check require bandwidth did not exceed LSPCON limitation (rev6) URL : https://patchwork.freedesktop.org/series/72157/ State : success == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16426 =

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)

== Series Details == Series: drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) URL : https://patchwork.freedesktop.org/series/71647/ State : success == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16425 Summ

[Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)

== Series Details == Series: drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) URL : https://patchwork.freedesktop.org/series/71647/ State : warning == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh CHK include/generated/compile.h Ke

[Intel-gfx] [PATCH] drm/i915: Check require bandwidth did not exceed LSPCON limitation

While mode setting, driver would calculate mode rate based on resolution and bpp. And choose the best bpp that did not exceed DP bandwidtd. But LSPCON had more restriction due to it convert DP to HDMI. Driver should respect HDMI's bandwidth limitation if LSPCON was active. This change would ignore

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2)

== Series Details == Series: drm/i915/dp/mst : Get clock rate from sink's available PBN (rev2) URL : https://patchwork.freedesktop.org/series/71647/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1cb408eb7f9a drm/i915/dp/mst : Get clock rate from sink's available PBN -:59: WARNI

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: add basic selftests for rc6 (rev4)

== Series Details == Series: drm/i915/selftests: add basic selftests for rc6 (rev4) URL : https://patchwork.freedesktop.org/series/69825/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16424 Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Disable use of hwsp_cacheline for kernel_context

== Series Details == Series: drm/i915: Disable use of hwsp_cacheline for kernel_context URL : https://patchwork.freedesktop.org/series/72992/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16423 Summary ---

[Intel-gfx] [PATCH v2] drm/i915/dp/mst : Get clock rate from sink's available PBN

Driver report physcial bandwidth for max dot clock rate. It would caused compatibility issue sometimes when physical bandwidth exceed MST hub output ability. For example, here is a MST hub with HDMI 1.4 and DP 1.2 output. And source have DP 1.2 output capability. Connect a HDMI 2.0 display then so

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp, i915: eDP DPCD backlight control detection fixes

== Series Details == Series: drm/dp, i915: eDP DPCD backlight control detection fixes URL : https://patchwork.freedesktop.org/series/72991/ State : success == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16422 Summary -

Re: [Intel-gfx] [PATCH 1/4] drm/i915/hdcp: Update CP as per the kernel internal state

On 2020-01-28 at 21:45:45 +0530, Anshuman Gupta wrote: Hi Jani , As per my understanding intel_hdcp_atomic_check() is not sufficient to fix the broken hdcp uapi state, as the state fixup required in case of modeset. If you do not have any concern, can we continue with the patch. Thanks, Anshuman Gu

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix the docs for intel_set_cdclk_post_plane_update()

== Series Details == Series: drm/i915: Fix the docs for intel_set_cdclk_post_plane_update() URL : https://patchwork.freedesktop.org/series/72981/ State : success == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16420 Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Move ringbuffer WAs to engine workaround list (rev3)

== Series Details == Series: drm/i915: Move ringbuffer WAs to engine workaround list (rev3) URL : https://patchwork.freedesktop.org/series/72864/ State : success == Summary == CI Bug Log - changes from CI_DRM_7854_full -> Patchwork_16378_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: split out display debugfs to a separate file

== Series Details == Series: drm/i915: split out display debugfs to a separate file URL : https://patchwork.freedesktop.org/series/72979/ State : success == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16419 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: split out display debugfs to a separate file

== Series Details == Series: drm/i915: split out display debugfs to a separate file URL : https://patchwork.freedesktop.org/series/72979/ State : warning == Summary == $ dim checkpatch origin/drm-tip f453df1c7174 drm/i915: split out display debugfs to a separate file -:25: WARNING:FILE_PATH_CH

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for disable drm_global_mutex for most drivers (rev5)

== Series Details == Series: disable drm_global_mutex for most drivers (rev5) URL : https://patchwork.freedesktop.org/series/72711/ State : warning == Summary == $ dim checkpatch origin/drm-tip e5bf211db5e9 drm: Complain if drivers still use the ->load callback -:48: WARNING:NO_AUTHOR_SIGN_OFF

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [RFC,1/2] trace: Export anonymous tracing

== Series Details == Series: series starting with [RFC,1/2] trace: Export anonymous tracing URL : https://patchwork.freedesktop.org/series/72974/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/genera

[Intel-gfx] [PATCH v4] drm/i915/selftests: add basic selftests for rc6

From: Andi Shyti Add three basic tests for rc6 power status: 1. live_rc6_basic - simply checks if rc6 works when it's enabled or stops when it's disabled. 2. live_rc6_threshold - rc6 should not work when the evaluation interval is less than the threshold and should work otherwise. 3. liv

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: pass i915 to psr_global_enabled()

== Series Details == Series: drm/i915/psr: pass i915 to psr_global_enabled() URL : https://patchwork.freedesktop.org/series/72968/ State : success == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16416 Summary --- **S

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: modeset probe/remove cleanup, again

== Series Details == Series: drm/i915: modeset probe/remove cleanup, again URL : https://patchwork.freedesktop.org/series/72967/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16415 Summary --- **FAI

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno

== Series Details == Series: series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno URL : https://patchwork.freedesktop.org/series/72862/ State : success == Summary == CI Bug Log - changes from CI_DRM_7854_full -> Patchwork_16372_full ==

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: modeset probe/remove cleanup, again

== Series Details == Series: drm/i915: modeset probe/remove cleanup, again URL : https://patchwork.freedesktop.org/series/72967/ State : warning == Summary == $ dim checkpatch origin/drm-tip bfd1d4acd77e drm/i915: register vga switcheroo later, unregister earlier f9cd0e2c9313 drm/i915: switch

[Intel-gfx] ✗ Fi.CI.BUILD: failure for 3 display pipes combination system support (rev2)

== Series Details == Series: 3 display pipes combination system support (rev2) URL : https://patchwork.freedesktop.org/series/72468/ State : failure == Summary == Applying: drm/i915: Iterate over pipe and skip the disabled one Using index info to reconstruct a base tree... M drivers/gpu/

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Explicitly cleanup initial_plane_config

== Series Details == Series: series starting with [1/2] drm/i915/display: Explicitly cleanup initial_plane_config URL : https://patchwork.freedesktop.org/series/72961/ State : success == Summary == CI Bug Log - changes from CI_DRM_7867 -> Patchwork_16412 ==

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Wean off drm_pci_alloc/drm_pci_free (rev2)

== Series Details == Series: drm/i915: Wean off drm_pci_alloc/drm_pci_free (rev2) URL : https://patchwork.freedesktop.org/series/72878/ State : failure == Summary == Applying: drm/i915: Wean off drm_pci_alloc/drm_pci_free Using index info to reconstruct a base tree... M drivers/gpu/drm/i

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Add a simple rollover test for the kernel context (rev2)

== Series Details == Series: drm/i915/selftests: Add a simple rollover test for the kernel context (rev2) URL : https://patchwork.freedesktop.org/series/72935/ State : failure == Summary == Applying: drm/i915/selftests: Add a simple rollover test for the kernel context Using index info to rec

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: conversion to drm_device based logging macros.

== Series Details == Series: drm/i915: conversion to drm_device based logging macros. URL : https://patchwork.freedesktop.org/series/72959/ State : failure == Summary == Applying: drm/i915/dp: convert to struct drm_device based logging macros. Applying: drm/i915/dp_link_training: convert to dr

Re: [Intel-gfx] [PATCH] drm/i915/huc: Fix error reported by I915_PARAM_HUC_STATUS

On 1/27/2020 1:41 AM, Michal Wajdeczko wrote: On Thu, 23 Jan 2020 16:51:58 +0100, Chris Wilson wrote: Quoting Michal Wajdeczko (2020-01-23 15:38:52) On Thu, 23 Jan 2020 16:02:17 +0100, Chris Wilson wrote: > Quoting Daniele Ceraolo Spurio (2020-01-22 23:52:33) >> >> >> On 1/22/20 11:48 A

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Program MBUS with rmw during initialization

Quoting Matt Roper (2020-02-05 00:11:46) > On Tue, Feb 04, 2020 at 11:40:06PM +, Patchwork wrote: > > == Series Details == > > > > Series: series starting with [1/2] drm/i915: Program MBUS with rmw during > > initialization > > URL : https://patchwork.freedesktop.org/series/72950/ > > State

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Program MBUS with rmw during initialization

On Tue, Feb 04, 2020 at 11:40:06PM +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/2] drm/i915: Program MBUS with rmw during > initialization > URL : https://patchwork.freedesktop.org/series/72950/ > State : failure > > == Summary == > > CI Bug Log - changes

[Intel-gfx] ✓ Fi.CI.BAT: success for RFC: pipe writeback design for i915

== Series Details == Series: RFC: pipe writeback design for i915 URL : https://patchwork.freedesktop.org/series/72958/ State : success == Summary == CI Bug Log - changes from CI_DRM_7866 -> Patchwork_16409 Summary --- **SUCCESS**

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Skip rmw for masked registers (rev4)

== Series Details == Series: drm/i915/gt: Skip rmw for masked registers (rev4) URL : https://patchwork.freedesktop.org/series/72776/ State : success == Summary == CI Bug Log - changes from CI_DRM_7853_full -> Patchwork_16371_full Summary --

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Check VBT before updating the transcoder for pipe

I guess a better solution would be do the HW state sanitization during the HW readout(intel_modeset_setup_hw_state()) On Tue, 2020-02-04 at 14:44 -0800, Vivek Kasireddy wrote: > On Tue, 4 Feb 2020 12:50:25 +0200 > Jani Nikula wrote: > Hi Jani, > > > On Mon, 03 Feb 2020, Vivek Kasireddy > > wrot

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for RFC: pipe writeback design for i915

== Series Details == Series: RFC: pipe writeback design for i915 URL : https://patchwork.freedesktop.org/series/72958/ State : warning == Summary == $ dim checkpatch origin/drm-tip aa098022234b RFC: pipe writeback design for i915 -:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit de

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Program MBUS with rmw during initialization

== Series Details == Series: series starting with [1/2] drm/i915: Program MBUS with rmw during initialization URL : https://patchwork.freedesktop.org/series/72950/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7866 -> Patchwork_16408 ==

Re: [Intel-gfx] [PATCH v2 01/10] drm/i915/debugfs: Pass guc_log struct to i915_guc_log_info

On 2/4/20 1:10 PM, Daniele Ceraolo Spurio wrote: On 2/4/20 9:05 AM, Michal Wajdeczko wrote: On Tue, 04 Feb 2020 00:28:29 +0100, Daniele Ceraolo Spurio wrote: The log struct is the only thing the function needs (apart from the seq_file), so we can pass just that instead of the whole dev_

Re: [Intel-gfx] [PATCH] drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (v3)

On Fri, 31 Jan 2020 11:35:35 +0200 Jani Nikula wrote: Hi Jani, > On Thu, 30 Jan 2020, Vivek Kasireddy > wrote: > > On some platforms such as Elkhart Lake, although we may use DDI D > > to drive a connector, we have to use PHY A (Combo Phy PORT A) to > > detect the hotplug interrupts as per the s

Re: [Intel-gfx] [PATCH 1/5] drm: Remove PageReserved manipulation from drm_pci_alloc

Quoting Alex Deucher (2020-02-03 21:49:48) > On Sun, Feb 2, 2020 at 12:16 PM Chris Wilson wrote: > > > > drm_pci_alloc/drm_pci_free are very thin wrappers around the core dma > > facilities, and we have no special reason within the drm layer to behave > > differently. In particular, since > > > >

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Check VBT before updating the transcoder for pipe

On Tue, 4 Feb 2020 12:50:25 +0200 Jani Nikula wrote: Hi Jani, > On Mon, 03 Feb 2020, Vivek Kasireddy > wrote: > > Since the pipe->transcoder mapping is not expected to change unless > > there is either eDP or DSI connectors present, check the VBT to > > confirm their presence in addition to chec

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Check VBT before updating the transcoder for pipe

== Series Details == Series: drm/i915/ehl: Check VBT before updating the transcoder for pipe URL : https://patchwork.freedesktop.org/series/72949/ State : success == Summary == CI Bug Log - changes from CI_DRM_7865 -> Patchwork_16407 Summar

Re: [Intel-gfx] [PATCH v2 08/10] drm/i915/uc: Abort early on uc_init failure

On 2/4/20 10:15 AM, Michal Wajdeczko wrote: On Tue, 04 Feb 2020 00:28:36 +0100, Daniele Ceraolo Spurio wrote: Now that we can differentiate wants vs uses GuC/HuC, intel_uc_init is restricted to running only if we have successfully fetched the required blob(s) and are committed to using the

Re: [Intel-gfx] [PATCH v2 07/10] drm/i915/guc: Apply new uC status tracking to GuC submission as well

On 2/4/20 10:06 AM, Michal Wajdeczko wrote: On Tue, 04 Feb 2020 00:28:35 +0100, Daniele Ceraolo Spurio wrote: To be able to differentiate the before and after of our commitment to GuC submission, which will be used in follow-up patches to early set-up the submission structures. Signed-off

[Intel-gfx] ✓ Fi.CI.BAT: success for Commit early to GuC (rev2)

== Series Details == Series: Commit early to GuC (rev2) URL : https://patchwork.freedesktop.org/series/72031/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16406 Summary --- **SUCCESS** No regres

Re: [Intel-gfx] [PATCH v2 06/10] drm/i915/uc: Improve tracking of uC init status

On 2/4/20 9:54 AM, Michal Wajdeczko wrote: On Tue, 04 Feb 2020 00:28:34 +0100, Daniele Ceraolo Spurio wrote: To be able to setup GuC submission functions during engine init we need to commit to using GuC as soon as possible. Currently, the only thing that can stop us from using the microco

[Intel-gfx] [PATCH] drm/i915: Disable use of hwsp_cacheline for kernel_context

Currently on execlists, we use a local hwsp for the kernel_context, rather than the engine's HWSP, as this is the default for execlists. However, seqno rollover requires allocating a new HWSP cachline, and may require pinning a new HWSP page in the GTT. This operation requiring pinning in the GGTT

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add Wa_1606054188:tgl (rev2)

== Series Details == Series: drm/i915/tgl: Add Wa_1606054188:tgl (rev2) URL : https://patchwork.freedesktop.org/series/72839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7853_full -> Patchwork_16369_full Summary ---

Re: [Intel-gfx] [PATCH v2 01/10] drm/i915/debugfs: Pass guc_log struct to i915_guc_log_info

On 2/4/20 9:05 AM, Michal Wajdeczko wrote: On Tue, 04 Feb 2020 00:28:29 +0100, Daniele Ceraolo Spurio wrote: The log struct is the only thing the function needs (apart from the seq_file), so we can pass just that instead of the whole dev_priv. v2: Split this change to its own patch (Micha

Re: [Intel-gfx] [PATCH v2 09/11] drm/i915: Turn intel_digital_port_connected() in a vfunc

On Tue, Jan 28, 2020 at 11:06:42AM +0200, Jani Nikula wrote: > On Tue, 21 Jan 2020, Ville Syrjala wrote: > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > > b/drivers/gpu/drm/i915/display/intel_dp.h > > index 3da166054788..cf0df6f18734 100644 > > --- a/drivers/gpu/drm/i915/display/intel_

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Commit early to GuC (rev2)

== Series Details == Series: Commit early to GuC (rev2) URL : https://patchwork.freedesktop.org/series/72031/ State : warning == Summary == $ dim checkpatch origin/drm-tip e5cb7d5a536e drm/i915/debugfs: Pass guc_log struct to i915_guc_log_info ebe1197848d5 drm/i915/guc: Kill USES_GUC macro 224

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3)

== Series Details == Series: series starting with [1/2] drm/i915/display/fbc: Make fences a nice-to-have for GEN9+ (rev3) URL : https://patchwork.freedesktop.org/series/72698/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16405 ==

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value when clearing DDI select

== Series Details == Series: drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value when clearing DDI select URL : https://patchwork.freedesktop.org/series/72943/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16403 =

[Intel-gfx] ✗ Fi.CI.BUILD: failure for In order to readout DP SDPs, refactors the handling of DP SDPs (rev3)

== Series Details == Series: In order to readout DP SDPs, refactors the handling of DP SDPs (rev3) URL : https://patchwork.freedesktop.org/series/72853/ State : failure == Summary == Applying: drm: add DP 1.4 VSC SDP Payload related enums and a structure Applying: drm/i915/dp: Add compute rout

Re: [Intel-gfx] [PATCH] drm/i915: Fix the docs for intel_set_cdclk_post_plane_update()

On Tue, 2020-02-04 at 22:26 +0200, Ville Syrjälä wrote: > On Tue, Feb 04, 2020 at 06:18:09PM +, Souza, Jose wrote: > > On Tue, 2020-02-04 at 17:48 +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > s/before/after/ again after accidentally changing it the > > > other way in comm

Re: [Intel-gfx] [PATCH] drm/i915: Fix the docs for intel_set_cdclk_post_plane_update()

On Tue, Feb 04, 2020 at 06:18:09PM +, Souza, Jose wrote: > On Tue, 2020-02-04 at 17:48 +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > s/before/after/ again after accidentally changing it the > > other way in commit 5604e9ceaed5 ("drm/i915: Simplify > > intel_set_cdclk_{pre,post}_

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Add support for DP 1.4 Compliance edid corruption test (rev4)

== Series Details == Series: drm: Add support for DP 1.4 Compliance edid corruption test (rev4) URL : https://patchwork.freedesktop.org/series/70530/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7853_full -> Patchwork_16367_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Fix rc6 on Ivybridge

== Series Details == Series: drm/i915/gt: Fix rc6 on Ivybridge URL : https://patchwork.freedesktop.org/series/72938/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16402 Summary --- **SUCCESS** No

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove lite restore defines

== Series Details == Series: drm/i915: Remove lite restore defines URL : https://patchwork.freedesktop.org/series/72933/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16400 Summary --- **SUCCESS**

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftest: Ensure string fits within name[]

== Series Details == Series: drm/i915/selftest: Ensure string fits within name[] URL : https://patchwork.freedesktop.org/series/72936/ State : failure == Summary == Applying: drm/i915/selftest: Ensure string fits within name[] Using index info to reconstruct a base tree... M drivers/gpu/

[Intel-gfx] [PATCH 1/4] Revert "drm/i915: Don't use VBT for detecting DPCD backlight controls"

This reverts commit d2a4bb6f8bc8cf2d788adf7e59b5b52fe3ac. So, turns out that this ended up just breaking things. While many laptops incorrectly advertise themselves as supporting PWM backlight controls, they actually will only work with DPCD backlight controls. Unfortunately, it also seems the

[Intel-gfx] [PATCH 2/4] drm/dp: Introduce EDID-based quirks

The whole point of using OUIs is so that we can recognize certain devices and potentially apply quirks for them. Normally this should work quite well, but there appears to be quite a number of laptop panels out there that will fill the OUI but not the device ID. As such, for devices like this I can

[Intel-gfx] [PATCH 4/4] drm/i915: Force DPCD backlight mode for some Precision 7750 panels

According to Dell, trying to match their panels via OUI is not reliable enough and we've been told that we should check against the EDID instead. As well, Dell seems to have some panels that are actually intended to switch between using PWM for backlight controls and DPCD for backlight controls dep

[Intel-gfx] [PATCH 3/4] drm/i915: Force DPCD backlight mode on X1 Extreme 2nd Gen 4K AMOLED panel

The X1 Extreme is one of the systems that lies about which backlight interface that it uses in its VBIOS as PWM backlight controls don't work at all on this machine. It's possible that this panel could be one of the infamous ones that can switch between PWM mode and DPCD backlight control mode, but

[Intel-gfx] [PATCH 0/4] drm/dp, i915: eDP DPCD backlight control detection fixes

Unfortunately, it turned out that the DPCD is also not a reliable way of probing for DPCD backlight support as some panels will lie and say they have DPCD backlight controls when they don't actually. So, revert back to the old behavior and add a bunch of EDID-based DP quirks for the panels that we

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Pimp DP DFP handling

== Series Details == Series: drm/i915: Pimp DP DFP handling URL : https://patchwork.freedesktop.org/series/72928/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16399 Summary --- **FAILURE** Serio

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove lite restore defines

== Series Details == Series: drm/i915: Remove lite restore defines URL : https://patchwork.freedesktop.org/series/72933/ State : warning == Summary == $ dim checkpatch origin/drm-tip cc204e4078d6 drm/i915: Remove lite restore defines -:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: more locking for ppgtt mm LRU list

== Series Details == Series: drm/i915/gvt: more locking for ppgtt mm LRU list URL : https://patchwork.freedesktop.org/series/72927/ State : success == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16398 Summary --- **

Re: [Intel-gfx] [PATCH v2] drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value when clearing DDI select

On Tue, Feb 04, 2020 at 05:48:24PM +, Souza, Jose wrote: > On Tue, 2020-02-04 at 15:35 +0200, Ville Syrjälä wrote: > > On Mon, Feb 03, 2020 at 02:55:49PM -0800, José Roberto de Souza > > wrote: > > > TGL is suffering of timeouts and fifo underruns when disabling > > > transcoder in MST mode, th

Re: [Intel-gfx] [PATCH] drm/i915: Fix the docs for intel_set_cdclk_post_plane_update()

On Tue, 2020-02-04 at 17:48 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > s/before/after/ again after accidentally changing it the > other way in commit 5604e9ceaed5 ("drm/i915: Simplify > intel_set_cdclk_{pre,post}_plane_update() calling convention") > > Cc: José Roberto de Souza > Sig

Re: [Intel-gfx] [PATCH v2 08/10] drm/i915/uc: Abort early on uc_init failure

On Tue, 04 Feb 2020 00:28:36 +0100, Daniele Ceraolo Spurio wrote: Now that we can differentiate wants vs uses GuC/HuC, intel_uc_init is restricted to running only if we have successfully fetched the required blob(s) and are committed to using the microcontroller(s). The only remaining thing t

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gvt: more locking for ppgtt mm LRU list

== Series Details == Series: drm/i915/gvt: more locking for ppgtt mm LRU list URL : https://patchwork.freedesktop.org/series/72927/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5eeb11aab588 drm/i915/gvt: more locking for ppgtt mm LRU list -:6: ERROR:GIT_COMMIT_ID: Please use g

Re: [Intel-gfx] [PATCH v2 07/10] drm/i915/guc: Apply new uC status tracking to GuC submission as well

On Tue, 04 Feb 2020 00:28:35 +0100, Daniele Ceraolo Spurio wrote: To be able to differentiate the before and after of our commitment to GuC submission, which will be used in follow-up patches to early set-up the submission structures. Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajdecz

Re: [Intel-gfx] [PATCH v2 06/10] drm/i915/uc: Improve tracking of uC init status

On Tue, 04 Feb 2020 00:28:34 +0100, Daniele Ceraolo Spurio wrote: To be able to setup GuC submission functions during engine init we need to commit to using GuC as soon as possible. Currently, the only thing that can stop us from using the microcontrollers once we've fetched the blobs is a fu

Re: [Intel-gfx] [PATCH v2] drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value when clearing DDI select

On Tue, 2020-02-04 at 15:35 +0200, Ville Syrjälä wrote: > On Mon, Feb 03, 2020 at 02:55:49PM -0800, José Roberto de Souza > wrote: > > TGL is suffering of timeouts and fifo underruns when disabling > > transcoder in MST mode, this is fixed by set TRANS_DDI_MODE_SELECT > > to > > 0(HDMI mode) when c

[Intel-gfx] ✗ Fi.CI.BAT: failure for Refactor Gen11+ SAGV support (rev2)

== Series Details == Series: Refactor Gen11+ SAGV support (rev2) URL : https://patchwork.freedesktop.org/series/72923/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7864 -> Patchwork_16397 Summary --- **FAILURE**

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Refactor Gen11+ SAGV support (rev2)

== Series Details == Series: Refactor Gen11+ SAGV support (rev2) URL : https://patchwork.freedesktop.org/series/72923/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Start passing latency as parameter Okay! Commit: drm/i915: Introduce skl_pl

Re: [Intel-gfx] [PATCH v2 04/10] drm/i915/uc: Update the FW status on injected fetch error

On Tue, 04 Feb 2020 00:28:32 +0100, Daniele Ceraolo Spurio wrote: In a follow up patch we will rely on the fact that the status always moves away from "SELECTED" after the fetch is attempted to decide what to do with the GuC. v2: Split this change to its own patch (Michal) Signed-off-by: Da

Re: [Intel-gfx] [PATCH v2 02/10] drm/i915/guc: Kill USES_GUC macro

On Tue, 04 Feb 2020 00:28:30 +0100, Daniele Ceraolo Spurio wrote: use intel_uc_uses_guc() directly instead, to be consistent in the way we check what we want to do with the GuC. v2: split guc_log_info changes to their own patch (Michal) Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajd

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Refactor Gen11+ SAGV support (rev2)

== Series Details == Series: Refactor Gen11+ SAGV support (rev2) URL : https://patchwork.freedesktop.org/series/72923/ State : warning == Summary == $ dim checkpatch origin/drm-tip 37ec63f7b6aa drm/i915: Start passing latency as parameter bbfa09f48831 drm/i915: Introduce skl_plane_wm_level acc

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Defer application of initial chv_phy_control (rev2)

== Series Details == Series: drm/i915/display: Defer application of initial chv_phy_control (rev2) URL : https://patchwork.freedesktop.org/series/72865/ State : failure == Summary == Applying: drm/i915/display: Defer application of initial chv_phy_control Using index info to reconstruct a base

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk() (rev2)

== Series Details == Series: drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk() (rev2) URL : https://patchwork.freedesktop.org/series/72875/ State : failure == Summary == Applying: drm/i915/display: Fix NULL-crtc deref in calc_min_cdclk() Using index info to reconstruct a base tree... M

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/audio: Skip the cdclk modeset if no pipes attached (rev2)

== Series Details == Series: drm/i915/audio: Skip the cdclk modeset if no pipes attached (rev2) URL : https://patchwork.freedesktop.org/series/72863/ State : failure == Summary == Applying: drm/i915/audio: Skip the cdclk modeset if no pipes attached Using index info to reconstruct a base tree.

Re: [Intel-gfx] [PATCH v2 01/10] drm/i915/debugfs: Pass guc_log struct to i915_guc_log_info

On Tue, 04 Feb 2020 00:28:29 +0100, Daniele Ceraolo Spurio wrote: The log struct is the only thing the function needs (apart from the seq_file), so we can pass just that instead of the whole dev_priv. v2: Split this change to its own patch (Michal) Signed-off-by: Daniele Ceraolo Spurio Cc:

Re: [Intel-gfx] [PATCH i-g-t] benchmarks: Drop gem_mmap

On 04/02/2020 16:27, Chris Wilson wrote: Read/write access speed is covered by i915_selftests/perf_memory_regions. Signed-off-by: Chris Wilson Cc: Ashutosh Dixit Cc: Matthew Auld Reviewed-by: Matthew Auld ___ Intel-gfx mailing list Intel-gfx@list

Re: [Intel-gfx] [PATCH 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask

On Tue, Feb 04, 2020 at 04:30:16PM +0200, Ville Syrjälä wrote: > On Tue, Feb 04, 2020 at 04:59:24PM +0530, Anshuman Gupta wrote: > > As a disabled pipe in pipe_mask is not having a valid intel crtc, > > driver wrongly populates the possible_crtcs mask while initializing > > the plane for a CRTC. Fi

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Fix broken transcoder err state

On Tue, 04 Feb 2020, Ville Syrjälä wrote: > On Tue, Feb 04, 2020 at 04:59:23PM +0530, Anshuman Gupta wrote: >> Skip the trascoder whose pipe is disabled while >> initializing trascoder error state in 3 display >> pipe syatem. >> >> Cc: Ville Syrjälä >> Signed-off-by: Anshuman Gupta >> --- >> d

[Intel-gfx] [PATCH i-g-t] benchmarks: Drop gem_mmap

Read/write access speed is covered by i915_selftests/perf_memory_regions. Signed-off-by: Chris Wilson Cc: Ashutosh Dixit Cc: Matthew Auld --- benchmarks/Makefile.sources | 1 - benchmarks/gem_mmap.c | 199 benchmarks/meson.build | 1 - 3 file

Re: [Intel-gfx] [PATCH i-g-t v2] i915/gem_ctx_exec: Cover all engines for nohangcheck

On 04/02/2020 16:19, Chris Wilson wrote: No engine can be missed when verifying that a rogue user cannot cause a denial-of-service with nohangcheck. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- __for_each_physical_engine, keep the leaks --- tests/i915/gem_ctx_exec.c | 38

[Intel-gfx] [PATCH v3] drm/i915: Never allow userptr into the new mapping types

From: Janusz Krzysztofik Commit 4f2a572eda67 ("drm/i915/userptr: Never allow userptr into the mappable GGTT") made I915_GEM_MMAP_GTT IOCTLs to fail when attempted on a userptr object in order to protect from a lockdep splat. Later on, new mapping types were introduced by commit cc662126b413 ("dr

[Intel-gfx] [PATCH i-g-t v2] i915/gem_ctx_exec: Cover all engines for nohangcheck

No engine can be missed when verifying that a rogue user cannot cause a denial-of-service with nohangcheck. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- __for_each_physical_engine, keep the leaks --- tests/i915/gem_ctx_exec.c | 38 -- 1 file changed, 32

Re: [Intel-gfx] [RFC PATCH v2] drm/i915: Never allow userptr into the new mapping types

Quoting Janusz Krzysztofik (2020-01-31 15:31:23) > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 9ddcf17230e6..334a578ce85f 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -923,7 +923,7 @@ i915_gem_object_ggtt_pin(

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Cover all engines for nohangcheck

Quoting Tvrtko Ursulin (2020-02-04 15:57:23) > > On 04/02/2020 15:24, Chris Wilson wrote: > > No engine can be missed when verifying that a rogue user cannot cause a > > denial-of-service with nohangcheck. > > > > Signed-off-by: Chris Wilson > > Cc: Tvrtko Ursulin > > --- > > tests/i915/gem_c

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Cover all engines for nohangcheck

On 04/02/2020 15:24, Chris Wilson wrote: No engine can be missed when verifying that a rogue user cannot cause a denial-of-service with nohangcheck. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/i915/gem_ctx_exec.c | 35 +-- 1 file changed, 29 in

[Intel-gfx] [PATCH] drm/i915: Fix the docs for intel_set_cdclk_post_plane_update()

From: Ville Syrjälä s/before/after/ again after accidentally changing it the other way in commit 5604e9ceaed5 ("drm/i915: Simplify intel_set_cdclk_{pre,post}_plane_update() calling convention") Cc: José Roberto de Souza Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_cdclk

Re: [Intel-gfx] [PATCH] drm/i915: split out display debugfs to a separate file

On Tue, Feb 04, 2020 at 05:18:10PM +0200, Jani Nikula wrote: > The i915_debugfs.c has grown more than a little unwieldy. Split out the > display related debugfs code to a file of its own under display/, > initialized with a separate call. No functional changes. > > Signed-off-by: Jani Nikula > --

[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Cover all engines for nohangcheck

No engine can be missed when verifying that a rogue user cannot cause a denial-of-service with nohangcheck. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/i915/gem_ctx_exec.c | 35 +-- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/tests

Re: [Intel-gfx] [PATCH 9/9] drm/i915: remove the now redundant i915_driver_modeset_* call layer

On Tue, Feb 04, 2020 at 03:42:28PM +0200, Jani Nikula wrote: > The i915_driver_modeset_*() functions have become irrelevant, and the > extra layer can be removed. > > Cc: Ville Syrjälä > Signed-off-by: Jani Nikula Ok, some extraneous layers scraped off. Good. Reviewed-by: Ville Syrjälä > ---

Re: [Intel-gfx] [PATCH 8/9] drm/i915: move more display related probe/remove stuff to display

On Tue, Feb 04, 2020 at 03:42:27PM +0200, Jani Nikula wrote: > With the intel_display_* prove/remove functions clarified, we can "probe", though I wouldn't mind functions that prove the display code/hw works ;) > continue with moving more related calls to the right layer: > > - drm_vblank_init()

Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Be explicit in handling the preallocated vma

Quoting Ville Syrjälä (2020-02-04 14:26:23) > On Tue, Feb 04, 2020 at 09:48:02AM +, Chris Wilson wrote: > > As only the display codes tries to pin its preallocated framebuffer into > > an exact location in the GGTT, remove the convenience function and make > > the pin management explicit in the

Re: [Intel-gfx] [PATCH 7/9] drm/i915: split intel_modeset_init() pre/post gem init

On Tue, Feb 04, 2020 at 03:42:26PM +0200, Jani Nikula wrote: > Turn current intel_modeset_init() to a pre-gem init function, and add a > new intel_modeset_init() function and move all post-gem modeset init > there, in the correct layer. Again, apart from possible failure paths, > no functional chan

[Intel-gfx] [PATCH 5/5] drm: Nerf drm_global_mutex BKL for good drivers

This catches the majority of drivers (unfortunately not if we take users into account, because all the big drivers have at least a lastclose hook). With the prep patches out of the way all drm state is fully protected and either prevents or can deal with the races from dropping the BKL around open

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