A masked register does not need rmw to update, and it is best not to use
such a sequence.
Reported-by: Ville Syrjälä
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 32 ++---
1 file changed, 21 insertions(+), 1
From: Daniele Ceraolo Spurio
Now that intel_engine_apply_workarounds is called on all gens, we can
use the engine workaround lists for pre-gen8 workarounds as well to be
consistent in the way we handle and dump the WAs.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Chris Wilson
Cc: Tvrtko Ursulin
From: Daniele Ceraolo Spurio
The workarounds are a common "feature" across gens and submission
mechanisms and we already call the other WA related functions from
common engine ones (_common), so it makes sense to
do the same with WA application. Medium-term, This will help us
reduce the duplicati
On Thu, 5 Jul 2018 at 11:21, Daniel Vetter wrote:
> When doing an atomic modeset with ALLOW_MODESET drivers are allowed to
> pull in arbitrary other resources, including CRTCs (e.g. when
> reconfiguring global resources).
>
> But in nonblocking mode userspace has then no idea this happened,
> whic
== Series Details ==
Series: disable drm_global_mutex for most drivers (rev3)
URL : https://patchwork.freedesktop.org/series/72711/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7847 -> Patchwork_16349
Summary
---
**
I am exploring the way of implementing the pipe writeback feature in i915 and
would like to get early feedback on design.
We have a Wireless display(WD) transcoder which can be used for capturing
display pipe output to memory. It is generally intended for wireless display,
but can be used for othe
== Series Details ==
Series: disable drm_global_mutex for most drivers (rev3)
URL : https://patchwork.freedesktop.org/series/72711/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5b5c3976292b drm: Complain if drivers still use the ->load callback
-:48: WARNING:NO_AUTHOR_SIGN_OFF
We want to only take the BKL on crap drivers, but to know whether
we have a crap driver we first need to look it up. Split this shuffle
out from the main BKL-disabling patch, for more clarity. Historical
aside: When the kernel-wide BKL was removed, it was replaced by
drm_global_mutex within the sco
This catches the majority of drivers (unfortunately not if we take
users into account, because all the big drivers have at least a
lastclose hook).
With the prep patches out of the way all drm state is fully protected
and either prevents or can deal with the races from dropping the BKL
around open
== Series Details ==
Series: drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (rev3)
URL : https://patchwork.freedesktop.org/series/72747/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7847 -> Patchwork_16348
== Series Details ==
Series: Security mitigation for Intel Gen7/7.5 HWs
URL : https://patchwork.freedesktop.org/series/72799/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7847 -> Patchwork_16347
Summary
---
**WARNIN
== Series Details ==
Series: drm/i915/gt: Skip rmw for masked registers (rev3)
URL : https://patchwork.freedesktop.org/series/72776/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7847 -> Patchwork_16346
Summary
---
*
== Series Details ==
Series: Security mitigation for Intel Gen7/7.5 HWs
URL : https://patchwork.freedesktop.org/series/72799/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
07091ed6f557 drm/i915: Add mechanism to submit a context WA on ring submission
1c35be27250b drm/i915/gen7:
== Series Details ==
Series: series starting with [1/5] drm/i915/execlist: Mark up racy read of
execlists->pending[0]
URL : https://patchwork.freedesktop.org/series/72690/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16307_full
== Series Details ==
Series: series starting with [1/3] drm/i915/gt: Skip global serialisation of
clear_range for bxt vtd
URL : https://patchwork.freedesktop.org/series/72787/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7847 -> Patchwork_16345
==
== Series Details ==
Series: drm/i915: Fix preallocated barrier list append (rev2)
URL : https://patchwork.freedesktop.org/series/72750/
State : failure
== Summary ==
Applying: drm/i915: Fix preallocated barrier list append
Using index info to reconstruct a base tree...
M drivers/gpu/drm
== Series Details ==
Series: drm: Introduce struct drm_device based WARN* and use them in i915 (rev5)
URL : https://patchwork.freedesktop.org/series/72035/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16305_full
=
On Thu, 2020-01-30 at 16:18 -0800, Vivek Kasireddy wrote:
> On some platforms such as Elkhart Lake, although we may use DDI D
> to drive a connector, we have to use PHY A (Combo Phy PORT A) to
> detect the hotplug interrupts as per the spec because there is no
> one-to-one mapping between DDIs and
== Series Details ==
Series: drm/i915/gt: Rename i915_gem_restore_ggtt_mappings() for its new
placement
URL : https://patchwork.freedesktop.org/series/72786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7847 -> Patchwork_16343
On some platforms such as Elkhart Lake, although we may use DDI D
to drive a connector, we have to use PHY A (Combo Phy PORT A) to
detect the hotplug interrupts as per the spec because there is no
one-to-one mapping between DDIs and PHYs. Therefore, use the
function intel_port_to_phy() which contai
> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, January 30, 2020 12:43 PM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org; Ceraolo Spurio, Daniele
>
> Subject: Re: [PATCH] drm/i915/tgl: Implement Wa_1606931601
>
> On Wed, Jan 29, 2020 at 02:42:06PM -0800,
On Thu, 2020-01-30 at 19:16 +0200, Ville Syrjälä wrote:
> On Thu, Jan 16, 2020 at 05:58:36PM -0800, José Roberto de Souza
> wrote:
> > This is a eDP function and it will always returns true for non-eDP
> > ports.
> >
> > Signed-off-by: José Roberto de Souza
> > ---
> > drivers/gpu/drm/i915/displ
Intel ID: PSIRT-TA-201910-001
CVEID: CVE-2019-14615
Summary of Vulnerability
Insufficient control flow in certain data structures for some Intel(R)
Processors with Intel Processor Graphics may allow an unauthenticated
user to potentially enable information disclosure via l
From: Prathap Kumar Valsan
On gen7 and gen7.5 devices, there could be leftover data residuals in
EU/L3 from the retiring context. This patch introduces workaround to clear
that residual contexts, by submitting a batch buffer with dedicated HW
context to the GPU with ring allocation for each conte
From: Mika Kuoppala
This patch adds framework to submit an arbitrary batchbuffer on each
context switch to clear residual state for render engine on Gen7/7.5
devices.
The idea of always emitting the context and vm setup around each request
is primary to make reset recovery easy, and not require
On Mon, Jan 27, 2020 at 11:16:32AM +0200, Lionel Landwerlin wrote:
[snip]
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1323,7 +1323,12 @@ static int oa_get_render_ctx_id(struct
i915_perf_stream *stream)
case 12: {
stream->specific_ctx_id_mask
== Series Details ==
Series: drm/i915/selftests: Lock the drm_mm as we search
URL : https://patchwork.freedesktop.org/series/72685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16304_full
Summary
---
On Thu, 2020-01-30 at 14:43 -0800, Vivek Kasireddy wrote:
> On some platforms such as Elkhart Lake, although we may use DDI D
> to drive a connector, we have to use PHY A (Combo Phy PORT A) to
> detect the hotplug interrupts as per the spec because there is no
> one-to-one mapping between DDIs and
On some platforms such as Elkhart Lake, although we may use DDI D
to drive a connector, we have to use PHY A (Combo Phy PORT A) to
detect the hotplug interrupts as per the spec because there is no
one-to-one mapping between DDIs and PHYs. Therefore, use the
function intel_port_to_phy() which contai
A masked register does not need rmw to update, and it is best not to use
such a sequence.
Reported-by: Ville Syrjälä
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 32 ++---
1 file changed, 21 insertions(+), 1
== Series Details ==
Series: drm/i915/execlist: Mark up racy read of execlists->pending[0]
URL : https://patchwork.freedesktop.org/series/72681/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16303_full
Reviewed-by: Lyude Paul
I'll go ahead and push this now, thanks!
On Wed, 2020-01-29 at 15:24 -0800, José Roberto de Souza wrote:
> According to DP specification, DP_SINK_EVENT_NOTIFY is also a
> broadcast message but as this function only handles
> DP_CONNECTION_STATUS_NOTIFY I will only make th
Quoting Tvrtko Ursulin (2020-01-30 18:05:03)
>
> On 16/12/2019 13:09, Tvrtko Ursulin wrote:
> >
> > On 16/12/2019 12:40, Chris Wilson wrote:
> >> Quoting Tvrtko Ursulin (2019-12-16 12:07:00)
> >>> @@ -1389,6 +1415,9 @@ static void execlists_submit_ports(struct
> >>> intel_engine_cs *engine)
> >>
Quoting Tvrtko Ursulin (2020-01-30 20:56:23)
>
> On 30/01/2020 20:47, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-01-30 20:41:24)
> > Then I had a plan to add the pathological engines[] here.
>
> Will see later what you exactly mean.
for_each_gem_engine(ce, __context_engines_sta
Quoting Tvrtko Ursulin (2020-01-30 21:01:25)
> From: Tvrtko Ursulin
>
> Converts all per-engine tests into dynamic subtests and in the process:
>
> * Put back I915_EXEC_BSD legacy coverage.
> * Remove one added static engine list usage.
> * Compact code by driving two groups of the name/func
From: Tvrtko Ursulin
Converts all per-engine tests into dynamic subtests and in the process:
* Put back I915_EXEC_BSD legacy coverage.
* Remove one added static engine list usage.
* Compact code by driving two groups of the name/func table.
v2:
* Convert smoketest to proper all engines.
v3
On 30/01/2020 20:56, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-01-30 20:52:56)
@@ -772,91 +787,64 @@ igt_main
igt_allow_hang(i915, 0, 0);
}
- igt_subtest("idempotent")
- test_idempotent(i915);
-
- igt_subtest("clone")
-
On 30/01/2020 20:47, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-01-30 20:41:24)
From: Tvrtko Ursulin
Converts all per-engine tests into dynamic subtests and in the process:
* Put back I915_EXEC_BSD legacy coverage.
* Remove one added static engine list usage.
* Compact code by d
Quoting Tvrtko Ursulin (2020-01-30 20:52:56)
> @@ -772,91 +787,64 @@ igt_main
> igt_allow_hang(i915, 0, 0);
> }
>
> - igt_subtest("idempotent")
> - test_idempotent(i915);
> -
> - igt_subtest("clone")
> - test_clone(i915);
> -
> -
From: Tvrtko Ursulin
Converts all per-engine tests into dynamic subtests and in the process:
* Put back I915_EXEC_BSD legacy coverage.
* Remove one added static engine list usage.
* Compact code by driving two groups of the name/func table.
v2:
* Convert smoketest to proper all engines.
Si
Quoting Tvrtko Ursulin (2020-01-30 20:44:57)
>
> On 30/01/2020 20:41, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > - igt_subtest("smoketest")
> > - smoketest(i915);
>
> I also moved this one to before the default context is configured with
> engine map, since it use
Quoting Tvrtko Ursulin (2020-01-30 20:41:24)
> From: Tvrtko Ursulin
>
> Converts all per-engine tests into dynamic subtests and in the process:
>
> * Put back I915_EXEC_BSD legacy coverage.
> * Remove one added static engine list usage.
> * Compact code by driving two groups of the name/func
== Series Details ==
Series: drm/i915/gem: Require per-engine reset support for non-persistent
contexts (rev2)
URL : https://patchwork.freedesktop.org/series/72785/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7845 -> Patchwork_16342
=
On 30/01/2020 20:41, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Converts all per-engine tests into dynamic subtests and in the process:
* Put back I915_EXEC_BSD legacy coverage.
* Remove one added static engine list usage.
* Compact code by driving two groups of the name/func table.
S
On Wed, Jan 29, 2020 at 02:42:06PM -0800, Anusha Srivatsa wrote:
> Disable Inter and intra Read Suppression (bit 15) and
> Early Read and Src Swap (bit 14) by setting the chicken
> register.
>
> BSpec: 46045,52890
>
> v2: Follow the Bspec implementation for the WA.
> v3: Have 2 separate defines f
From: Tvrtko Ursulin
Converts all per-engine tests into dynamic subtests and in the process:
* Put back I915_EXEC_BSD legacy coverage.
* Remove one added static engine list usage.
* Compact code by driving two groups of the name/func table.
Signed-off-by: Tvrtko Ursulin
Cc: Bommu Krishnaiah
== Series Details ==
Series: series starting with [1/3] drm/i915: move pipe, pch and vblank enable
to encoders on DDI platforms
URL : https://patchwork.freedesktop.org/series/72678/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16302_full
==
On Thu, 2020-01-30 at 10:49 +, Lisovskiy, Stanislav wrote:
> On Wed, 2020-01-29 at 15:24 -0800, José Roberto de Souza wrote:
> > According to DP specification, DP_SINK_EVENT_NOTIFY is also a
> > broadcast message but as this function only handles
> > DP_CONNECTION_STATUS_NOTIFY I will only make
== Series Details ==
Series: drm/i915/gem: Tighten checks and acquiring the mmap object
URL : https://patchwork.freedesktop.org/series/72777/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7845 -> Patchwork_16340
Summary
---
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Skip global serialisation of
clear_range for bxt vtd (rev3)
URL : https://patchwork.freedesktop.org/series/72766/
State : failure
== Summary ==
Applying: drm/i915/gt: Skip global serialisation of clear_range for bxt vtd
Appl
On Thu, 2020-01-30 at 19:25 +0200, Ville Syrjälä wrote:
> On Thu, Jan 16, 2020 at 05:58:37PM -0800, José Roberto de Souza
> wrote:
> > TGL timeouts when disabling MST transcoder and fifo underruns over
> > MST
> > transcoders are fixed when setting TRANS_DDI_MODE_SELECT to 0(HDMI
> > mode) during t
On Thu, 30 Jan 2020 at 18:17, Chris Wilson wrote:
>
> On Braswell and Broxton (also known as Valleyview and Apollolake), we
> need to serialise updates of the GGTT using the big stop_machine()
> hammer. This has the side effect of appearing to lockdep as a possible
> reclaim (since it uses the cpu
On Thu, Jan 30, 2020 at 11:20:00AM -0800, Daniele Ceraolo Spurio wrote:
>
>
> On 1/30/20 6:08 AM, Chris Wilson wrote:
> > Quoting Ville Syrjälä (2020-01-30 13:58:13)
> >> On Thu, Jan 30, 2020 at 01:37:49PM +, Chris Wilson wrote:
> >>> Quoting Patchwork (2020-01-30 06:49:28)
> Possib
On 1/30/20 6:08 AM, Chris Wilson wrote:
Quoting Ville Syrjälä (2020-01-30 13:58:13)
On Thu, Jan 30, 2020 at 01:37:49PM +, Chris Wilson wrote:
Quoting Patchwork (2020-01-30 06:49:28)
Possible regressions
* igt@i915_selftest@live_active:
- fi-bwr-2160:[PASS][1] -
== Series Details ==
Series: drm/i915/hdcp: move update pipe code to hdcp
URL : https://patchwork.freedesktop.org/series/72679/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16301_full
Summary
---
On Thu, 30 Jan 2020 at 18:17, Chris Wilson wrote:
>
> The i915_ggtt now sits beneath gt/ outside of the auspices of gem/ and
> should be given a fresh name to reflect that. We also want to give it a
> name that reflects its role in the system suspend/resume, with the
> intention of pulling togethe
A masked register does not need rmw to update, and it is best not to use
such a sequence.
Reported-by: Ville Syrjälä
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 32 ++---
1 file changed, 21 insertions(+), 1
== Series Details ==
Series: drm/i915/gt: Skip rmw for masked registers
URL : https://patchwork.freedesktop.org/series/72776/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7844 -> Patchwork_16339
Summary
---
**FAILUR
On Braswell and Broxton (also known as Valleyview and Apollolake), we
need to serialise updates of the GGTT using the big stop_machine()
hammer. This has the side effect of appearing to lockdep as a possible
reclaim (since it uses the cpuhp mutex and that is tainted by per-cpu
allocations). However
VT'd on Broxton and on Braswell require serialisation of GGTT updates.
However, it seems to only be required for insertion, so drop the
complication and heavyweight stop_machine() for clears. The range will
be serialised again before use.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
--
The i915_ggtt now sits beneath gt/ outside of the auspices of gem/ and
should be given a fresh name to reflect that. We also want to give it a
name that reflects its role in the system suspend/resume, with the
intention of pulling together all the GGTT operations (e.g. restoring
the fence registers
== Series Details ==
Series: series starting with [1/2] drm/i915: extract engine WA programming to
common resume function (rev2)
URL : https://patchwork.freedesktop.org/series/72753/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7844 -> Patchwork_16338
===
On Wed, 2020-01-29 at 20:20 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Our DSB support is borked. The DSB seems to get stuck and we just
> get:
> [drm:intel_dsb_commit [i915]] DSB execution started - head 0xa8c000,
> tail 0x10c0
> [drm:intel_dsb_commit [i915]] *ERROR* Timed out waiting
On Thu, 30 Jan 2020 at 17:17, Chris Wilson wrote:
>
> The i915_ggtt now sits beneath gt/ outside of the auspices of gem/ and
> should be given a fresh name to reflect that. We also want to give it a
> name that reflects its role in the system suspend/resume, with the
> intention of pulling togethe
On Wed, 2020-01-29 at 20:20 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We may want to not use the DSB even if the platform has one.
> So replace the HAS_DSB check in the _put() with a cmd_buf check
> that will work in either case.
Reviewed-by: José Roberto de Souza
>
> Signed-off-b
On 16/12/2019 13:09, Tvrtko Ursulin wrote:
On 16/12/2019 12:40, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-12-16 12:07:00)
@@ -1389,6 +1415,9 @@ static void execlists_submit_ports(struct
intel_engine_cs *engine)
write_desc(execlists,
rq ? ex
== Series Details ==
Series: drm/i915/fbc: __intel_fbc_cleanup_cfb() may be called multiple times
URL : https://patchwork.freedesktop.org/series/72775/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7844 -> Patchwork_16337
S
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: Nuke pre-production GLK HDMI
w/a 1139
URL : https://patchwork.freedesktop.org/series/72675/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16300_full
===
On Thu, Jan 16, 2020 at 05:58:37PM -0800, José Roberto de Souza wrote:
> TGL timeouts when disabling MST transcoder and fifo underruns over MST
> transcoders are fixed when setting TRANS_DDI_MODE_SELECT to 0(HDMI
> mode) during the disable sequence.
>
> Although BSpec disable sequence don't requir
On Thu, Jan 16, 2020 at 05:58:36PM -0800, José Roberto de Souza wrote:
> This is a eDP function and it will always returns true for non-eDP
> ports.
>
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/d
The i915_ggtt now sits beneath gt/ outside of the auspices of gem/ and
should be given a fresh name to reflect that. We also want to give it a
name that reflects its role in the system suspend/resume, with the
intention of pulling together all the GGTT operations (e.g. restoring
the fence registers
To enable non-persistent contexts, we require a means of cancelling any
inflight work from that context. This is first done "gracefully" by
using preemption to kick the active context off the engine, and then
forcefully by resetting the engine if it is active. If we are unable to
reset the engine t
To enable non-persistent contexts, we require a means of cancelling any
inflight work from that context. This is first done "gracefully" by
using preemption to kick the active context off the engine, and then
forcefully by resetting the engine if it is active. If we are unable to
reset the engine t
>-Original Message-
>From: Intel-gfx On Behalf Of Chris
>Wilson
>Sent: Thursday, January 30, 2020 10:21 AM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH] drm/i915: Use the async worker to avoid reclaim
>tainting the ggtt->mutex
>
>On Braswell and Broxton (also known as
On 10/01/2020 13:42, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-01-10 13:30:46)
From: Tvrtko Ursulin
Now that contexts keep their parent client reference counted, we can
remove separate struct pid reference owned by contexts in favour of the
one already held by the client.
Signed-off-
Hi Antonio,
On Tuesday, January 28, 2020 1:59:00 AM CET Antonio Argenziano wrote:
>
> On 22/01/20 08:26, Janusz Krzysztofik wrote:
> > Working with a userptr GEM object backed by any type of mapping to
> > another GEM object, not only GTT mapping currently examined bu the
> > test, may cause a cu
== Series Details ==
Series: drm/i915/debugfs: remove VBT data about DRRS
URL : https://patchwork.freedesktop.org/series/72672/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16299_full
Summary
---
On Thu, 30 Jan 2020 at 14:40, Chris Wilson wrote:
>
> Make sure we hold the rcu lock as we acquire the rcu protected reference
> of the object when looking it up from the associated mmap vma.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/1083
> Fixes: cc662126b413 ("drm/i915: Introdu
== Series Details ==
Series: series starting with [1/9] drm/i915/dsb: Replace HAS_DSB check with
dsb->cmd_buf check (rev2)
URL : https://patchwork.freedesktop.org/series/72737/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7844 -> Patchwork_16336
=
On Thu, Jan 30, 2020 at 03:35:20PM +0200, Ville Syrjälä wrote:
> On Thu, Jan 30, 2020 at 05:32:01PM +0530, Anshuman Gupta wrote:
> > On 2020-01-23 at 15:40:57 +0200, Ville Syrjälä wrote:
> > > On Thu, Jan 23, 2020 at 06:56:55PM +0530, Anshuman Gupta wrote:
> > > > we can't have (pipe == crtc->index
On Braswell and Broxton (also known as Valleyview and Apollolake), we
need to serialise updates of the GGTT using the big stop_machine()
hammer. This has the side effect of appearing to lockdep as a possible
reclaim (since it uses the cpuhp mutex and that is tainted by per-cpu
allocations). However
== Series Details ==
Series: series starting with [1/9] drm/i915/dsb: Replace HAS_DSB check with
dsb->cmd_buf check (rev2)
URL : https://patchwork.freedesktop.org/series/72737/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
770bb0a72167 drm/i915/dsb: Replace HAS_DSB check with
== Series Details ==
Series: drm/i915: Serialise the bound vma prior to suspend
URL : https://patchwork.freedesktop.org/series/72773/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7844 -> Patchwork_16335
Summary
---
Quoting Tvrtko Ursulin (2020-01-30 14:48:47)
>
> On 30/01/2020 14:21, Chris Wilson wrote:
> > A masked register does not need rmw to update, and it is best not to use
> > such a sequence.
> >
> > Reported-by: Ville Syrjälä
> > Signed-off-by: Chris Wilson
> > Cc: Ville Syrjälä
> > Cc: Tvrtko Ur
On 30/01/2020 14:21, Chris Wilson wrote:
A masked register does not need rmw to update, and it is best not to use
such a sequence.
Reported-by: Ville Syrjälä
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 29 +
Make sure we hold the rcu lock as we acquire the rcu protected reference
of the object when looking it up from the associated mmap vma.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1083
Fixes: cc662126b413 ("drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET")
Signed-off-by: Chris Wilson
Cc:
== Series Details ==
Series: drm/i915/trace: i915_request.prio is a signed value
URL : https://patchwork.freedesktop.org/series/72671/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16298_full
Summary
A masked register does not need rmw to update, and it is best not to use
such a sequence.
Reported-by: Ville Syrjälä
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 29 ++---
1 file changed, 19 insertions(+), 1
On Tue, 28 Jan 2020, Wambui Karuga wrote:
> This series continues the conversion to the new drm logging macros
> focused on the drm/i915/gt folder. This was done both manually and using
> coccinelle.
Thanks for the patches, for now pushed only the non-contentions ones
that don't convert DRM_DEBUG
Quoting Ville Syrjälä (2020-01-30 13:58:13)
> On Thu, Jan 30, 2020 at 01:37:49PM +, Chris Wilson wrote:
> > Quoting Patchwork (2020-01-30 06:49:28)
> > > Possible regressions
> > >
> > > * igt@i915_selftest@live_active:
> > > - fi-bwr-2160:[PASS][1] -> [DMESG-WARN][2] +
On Thu, Jan 30, 2020 at 01:51:36PM +, Chris Wilson wrote:
> Avoid releasing the same stolen nodes causing a use-after-free and/or
> explosions as the self-checks fail, as __intel_fbc_cleanup_cfb() may be
> called multiple times during module unload.
>
> Signed-off-by: Chris Wilson
> Cc: Ville
On Thu, Jan 30, 2020 at 01:37:49PM +, Chris Wilson wrote:
> Quoting Patchwork (2020-01-30 06:49:28)
> > Possible regressions
> >
> > * igt@i915_selftest@live_active:
> > - fi-bwr-2160:[PASS][1] -> [DMESG-WARN][2] +12 similar issues
> >[1]:
> > https://intel-gfx-ci.
Avoid releasing the same stolen nodes causing a use-after-free and/or
explosions as the self-checks fail, as __intel_fbc_cleanup_cfb() may be
called multiple times during module unload.
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 6 --
1 file
Quoting Patchwork (2020-01-30 06:49:28)
> Possible regressions
>
> * igt@i915_selftest@live_active:
> - fi-bwr-2160:[PASS][1] -> [DMESG-WARN][2] +12 similar issues
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7840/fi-bwr-2160/igt@i915_selftest@live_active.ht
On Thu, Jan 30, 2020 at 05:32:01PM +0530, Anshuman Gupta wrote:
> On 2020-01-23 at 15:40:57 +0200, Ville Syrjälä wrote:
> > On Thu, Jan 23, 2020 at 06:56:55PM +0530, Anshuman Gupta wrote:
> > > we can't have (pipe == crtc->index) assumption in
> > > driver in order to support 3 non-contiguous
> > >
== Series Details ==
Series: drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
URL : https://patchwork.freedesktop.org/series/72770/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7842 -> Patchwork_16334
== Series Details ==
Series: drm/i915/gt: Hook up CS_MASTER_ERROR_INTERRUPT
URL : https://patchwork.freedesktop.org/series/72669/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7833_full -> Patchwork_16297_full
Summary
-
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915/tgl:
WaEnablePreemptionGranularityControlByUMD
URL : https://patchwork.freedesktop.org/series/72769/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7842 -> Patchwork_16333
Make sure that all the vma are bound and PTE writes are finished before
we zap them for suspend.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/d
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Skip global serialisation of
clear_range for bxt vtd (rev2)
URL : https://patchwork.freedesktop.org/series/72766/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7842 -> Patchwork_16332
===
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