Re: [Intel-gfx] [PATCH v2 04/15] drm/i915: Extract framebufer CCS offset checks into a function

On Fri, 2019-12-20 at 12:49 +0200, Imre Deak wrote: > From: Dhinakaran Pandiyan > > intel_fill_fb_info() has grown quite large and wrapping the offset > checks > into a separate function makes the loop a bit easier to follow. > > v2: Skip the check for non-CCS planes. (Mika) > > Cc: Ville Syrjä

Re: [Intel-gfx] [4/5] drm/i915: Auto detect DPCD backlight support by default

On 11/22/19 6:16 PM, Lyude Paul wrote: Turns out we actually already have some companies, such as Lenovo, shipping machines with AMOLED screens that don't allow controlling the backlight through the usual PWM interface and only allow controlling it through the standard EDP DPCD interface. One exa

Re: [Intel-gfx] [3/5] drm/i915: Fix DPCD register order in intel_dp_aux_enable_backlight()

On 11/22/19 6:16 PM, Lyude Paul wrote: For eDP panels, it appears it's expected that so long as the panel is in DPCD control mode that the brightness value is never set to 0. Instead, if the desired effect is to set the panel's backlight to 0 we're expected to simply turn off the backlight throug

Re: [Intel-gfx] [v2] drm/i915: Assume 100% brightness when not in DPCD control mode

On 12/3/19 5:42 PM, Lyude Paul wrote: Currently we always determine the initial panel brightness level by simply reading the value from DP_EDP_BACKLIGHT_BRIGHTNESS_MSB/LSB. This seems wrong though, because if the panel is not currently in DPCD control mode there's not really any reason why there

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/3] drm/i915: Move the code to populate ACPI device ID into intel_acpi

== Series Details == Series: series starting with [v5,1/3] drm/i915: Move the code to populate ACPI device ID into intel_acpi URL : https://patchwork.freedesktop.org/series/71226/ State : success == Summary == CI Bug Log - changes from CI_DRM_7616_full -> Patchwork_15864_full

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects

== Series Details == Series: series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects URL : https://patchwork.freedesktop.org/series/71283/ State : success == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15892

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects

== Series Details == Series: series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects URL : https://patchwork.freedesktop.org/series/71283/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Introduce remap_

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects

== Series Details == Series: series starting with [1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects URL : https://patchwork.freedesktop.org/series/71283/ State : warning == Summary == $ dim checkpatch origin/drm-tip baed6d9ecce4 drm/i915: Introduce remap_io_sg() to pre

[Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add selftest for memory region PF handling

Instead of testing individually our new fault handlers, iterate over all memory regions and test all from one interface. Signed-off-by: Abdiel Janulgue Cc: Matthew Auld Cc: Chris Wilson Cc: Joonas Lahtinen --- .../drm/i915/gem/selftests/i915_gem_mman.c| 233 -- 1 file chan

[Intel-gfx] [PATCH 2/3] drm/i915: Add lmem fault handler

Fault handler to handle missing pages for lmem objects. v6: Use new remap_io_sg interface for noncontiguous fault handling Signed-off-by: Abdiel Janulgue Signed-off-by: Matthew Auld Cc: Chris Wilson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 1 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH 1/3] drm/i915: Introduce remap_io_sg() to prefault discontiguous objects

Provide a way to set the PTE within apply_page_range for discontiguous objects in addition to the existing method of just incrementing the pfn for a page range. Signed-off-by: Abdiel Janulgue Cc: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915/i915_mm.c | 67

Re: [Intel-gfx] [PATCH 1/8] iommu/vt-d: clean up 32bit si_domain assignment

Hi, On 12/21/19 11:03 PM, Tom Murphy wrote: @@ -5618,9 +5583,13 @@ static int intel_iommu_add_device(struct device *dev) struct iommu_domain *domain; struct intel_iommu *iommu; struct iommu_group *group; + u64 dma_mask = *dev->dma_mask; u8 bus, devfn;

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v6,rebased,1/7] drm/i915/display: Share intel_connector_needs_modeset()

== Series Details == Series: series starting with [v6,rebased,1/7] drm/i915/display: Share intel_connector_needs_modeset() URL : https://patchwork.freedesktop.org/series/71280/ State : success == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15891 =

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Introduce a vma.kref

On Sun, Dec 22, 2019 at 09:02:55PM +, Chris Wilson wrote: > Start introducing a kref on i915_vma in order to protect the vma unbind > from a parallel destruction. Later, we will use the refcount to manage > all access. > > Signed-off-by: Chris Wilson > Cc: Imre Deak The patchset got rid of

[Intel-gfx] [PATCH v6 rebased 3/7] drm/i915/display: Always enables MST master pipe first

Due to DDB overlaps the pipe enabling sequence is not always crescent. As the previous patch selects the smallest pipe/transcoder in the MST stream to be master and it needs to be enabled first, this changes were needed to guarantee that. So first lets enable all pipes that do not need a fullmodes

[Intel-gfx] [PATCH v6 rebased 4/7] drm/i915/dp: Fix MST disable sequence

The disable sequence after wait for transcoder off was not correctly implemented. The MST disable sequence is basically the same for HSW, SKL, ICL and TGL, with just minor changes for TGL. With this last patch we finally fixed the hotplugs triggered by MST sinks during the disable/enable sequence,

[Intel-gfx] [PATCH v6 rebased 2/7] drm/i915/tgl: Select master transcoder for MST stream

On TGL the blending of all the streams have moved from DDI to transcoder, so now every transcoder working over the same MST port must send its stream to a master transcoder and master will send to DDI respecting the time slots. So here adding all the CRTCs that shares the same MST stream if needed

[Intel-gfx] [PATCH v6 rebased 5/7] drm/i915/display: Prepare for fastset external dependencies check

MST and port sync have master and slaves pipes and it brings dependencies between pipes to allow fastset. For example if only MST master needs a modeset all of its slaves also needs to do a modeset. This patch adds the base for external dependencies check, the MST and port sync bits will be added

[Intel-gfx] [PATCH v6 rebased 1/7] drm/i915/display: Share intel_connector_needs_modeset()

intel_connector_needs_modeset() will be used outside of intel_display.c in a future patch so it would only be necessary to remove the state and add the prototype to the header file. But while at it, I simplified the arguments and moved it to a better place intel_atomic.c. No behavior changes inte

[Intel-gfx] [PATCH v6 rebased 7/7] drm/i915/display: Add comment to a function that probably can be removed

This function is only called from port sync and it is identical to what will be executed again in intel_update_crtc() over port sync pipes. If it is really necessary at least it deserves a better name and a comment, leaving it to people working on port sync. Cc: Ville Syrjälä Cc: Maarten Lankhors

[Intel-gfx] [PATCH v6 rebased 6/7] drm/i915/mst: Force modeset on MST slaves when master needs a modeset

MST master can not be disabled while it have attached MST slaves, so it is necessary force a modeset in all of its slaves. v3: - moved handling to intel_atomic_check() this way is guarantee that all pipes will have its state computed v4: - added a function to return if MST master neeeds modeset t

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Mark the GEM context link as RCU protected

== Series Details == Series: drm/i915: Mark the GEM context link as RCU protected URL : https://patchwork.freedesktop.org/series/71278/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15890 Summary ---

[Intel-gfx] [PATCH] drm/i915: Mark the GEM context link as RCU protected

The only protection for intel_context.gem_cotext is granted by RCU, so annotate it as a rcu protected pointer and carefully dereference it in the few occasions we need to use it. Fixes: 9f3ccd40acf4 ("drm/i915: Drop GEM context as a direct link from i915_request") Signed-off-by: Chris Wilson Cc:

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement (rev6)

== Series Details == Series: drm/i915/gt: Tidy up checking active timelines during retirement (rev6) URL : https://patchwork.freedesktop.org/series/71266/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15889

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Add a simple is-bound check before unbinding

== Series Details == Series: series starting with [1/3] drm/i915: Add a simple is-bound check before unbinding URL : https://patchwork.freedesktop.org/series/71276/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15888 =

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add a simple is-bound check before unbinding

== Series Details == Series: series starting with [1/3] drm/i915: Add a simple is-bound check before unbinding URL : https://patchwork.freedesktop.org/series/71276/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6121b0cc88da drm/i915: Add a simple is-bound check before unbindin

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915: Avoid cross-contanimation of intel_wakeref.work lockdep

== Series Details == Series: series starting with [CI,1/2] drm/i915: Avoid cross-contanimation of intel_wakeref.work lockdep URL : https://patchwork.freedesktop.org/series/71275/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15887 ===

[Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement

Use the status of the timeline request list as we retire it to determine if the timeline is still active. Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 26 ++--- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/driver

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement (rev5)

== Series Details == Series: drm/i915/gt: Tidy up checking active timelines during retirement (rev5) URL : https://patchwork.freedesktop.org/series/71266/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15886

[Intel-gfx] [PATCH 2/3] drm/i915: Introduce a vma.kref

Start introducing a kref on i915_vma in order to protect the vma unbind from a parallel destruction. Later, we will use the refcount to manage all access. Signed-off-by: Chris Wilson Cc: Imre Deak --- drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 +- .../gpu/drm/i915/gem/selftests/huge_pag

[Intel-gfx] [PATCH 1/3] drm/i915: Add a simple is-bound check before unbinding

Only acquire the various atomic references required to unbind the vma if we do need to unbind the vma. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i9

[Intel-gfx] [PATCH 3/3] drm/i915: Replace vma parking with a clock aging algorithm

We cache the user's vma for a brief period of time after they close them so that if they are immediately reopened we avoid having to unbind and rebind them. This happens quite frequently for display servers which only keep a client's frame open for as long as they are copying from it, and so they o

[Intel-gfx] [CI 1/2] drm/i915: Avoid cross-contanimation of intel_wakeref.work lockdep

Separate out the lockclass for the embedded work for intel_wakeref to avoid cross-contamination between different wakerefs. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_wakeref.c | 6 -- drivers/gpu/drm/i915/intel_wakeref.h | 8 +--- 2 files changed, 9 insertions(+), 5 dele

[Intel-gfx] [CI 2/2] drm/i915/gt: Tidy up checking active timelines during retirement

Use the status of the timeline request list as we retire it to determine if the timeline is still active. Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement (rev4)

== Series Details == Series: drm/i915/gt: Tidy up checking active timelines during retirement (rev4) URL : https://patchwork.freedesktop.org/series/71266/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15885

[Intel-gfx] ✓ Fi.CI.IGT: success for Prefer acronym for prefixes

== Series Details == Series: Prefer acronym for prefixes URL : https://patchwork.freedesktop.org/series/71224/ State : success == Summary == CI Bug Log - changes from CI_DRM_7615_full -> Patchwork_15863_full Summary --- **SUCCESS**

[Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement

Use the status of the timeline request list as we retire it to determine if the timeline is still active. Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement (rev3)

== Series Details == Series: drm/i915/gt: Tidy up checking active timelines during retirement (rev3) URL : https://patchwork.freedesktop.org/series/71266/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15884

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/lmem: debugfs for LMEM details (rev3)

== Series Details == Series: drm/i915/lmem: debugfs for LMEM details (rev3) URL : https://patchwork.freedesktop.org/series/71211/ State : success == Summary == CI Bug Log - changes from CI_DRM_7615_full -> Patchwork_15862_full Summary -

Re: [Intel-gfx] [RFC v2 05/12] drm/i915/svm: Page table mirroring support

On Fri, Dec 20, 2019 at 01:45:33PM +, Jason Gunthorpe wrote: On Wed, Dec 18, 2019 at 02:41:47PM -0800, Niranjana Vishwanathapura wrote: > > +static u32 i915_svm_build_sg(struct i915_address_space *vm, > > + struct hmm_range *range, > > + stru

[Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement

Use the status of the timeline request list as we retire it to determine if the timeline is still active. Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/d

[Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement

Use the status of the timeline request list as we retire it to determine if the timeline is still active. Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement (rev2)

== Series Details == Series: drm/i915/gt: Tidy up checking active timelines during retirement (rev2) URL : https://patchwork.freedesktop.org/series/71266/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15883

[Intel-gfx] [CI] drm/i915/gt: Tidy up checking active timelines during retirement

Use the status of the timeline request list as we retire it to determine if the timeline is still active. Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Tidy up checking active timelines during retirement

== Series Details == Series: drm/i915/gt: Tidy up checking active timelines during retirement URL : https://patchwork.freedesktop.org/series/71266/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7623 -> Patchwork_15882 Summa

[Intel-gfx] [PATCH] drm/i915/gt: Tidy up checking active timelines during retirement

Use the status of the timeline request list as we retire it to determine if the timeline is still active. Signed-off-by: Chris Wilson Cc: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i91

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume()

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume() URL : https://patchwork.freedesktop.org/series/71265/ State : success == Summary == CI Bug Log - changes from CI_DRM_7622 -> Patchwork_15881 =

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume()

== Series Details == Series: series starting with [CI,1/3] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume() URL : https://patchwork.freedesktop.org/series/71265/ State : warning == Summary == $ dim checkpatch origin/drm-tip cb4e6cb28b27 drm/i915/gt: Pull intel_gt_init_hw() into int

[Intel-gfx] [CI 3/3] drm/i915/gt: Move pm debug files into a gt aware debugfs

From: Andi Shyti The GT system is becoming more and more a stand-alone system in i915 and it's fair to assign it its own debugfs directory. rc6, rps and llc debugfs files are gt related, move them into the gt debugfs directory. Signed-off-by: Andi Shyti Reviewed-by: Chris Wilson Signed-off-by

[Intel-gfx] [CI 1/3] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume()

Since intel_gt_resume() is always immediately proceeded by init_hw, pull the call into intel_gt_resume, where we have the rpm and fw already held. Signed-off-by: Chris Wilson Cc: Andi Shyti Reviewed-by: Andi Shyti --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 20 +--- drivers/gp

[Intel-gfx] [CI 2/3] drm/i915/gt: Merge engine init/setup loops

Now that we don't need to create GEM contexts in the middle of engine construction, we can pull the engine init/setup loops together. Signed-off-by: Chris Wilson Cc: Andi Shyti Reviewed-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_engine.h| 2 - drivers/gpu/drm/i915/gt/intel_engi

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v5,1/7] drm/i915: Introduce intel_crtc_state_alloc()

== Series Details == Series: series starting with [v5,1/7] drm/i915: Introduce intel_crtc_state_alloc() URL : https://patchwork.freedesktop.org/series/71221/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7614_full -> Patchwork_15861_full ==

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [CI,1/2] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume()

== Series Details == Series: series starting with [CI,1/2] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume() URL : https://patchwork.freedesktop.org/series/71263/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objt

[Intel-gfx] [CI 1/2] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume()

Since intel_gt_resume() is always immediately proceeded by init_hw, pull the call into intel_gt_resume, where we have the rpm and fw already held. Signed-off-by: Chris Wilson Cc: Andi Shyti Reviewed-by: Andi Shyti --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 20 +--- drivers/gp

[Intel-gfx] [CI 2/2] drm/i915/gt: Merge engine init/setup loops

Now that we don't need to create GEM contexts in the middle of engine construction, we can pull the engine init/setup loops together. Signed-off-by: Chris Wilson Cc: Andi Shyti Reviewed-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_engine.h| 2 - drivers/gpu/drm/i915/gt/intel_engi

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Pull GT initialisation under intel_gt_init()

== Series Details == Series: drm/i915/gt: Pull GT initialisation under intel_gt_init() URL : https://patchwork.freedesktop.org/series/71262/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7621 -> Patchwork_15879 Summary

[Intel-gfx] [CI] drm/i915/gt: Pull GT initialisation under intel_gt_init()

Begin pulling the GT setup underneath a single GT umbrella; let intel_gt take ownership of its engines! As hinted, the complication is the lifetime of the probed engine versus the active lifetime of the GT backends. We need to detect the engine layout early and keep it until the end so that we can