[Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce CAP_SYS_PERFMON to secure system performance monitoring and observability

2019-12-15 Thread Patchwork
== Series Details == Series: Introduce CAP_SYS_PERFMON to secure system performance monitoring and observability URL : https://patchwork.freedesktop.org/series/70961/ State : failure == Summary == Applying: capabilities: introduce CAP_SYS_PERFMON to kernel and user space Applying: perf/core:

[Intel-gfx] [PATCH v2 6/7] powerpc/perf: open access for CAP_SYS_PERFMON privileged process

2019-12-15 Thread Alexey Budankov
Open access to monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to the monitoring remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure monitoring is discouraged with respect to CAP_SYS_PERFMON capability. Signed-off-

[Intel-gfx] [PATCH v2 7/7] parisc/perf: open access for CAP_SYS_PERFMON privileged process

2019-12-15 Thread Alexey Budankov
Open access to monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to the monitoring remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure monitoring is discouraged with respect to CAP_SYS_PERFMON capability. Signed-off-

[Intel-gfx] [PATCH v2 3/7] perf tool: extend Perf tool with CAP_SYS_PERFMON capability support

2019-12-15 Thread Alexey Budankov
Extend error messages to mention CAP_SYS_PERFMON capability as an option to substitute CAP_SYS_ADMIN capability for secure system performance monitoring and observability operations [1]. Make perf_event_paranoid_check() to be aware of CAP_SYS_PERFMON capability. [1] https://www.kernel.org/doc/ht

[Intel-gfx] [PATCH v2 5/7] trace/bpf_trace: open access for CAP_SYS_PERFMON privileged process

2019-12-15 Thread Alexey Budankov
Open access to bpf_trace monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to bpf_trace monitoring remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure bpf_trace monitoring is discouraged with respect to CAP_SYS_PERFMO

[Intel-gfx] [PATCH v2 4/7] drm/i915/perf: open access for CAP_SYS_PERFMON privileged process

2019-12-15 Thread Alexey Budankov
Open access to i915_perf monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to i915_perf subsystem remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure i915_perf monitoring is discouraged with respect to CAP_SYS_PERFMON

[Intel-gfx] [PATCH v2 2/7] perf/core: open access for CAP_SYS_PERFMON privileged process

2019-12-15 Thread Alexey Budankov
Open access to perf_events monitoring for CAP_SYS_PERFMON privileged processes. For backward compatibility reasons access to perf_events subsystem remains open for CAP_SYS_ADMIN privileged processes but CAP_SYS_ADMIN usage for secure perf_events monitoring is discouraged with respect to CAP_SYS_P

[Intel-gfx] [PATCH v2 1/7] capabilities: introduce CAP_SYS_PERFMON to kernel and user space

2019-12-15 Thread Alexey Budankov
Introduce CAP_SYS_PERFMON capability devoted to secure system performance monitoring and observability operations so that CAP_SYS_PERFMON would assist CAP_SYS_ADMIN capability in its governing role for perf_events, i915_perf and other performance monitoring and observability subsystems of the ke

[Intel-gfx] [PATCH v2 0/7] Introduce CAP_SYS_PERFMON to secure system performance monitoring and observability

2019-12-15 Thread Alexey Budankov
Currently access to perf_events, i915_perf and other performance monitoring and observability subsystems of the kernel is open for a privileged process [1] with CAP_SYS_ADMIN capability enabled in the process effective set [2]. This patch set introduces CAP_SYS_PERFMON capability devoted to secu

Re: [Intel-gfx] [RFC v2 03/12] drm/i915/svm: Implicitly migrate BOs upon CPU access

2019-12-15 Thread Niranjan Vishwanathapura
On Sat, Dec 14, 2019 at 10:58:35AM +, Chris Wilson wrote: Quoting Niranjana Vishwanathapura (2019-12-13 21:56:05) +int i915_gem_object_migrate_region(struct drm_i915_gem_object *obj, + u32 *regions, int size) +{ + struct drm_i915_private *dev_priv = to_

Re: [Intel-gfx] [RFC v2 02/12] drm/i915/svm: Runtime (RT) allocator support

2019-12-15 Thread Niranjan Vishwanathapura
On Sat, Dec 14, 2019 at 10:56:54AM +, Chris Wilson wrote: Quoting Niranjana Vishwanathapura (2019-12-13 21:56:04) Shared Virtual Memory (SVM) runtime allocator support allows binding a shared virtual address to a buffer object (BO) in the device page table through an ioctl call. Cc: Joonas

Re: [Intel-gfx] [RFC v2 02/12] drm/i915/svm: Runtime (RT) allocator support

2019-12-15 Thread Niranjan Vishwanathapura
On Sat, Dec 14, 2019 at 10:31:37AM +, Chris Wilson wrote: Quoting Jason Ekstrand (2019-12-14 00:36:19) On Fri, Dec 13, 2019 at 5:24 PM Niranjan Vishwanathapura < niranjana.vishwanathap...@intel.com> wrote: On Fri, Dec 13, 2019 at 04:58:42PM -0600, Jason Ekstrand wrote: > >     +

[Intel-gfx] ✓ Fi.CI.IGT: success for linux-next: build failure after merge of the drm-misc tree

2019-12-15 Thread Patchwork
== Series Details == Series: linux-next: build failure after merge of the drm-misc tree URL : https://patchwork.freedesktop.org/series/70958/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15782_full S

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev14)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev14) URL : https://patchwork.freedesktop.org/series/70839/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15781_full Summa

[Intel-gfx] ✓ Fi.CI.BAT: success for linux-next: build failure after merge of the drm-misc tree

2019-12-15 Thread Patchwork
== Series Details == Series: linux-next: build failure after merge of the drm-misc tree URL : https://patchwork.freedesktop.org/series/70958/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15782 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for linux-next: build failure after merge of the drm-misc tree

2019-12-15 Thread Patchwork
== Series Details == Series: linux-next: build failure after merge of the drm-misc tree URL : https://patchwork.freedesktop.org/series/70958/ State : warning == Summary == $ dim checkpatch origin/drm-tip ccba0d4a341c linux-next: build failure after merge of the drm-misc tree -:21: ERROR:GIT_CO

[Intel-gfx] ✓ Fi.CI.IGT: success for Enable second DBuf slice for ICL and TGL (rev10)

2019-12-15 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev10) URL : https://patchwork.freedesktop.org/series/70059/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15780_full Summary ---

[Intel-gfx] linux-next: build failure after merge of the drm-misc tree

2019-12-15 Thread Stephen Rothwell
Hi all, After merging the drm-misc tree, today's linux-next build (x86_64 allmodconfig) failed like this: drivers/gpu/drm/bridge/analogix/analogix-anx6345.c: In function 'anx6345_i2c_probe': drivers/gpu/drm/bridge/analogix/analogix-anx6345.c:738:30: error: implicit declaration of function 'i2c_

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev14)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev14) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15781 Summary ---

[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree

2019-12-15 Thread Stephen Rothwell
Hi all, Today's linux-next merge of the drm-misc tree got a conflict in: include/drm/drm_dp_mst_helper.h between commit: 14692a3637d4 ("drm/dp_mst: Add probe_lock") from the Linus' tree and commit: f79489074c59 ("drm/dp_mst: Clear all payload id tables downstream when initializing") f

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev14)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev14) URL : https://patchwork.freedesktop.org/series/70839/ State : warning == Summary == $ dim checkpatch origin/drm-tip f243dd7bf717 drm/i915/gt: Set vm again after MI_SET_CONTEXT -:154: WARNING:MEMORY_BARRIER: mem

[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree

2019-12-15 Thread Stephen Rothwell
Hi all, Today's linux-next merge of the drm-misc tree got a conflict in: drivers/gpu/drm/drm_dp_mst_topology.c between commit: 14692a3637d4 ("drm/dp_mst: Add probe_lock") 3f9b3f02dda5 ("drm/dp_mst: Protect drm_dp_mst_port members with locking") 6f85f73821f6 ("drm/dp_mst: Add basic topol

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 91 ++- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +- 2 files changed, 32

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable second DBuf slice for ICL and TGL (rev10)

2019-12-15 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev10) URL : https://patchwork.freedesktop.org/series/70059/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15780 Summary --- **

[Intel-gfx] ✗ Fi.CI.IGT: failure for Enable second DBuf slice for ICL and TGL (rev9)

2019-12-15 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev9) URL : https://patchwork.freedesktop.org/series/70059/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15776_full Summary

[Intel-gfx] [PATCH v9 3/4] drm/i915: Manipulate DBuf slices properly

2019-12-15 Thread Stanislav Lisovskiy
Start manipulating DBuf slices as a mask, but not as a total number, as current approach doesn't give us full control on all combinations of slices, which we might need(like enabling S2 only can't enabled by setting enabled_slices=1). Removed wrong code from intel_get_ddb_size as it doesn't match

[Intel-gfx] [PATCH v9 1/4] drm/i915: Remove skl_ddl_allocation struct

2019-12-15 Thread Stanislav Lisovskiy
Current consensus that it is redundant as we already have skl_ddb_values struct out there, also this struct contains only single member which makes it unnecessary. v2: As dirty_pipes soon going to be nuked away from skl_ddb_values, evacuating enabled_slices to safer in dev_priv. v3: Chang

[Intel-gfx] [PATCH v9 2/4] drm/i915: Move dbuf slice update to proper place

2019-12-15 Thread Stanislav Lisovskiy
Current DBuf slices update wasn't done in proper place, especially its "post" part, which should disable those only once vblank had passed and all other changes are committed. v2: Fix to use dev_priv and intel_atomic_state instead of skl_ddb_values (to be nuked in Villes patch) v3: Rename

[Intel-gfx] [PATCH v9 0/4] Enable second DBuf slice for ICL and TGL

2019-12-15 Thread Stanislav Lisovskiy
Those patch series, do some initial preparation DBuf manipulating code cleanups, i.e remove redundant structures/code, switch to mask based DBuf manupulation, get into use DBuf assignment according to BSpec rules. Stanislav Lisovskiy (4): drm/i915: Remove skl_ddl_allocation struct drm/i915: Mo

[Intel-gfx] [PATCH v9 4/4] drm/i915: Correctly map DBUF slices to pipes

2019-12-15 Thread Stanislav Lisovskiy
Added proper DBuf slice mapping to correspondent pipes, depending on pipe configuration as stated in BSpec. v2: - Remove unneeded braces - Stop using macro for DBuf assignments as it seems to reduce readability. v3: Start using enabled slices mask in dev_priv v4: Renamed "enabled_s

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev13)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev13) URL : https://patchwork.freedesktop.org/series/70839/ State : warning == Summary == $ dim checkpatch origin/drm-tip ba4d4079ca15 drm/i915/gt: Set vm again after MI_SET_CONTEXT -:169: WARNING:MEMORY_BARRIER: mem

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/dsi: Remove readback of panel orientation on BYT / CHT

2019-12-15 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dsi: Remove readback of panel orientation on BYT / CHT URL : https://patchwork.freedesktop.org/series/70952/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15778

[Intel-gfx] ✗ Fi.CI.IGT: failure for AUX power well fixes (rev4)

2019-12-15 Thread Patchwork
== Series Details == Series: AUX power well fixes (rev4) URL : https://patchwork.freedesktop.org/series/70857/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7554_full -> Patchwork_15737_full Summary --- **FAILURE**

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/dsi: Remove readback of panel orientation on BYT / CHT

2019-12-15 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/dsi: Remove readback of panel orientation on BYT / CHT URL : https://patchwork.freedesktop.org/series/70952/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7b12fbe13a42 drm/i915/dsi: Remove readback of panel orien

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 101 +++--- drivers/gpu/drm/i915/i915_gem_gtt.c | 2 + 2 files changed, 43

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev12)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev12) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15777 Summary ---

[Intel-gfx] [PATCH 1/2] drm/i915/dsi: Remove readback of panel orientation on BYT / CHT

2019-12-15 Thread Hans de Goede
Commit 82daca297506 ("drm/i915: Add "panel orientation" property to the panel connector, v6.") uses hardware state readback to determine if the GOP is rotating the image by 180 degrees to compensate for upside-down mounted panels. When I wrote that commit I tried to find the VBT bits the GOP used

[Intel-gfx] [PATCH 2/2] drm/i915/dp: Use BDB_GENERAL_FEATURES VBT block info for builtin panel-orientation

2019-12-15 Thread Hans de Goede
Some devices with a builtin panel have the panel mounted upside down, this is indicated by the rotate_180 bit in the BDB_GENERAL_FEATURES VBT block. We store this info in dev_priv->vbt.orientation, use this to set the connector's orientation property so that fbcon and userspace will show the image

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev12)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev12) URL : https://patchwork.freedesktop.org/series/70839/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2ff7f1e21ea4 drm/i915/gt: Set vm again after MI_SET_CONTEXT -:169: WARNING:MEMORY_BARRIER: mem

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable second DBuf slice for ICL and TGL (rev9)

2019-12-15 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev9) URL : https://patchwork.freedesktop.org/series/70059/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15776 Summary --- **S

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 101 +++--- drivers/gpu/drm/i915/i915_gem_gtt.c | 2 + 2 files changed, 43

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev11)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev11) URL : https://patchwork.freedesktop.org/series/70839/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15775_full Summa

Re: [Intel-gfx] Policy for dealing with CI failures?

2019-12-15 Thread Hans de Goede
p.s. Reading one of the IGT failure summary emails I see: "If you think the reported changes have nothing to do with the changes introduced in Patchwork_15773_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI." Is there

[Intel-gfx] Policy for dealing with CI failures?

2019-12-15 Thread Hans de Goede
Hi All, I'm wondering if there are any (unwritten) guidelines for how to deal with CI failures. Although it is great to have such an extensive CI systems, it seems to result in quite many false-positives. After a couple of resubmits I've gotten 2 patch-sets to pass the BAT tests, but both have f

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable second DBuf slice for ICL and TGL (rev9)

2019-12-15 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev9) URL : https://patchwork.freedesktop.org/series/70059/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Remove skl_ddl_allocation struct Okay! Commit: drm/i915: Move d

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable second DBuf slice for ICL and TGL (rev9)

2019-12-15 Thread Patchwork
== Series Details == Series: Enable second DBuf slice for ICL and TGL (rev9) URL : https://patchwork.freedesktop.org/series/70059/ State : warning == Summary == $ dim checkpatch origin/drm-tip 16c87005933e drm/i915: Remove skl_ddl_allocation struct a31132e7881c drm/i915: Move dbuf slice update

[Intel-gfx] [PATCH v9 3/4] drm/i915: Manipulate DBuf slices properly

2019-12-15 Thread Stanislav Lisovskiy
Start manipulating DBuf slices as a mask, but not as a total number, as current approach doesn't give us full control on all combinations of slices, which we might need(like enabling S2 only can't enabled by setting enabled_slices=1). Removed wrong code from intel_get_ddb_size as it doesn't match

[Intel-gfx] [PATCH v9 1/4] drm/i915: Remove skl_ddl_allocation struct

2019-12-15 Thread Stanislav Lisovskiy
Current consensus that it is redundant as we already have skl_ddb_values struct out there, also this struct contains only single member which makes it unnecessary. v2: As dirty_pipes soon going to be nuked away from skl_ddb_values, evacuating enabled_slices to safer in dev_priv. v3: Chang

[Intel-gfx] [PATCH v9 2/4] drm/i915: Move dbuf slice update to proper place

2019-12-15 Thread Stanislav Lisovskiy
Current DBuf slices update wasn't done in proper place, especially its "post" part, which should disable those only once vblank had passed and all other changes are committed. v2: Fix to use dev_priv and intel_atomic_state instead of skl_ddb_values (to be nuked in Villes patch) v3: Rename

[Intel-gfx] [PATCH v9 4/4] drm/i915: Correctly map DBUF slices to pipes

2019-12-15 Thread Stanislav Lisovskiy
Added proper DBuf slice mapping to correspondent pipes, depending on pipe configuration as stated in BSpec. v2: - Remove unneeded braces - Stop using macro for DBuf assignments as it seems to reduce readability. v3: Start using enabled slices mask in dev_priv v4: Renamed "enabled_s

[Intel-gfx] [PATCH v9 0/4] Enable second DBuf slice for ICL and TGL

2019-12-15 Thread Stanislav Lisovskiy
Those patch series, do some initial preparation DBuf manipulating code cleanups, i.e remove redundant structures/code, switch to mask based DBuf manupulation, get into use DBuf assignment according to BSpec rules. Stanislav Lisovskiy (4): drm/i915: Remove skl_ddl_allocation struct drm/i915: Mo

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: opregion: set opregion chpd value to indicate the driver handles hotplug (rev4)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915: opregion: set opregion chpd value to indicate the driver handles hotplug (rev4) URL : https://patchwork.freedesktop.org/series/69902/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15774_full ===

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dsi: Control panel and backlight enable GPIOs from VBT

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/dsi: Control panel and backlight enable GPIOs from VBT URL : https://patchwork.freedesktop.org/series/70945/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15773_full ==

[Intel-gfx] ✓ Fi.CI.BAT: success for AUX power well fixes (rev4)

2019-12-15 Thread Patchwork
== Series Details == Series: AUX power well fixes (rev4) URL : https://patchwork.freedesktop.org/series/70857/ State : success == Summary == CI Bug Log - changes from CI_DRM_7554 -> Patchwork_15737 Summary --- **SUCCESS** No regre

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev11)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev11) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15775 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: opregion: set opregion chpd value to indicate the driver handles hotplug (rev4)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915: opregion: set opregion chpd value to indicate the driver handles hotplug (rev4) URL : https://patchwork.freedesktop.org/series/69902/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15774 =

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsi: Control panel and backlight enable GPIOs from VBT

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/dsi: Control panel and backlight enable GPIOs from VBT URL : https://patchwork.freedesktop.org/series/70945/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15773 Summar

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: Control panel and backlight enable GPIOs from VBT

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/dsi: Control panel and backlight enable GPIOs from VBT URL : https://patchwork.freedesktop.org/series/70945/ State : warning == Summary == $ dim checkpatch origin/drm-tip 24c183bed8bd pinctrl: Export pinctrl_unregister_mappings -:108: CHECK:AVOID_EXTERNS:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev9)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev9) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15772 Summary ---

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 105 +++--- 1 file changed, 43 insertions(+), 62 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [CI] drm/i915: opregion: set opregion chpd value to indicate the driver handles hotplug

2019-12-15 Thread Hans de Goede
According to both the old acpi_igd_opregion_spec_0.pdf and the newer skl_opregion_rev0p5.pdf opregion specification documents, if a driver handles hotplug events itself, it should set the opregion CHPD field to 1 to indicate this and the firmware should respond to this by no longer sending ACPI 0x0

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 113 -- 1 file changed, 50 insertions(+), 63 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH 2/5] drm/i915/dsi: Move poking of panel-enable GPIO to intel_dsi_vbt.c

2019-12-15 Thread Hans de Goede
On some older devices (BYT, CHT) which may use v2 VBT MIPI-sequences, we need to manually control the panel enable GPIO as v2 sequences do not do this. So far we have been carrying the code to do this on BYT/CHT devices with a Crystal Cove PMIC in vlv_dsi.c, but as this really is a shortcoming of

[Intel-gfx] [PATCH 0/5] drm/i915/dsi: Control panel and backlight enable GPIOs from VBT

2019-12-15 Thread Hans de Goede
Hi All, This is a new (completely rewritten) version of my patches to make the i915 code control the SoC panel- and backlight-enable GPIOs on Bay Trail devices when the VBT indicates that the SoC should be used for backlight control. This fixes the panel not lighting up on various devices when boo

[Intel-gfx] [PATCH 1/5] pinctrl: Export pinctrl_unregister_mappings

2019-12-15 Thread Hans de Goede
Rename pinctrl_unregister_map to pinctrl_unregister_mappings so that its naming matches its pinctrl_register_mappings counter-part and export it. The purpose of this patch is to allow non-dt platforms to register pinctrl mappings from code which is build as a module, which requires being able to u

[Intel-gfx] [PATCH 5/5] drm/i915/dsi: Control panel and backlight enable GPIOs on BYT

2019-12-15 Thread Hans de Goede
On Bay Trail devices the MIPI power on/off sequences for DSI LCD panels do not control the LCD panel- and backlight-enable GPIOs. So far, when the VBT indicates we should use the SoC for backlight control, we have been relying on these GPIOs being configured as output and driven high by the Video B

[Intel-gfx] [PATCH 4/5] drm/i915/dsi: Move Crystal Cove PMIC panel GPIO lookup from mfd to the i915 driver

2019-12-15 Thread Hans de Goede
Move the Crystal Cove PMIC panel GPIO lookup-table from drivers/mfd/intel_soc_pmic_core.c to the i915 driver. The moved looked-up table is adding a GPIO lookup to the i915 PCI device and the GPIO subsys allows only one lookup table per device, The intel_soc_pmic_core.c code only adds lookup-table

[Intel-gfx] [PATCH 3/5] drm/i915/dsi: Init panel-enable GPIO to low when the LCD is initially off

2019-12-15 Thread Hans de Goede
When the LCD has not been turned on by the firmware/GOP, because e.g. the device was booted with an external monitor connected over HDMI, we should not turn on the panel-enable GPIO when we request it. Turning on the panel-enable GPIO when we request it, means we turn it on too early in the init-s

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev8)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev8) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15771 Summary ---

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 111 -- 1 file changed, 50 insertions(+), 61 deletions(-) diff --git a/drivers/gp

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev5)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev5) URL : https://patchwork.freedesktop.org/series/70839/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15768_full Summar

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev7)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev7) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15770 Summary ---

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 107 -- 1 file changed, 45 insertions(+), 62 deletions(-) diff --git a/drivers/gp

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev6)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev6) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15769 Summary ---

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 103 +++--- 1 file changed, 40 insertions(+), 63 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 105 +++--- 1 file changed, 43 insertions(+), 62 deletions(-) diff --git a/drivers/gp

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Unpin vma->obj on early error (rev4)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915: Unpin vma->obj on early error (rev4) URL : https://patchwork.freedesktop.org/series/70935/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569_full -> Patchwork_15765_full Summary -

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev5)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev5) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15768 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev4)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev4) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15767 Summary ---

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 110 +- 1 file changed, 55 insertions(+), 55 deletions(-) diff --git a/drivers/gp

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev3)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915/gt: Set vm again after MI_SET_CONTEXT (rev3) URL : https://patchwork.freedesktop.org/series/70839/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15766 Summary ---

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 100 -- 1 file changed, 45 insertions(+), 55 deletions(-) diff --git a/drivers/gp

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Unpin vma->obj on early error (rev4)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915: Unpin vma->obj on early error (rev4) URL : https://patchwork.freedesktop.org/series/70935/ State : success == Summary == CI Bug Log - changes from CI_DRM_7569 -> Patchwork_15765 Summary --- **SU

[Intel-gfx] [CI] drm/i915/gt: Set vm again after MI_SET_CONTEXT

2019-12-15 Thread Chris Wilson
Reloading the PD after MI_SET_CONTEXT, along with copious amounts of flushes, so far is making Baytrail more content. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_submission.c | 100 -- 1 file changed, 45 insertions(+), 55 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH] drm/i915: Unpin vma->obj on early error

2019-12-15 Thread Chris Wilson
If we inherit an error along the fence chain, we skip the main work callback and go straight to the error. In the case of the vma bind worker, we only dropped the pinned pages from the worker. In the process, make sure we call the release earlier rather than wait until the final reference to the f

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Unpin vma->obj on early error (rev3)

2019-12-15 Thread Patchwork
== Series Details == Series: drm/i915: Unpin vma->obj on early error (rev3) URL : https://patchwork.freedesktop.org/series/70935/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7568 -> Patchwork_15764 Summary --- **FA

[Intel-gfx] [PATCH] drm/i915: Unpin vma->obj on early error

2019-12-15 Thread Chris Wilson
If we inherit an error along the fence chain, we skip the main work callback and go straight to the error. In the case of the vma bind worker, we only dropped the pinned pages from the worker. In the process, make sure we call the release earlier rather than wait until the final reference to the f