Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-11-13 18:33:59) > On 13/11/2019 20:11, Chris Wilson wrote: > > Quoting Chris Wilson (2019-11-13 18:10:22) > >> Quoting Lionel Landwerlin (2019-11-13 18:07:59) > >>> On 13/11/2019 18:35, Chris Wilson wrote: > Quoting Lionel Landwerlin (2019-11-13 15:46:39) >

Re: [Intel-gfx] [bug report] drm/i915: Initial selftests for exercising eviction

2019-11-13 Thread Chris Wilson
Quoting Dan Carpenter (2019-11-14 06:54:37) > Hello Chris Wilson, > > The patch f40a7b7558ef: "drm/i915: Initial selftests for exercising > eviction" from Feb 13, 2017, leads to the following static checker > warning: > > drivers/gpu/drm/i915/selftests/i915_gem_evict.c:202 igt_overcommit(

[Intel-gfx] [bug report] drm/i915: Initial selftests for exercising eviction

2019-11-13 Thread Dan Carpenter
Hello Chris Wilson, The patch f40a7b7558ef: "drm/i915: Initial selftests for exercising eviction" from Feb 13, 2017, leads to the following static checker warning: drivers/gpu/drm/i915/selftests/i915_gem_evict.c:202 igt_overcommit() warn: passing zero to 'PTR_ERR' drivers/gpu/drm

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/perf: don't forget noa wait after oa config URL : https://patchwork.freedesktop.org/series/69409/ State : success == Summary == CI Bug Log - changes from CI_DRM_7331_full -> Patchwork_15250_full Summary

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/gt: Invalidate as we write the gen7 breadcrumb URL : https://patchwork.freedesktop.org/series/69408/ State : success == Summary == CI Bug Log - changes from CI_DRM_7331_full -> Patchwork_15249_full Summ

[Intel-gfx] [PULL] drm-intel-fixes

2019-11-13 Thread Rodrigo Vivi
Hi Dave and Daniel, Here goes drm-intel-fixes-2019-11-13: - MOCS table fixes for EHL and TGL - Update Display's rawclock on resume - GVT's dmabuf reference drop fix Thanks, Rodrigo. The following changes since commit 31f4f5b495a62c9a8b15b1c3581acd5efeb9af8c: Linux 5.4-rc7 (2019-11-10 16:17:1

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/tgl: Wa_1606679103 (rev2)

2019-11-13 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/tgl: Wa_1606679103 (rev2) URL : https://patchwork.freedesktop.org/series/69420/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7341 -> Patchwork_15255 Summa

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix a bug calling sleep function in atomic context (rev4)

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Fix a bug calling sleep function in atomic context (rev4) URL : https://patchwork.freedesktop.org/series/69385/ State : failure == Summary == Applying: drm/i915: Fix a bug calling sleep function in atomic context Using index info to reconstruct a base tre

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/fbdev: Fallback to non tiled mode if all tiles not present (rev3)

2019-11-13 Thread Patchwork
== Series Details == Series: drm/fbdev: Fallback to non tiled mode if all tiles not present (rev3) URL : https://patchwork.freedesktop.org/series/68838/ State : success == Summary == CI Bug Log - changes from CI_DRM_7340 -> Patchwork_15254

[Intel-gfx] drm-next + i915 CVE yolo merge

2019-11-13 Thread Dave Airlie
The landing of the i915 CVE fixes into Linus tree has created a bit of a mess in linux-next and downstream in drm-next trees. I talked to Daniel and he had talked to Joonas a bit, and I decided to go with what Daniel describes as the YOLO merge, where I just solve it and pray, and everyone else ve

Re: [Intel-gfx] [PATCH 10/10] drm/i915: Change .crtc_enable/disable() calling convention

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:15:03PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Just pass the atomic state+crtc to the .crtc_enable() > .crtc_disable(). Life is easier when you don't have to think > whether to pass the old or the new crtc state. > > Signed-off-by: Ville Syrjälä makes

Re: [Intel-gfx] [PATCH 09/10] drm/i915: s/pipe_config/new_crtc_state/ in .crtc_enable()

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:15:02PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Rename pipe_config to new_crtc_state in the .crtc_enable() hooks. > The 'pipe_config' name is a zombie that we need to finally put down. So basically use pipe_config only in atomic check functions like compu

Re: [Intel-gfx] [PATCH 08/10] drm/i915: s/intel_crtc/crtc/ in .crtc_enable() and .crtc_disable()

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:15:01PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Get rid of the horrible aliasing drm_crtc and intel_crtc variables > in the crtc enable/disable hooks. > > Signed-off-by: Ville Syrjälä Great this addresses my concern on intel_crtc vs crtc on the previous

Re: [Intel-gfx] [PATCH 07/10] drm/i915: Pass dev_priv to cpt_verify_modeset()

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:15:00PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Get rid of the last 'dev' usage in ironlake_crtc_enable() by > passing dev_priv to cpt_verify_modeset(). > > Signed-off-by: Ville Syrjälä Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/

Re: [Intel-gfx] [PATCH 06/10] drm/i915: Change watermark hook calling convention

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:14:59PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Just pass the atomic_state+crtc to the watermarks hooks. Eeasier > time for the caller when it doesn't have to think what to pass. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/display/inte

Re: [Intel-gfx] [PATCH 05/10] drm/i915: Pass intel_crtc to ironlake_fdi_disable()

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:14:58PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Switch to intel_crtc from drm_crtc. > > Signed-off-by: Ville Syrjälä Reviewed-by: Manasi Navare Manasi > --- > drivers/gpu/drm/i915/display/intel_display.c | 10 -- > 1 file changed, 4 insertio

Re: [Intel-gfx] [PATCH 04/10] drm/i915: Move crtc_state to tighter scope

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:14:57PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > intel_modeset_setup_hw_state() doesn't need the crtc_state at the > top level scope. Move it to where it's needed. > > Signed-off-by: Ville Syrjälä Looks good even though it does add to the code size since

Re: [Intel-gfx] [PATCH 03/10] drm/i915: Move assert_vblank_disabled() into intel_crtc_vblank_on()

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:14:56PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Move the assert_vblank_disabled() into intel_crtc_vblank_on() > so that we don't have to inline it all over. > > This does mean we now assert_vblank_disabled() during readout as well > but that is totally fi

Re: [Intel-gfx] [PATCH i-g-t 3/7] lib/i915: Add query to detect if engine accepts only ro batches

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:09) > diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c > index 5c15f177..ca6bef6a 100644 > --- a/tests/i915/gem_exec_schedule.c > +++ b/tests/i915/gem_exec_schedule.c > @@ -652,7 +652,8 @@ static void semaphore_noskip(int i915) >

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Add intel_crtc_vblank_off()

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:14:55PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > We already have intel_crtc_vblank_on(). Add a counterpart so we > don't have to inline the disable+assert all over. > > Signed-off-by: Ville Syrjälä LGTM, Reviewed-by: Manasi Navare Manasi > --- > dri

Re: [Intel-gfx] [PATCH 01/10] drm/i915: Change intel_encoders_() calling convention

2019-11-13 Thread Manasi Navare
On Tue, Nov 12, 2019 at 04:14:54PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Just pass the atomic state and the crtc to intel_encoders_enable() & co. > Make life simpler when you don't have to think which state (old vs. new) > you have to pass in. Also constify the states while at it.

Re: [Intel-gfx] [PATCH i-g-t 3/7] lib/i915: Add query to detect if engine accepts only ro batches

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:09) > From: "Kuoppala, Mika" > > If cmd parser is mandatory, batch can't be modified post execbuf. > Some tests rely on modifying batch post execbuf. Give those > tests a method to query if those modifications ever reach > the actual engine command stream.

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/tgl: Wa_1606679103

2019-11-13 Thread Chris Wilson
Quoting Radhakrishna Sripada (2019-11-13 23:19:53) > Extend disabling SAMPLER_STATE prefetch workaround to gen12. > > v2: Limit the WA to TGL A0 and update the WA no(Chris) > > BSpec: 52890 > Cc: Chris Wilson > Cc: Mika Kuoppala > Signed-off-by: Radhakrishna Sripada Reviewed-by: Chris Wilson

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Bruce Chang
below is the call trace when this issue is hit <3> [113.316247] BUG: sleeping function called from invalid context at mm/page_alloc.c:4653 <3> [113.318190] in_atomic(): 1, irqs_disabled(): 0, pid: 678, name: debugfs_test <4> [113.319900] no locks held by debugfs_test/678. <3> [113.321002] Preemp

Re: [Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Chris Wilson
Quoting Bruce Chang (2019-11-13 23:11:04) > below is the call trace when this issue is hit > > <3> [113.316247] BUG: sleeping function called from invalid context at > mm/page_alloc.c:4653 > <3> [113.318190] in_atomic(): 1, irqs_disabled(): 0, pid: 678, name: > debugfs_test > <4> [113.319900] no

[Intel-gfx] [PATCH v2 1/2] drm/i915/tgl: Wa_1606679103

2019-11-13 Thread Radhakrishna Sripada
Extend disabling SAMPLER_STATE prefetch workaround to gen12. v2: Limit the WA to TGL A0 and update the WA no(Chris) BSpec: 52890 Cc: Chris Wilson Cc: Mika Kuoppala Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 15 ++- 1 file changed, 10 inse

Re: [Intel-gfx] [PATCH 1/3] drm/i915/psr: Share the computation of idle frames

2019-11-13 Thread Souza, Jose
On Wed, 2019-11-13 at 18:04 +0530, Anshuamn Gupta wrote: > Looks good to me, there is a minor comment see below. > On 2019-10-31 at 17:14:20 -0700, José Roberto de Souza wrote: > > Both activate functions and the dc3co disable function were doing > > the > > same thing, so better move to a function

[Intel-gfx] ✗ GitLab.Pipeline: warning for igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Patchwork
== Series Details == Series: igt: Use COND_BBEND for busy spinning on gen9 URL : https://patchwork.freedesktop.org/series/69423/ State : warning == Summary == Did not get list of undocumented tests for this run, something is wrong! Other than that, pipeline status: FAILED. see https://gitlab

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Bruce Chang
below is the call trace when this issue is hit <3> [113.316247] BUG: sleeping function called from invalid context at mm/page_alloc.c:4653 <3> [113.318190] in_atomic(): 1, irqs_disabled(): 0, pid: 678, name: debugfs_test <4> [113.319900] no locks held by debugfs_test/678. <3> [113.321002] Preemp

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_reloc: Check that relocations do not block

2019-11-13 Thread Chris Wilson
With GPU relocations we avoid blocking inside execbuf and prevent priority inversions where a low priority client can cause a denial of service to higher priority clients. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- tests/i915/gem_exec_reloc.c | 45 + 1

Re: [Intel-gfx] [PATCH v6 09/10] drm/framebuffer/tgl: Format modifier for Intel Gen 12 render compression with Clear Color

2019-11-13 Thread Chery, Nanley G
> From: Chery, Nanley G > Sent: Tuesday, November 12, 2019 9:40 AM > To: Sripada, Radhakrishna; intel-gfx@lists.freedesktop.org > Cc: Pandiyan, Dhinakaran; Syrjala, Ville; Sharma, Shashank; Antognolli, > Rafael; Ville Syrjala; Ekstrand, Jason > Subject: RE: [PATCH v6 09/10] drm/framebuffer/tgl: Fo

[Intel-gfx] [CI v2] drm/fbdev: Fallback to non tiled mode if all tiles not present

2019-11-13 Thread Manasi Navare
In case of tiled displays, if we hotplug just one connector, fbcon currently just selects the preferred mode and if it is tiled mode then that becomes a problem if rest of the tiles are not present. So in the fbdev driver on hotplug when we probe the client modeset, if we dont find all the connecto

Re: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Wa_1606679103

2019-11-13 Thread Chris Wilson
Quoting Radhakrishna Sripada (2019-11-13 19:18:39) > Extend disabling SAMPLER_STATE prefetch workaround to gen12. > > BSpec: 52890 > Cc: Mika Kuoppala > Signed-off-by: Radhakrishna Sripada > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++- > 1 file changed, 7 insertions(+),

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 20:20:31) > From: Jon Bloomfield > > gen9+ introduces a cmdparser for the BLT engine which copies the > incoming BB to a kmd owned buffer for submission (to prevent changes > being made after the bb has been safely scanned). This breaks the > spin functionality be

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_mocs_settings: Update TGL MOCS table

2019-11-13 Thread Lucas De Marchi
On Wed, Nov 13, 2019 at 08:51:03AM -0800, Matt Roper wrote: The TGL MOCS table was corrected in the bspec and the kernel. Since this test hardcodes its own copy of the MOCS table, we need to make corresponding fixes here. References: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for EH

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definition

2019-11-13 Thread Souza, Jose
On Sat, 2019-11-09 at 10:47 +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915/display: Fix > TRANS_DDI_MST_TRANSPORT_SELECT definition > URL : https://patchwork.freedesktop.org/series/69160/ > State : success > > == Summary == > > CI Bug Log - chang

Re: [Intel-gfx] [PATCH v6] drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-13 Thread Matt Roper
On Fri, Nov 08, 2019 at 03:45:00PM +0200, Stanislav Lisovskiy wrote: > Also implemented algorithm for choosing DBuf slice configuration > based on active pipes, pipe ratio as stated in BSpec 12716. > > Now pipe allocation still stays proportional to pipe width as before, > however within allowed D

[Intel-gfx] [PULL] drm-misc-next-fixes

2019-11-13 Thread Sean Paul
Hi Dave & Daniel, Just one msm patch this week. Looks like -misc is going to be perfect when merge window rolls around :-) drm-misc-next-fixes-2019-11-13: - Fix memory leak in gpu debugfs node's release (Johan) Cc: Johan Hovold Cheers, Sean The following changes since commit 3ca3a9eab7085b3

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_blits: Use common igt_fls()

2019-11-13 Thread Summers, Stuart
On Sat, 2019-11-09 at 15:10 +, Chris Wilson wrote: > igt_aux.h already provides the optimal igt_fls(), so use that in > preference to open coding the brute force version. > > Reported-by: Stuart Summers > Signed-off-by: Chris Wilson > Cc: Stuart Summers Thanks for the look here Chris :) -

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

Re: [Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Bloomfield, Jon
> -Original Message- > From: Chris Wilson > Sent: Wednesday, November 13, 2019 11:47 AM > To: intel-gfx@lists.freedesktop.org > Cc: Bloomfield, Jon ; Lahtinen, Joonas > ; Vivi, Rodrigo ; > Kuoppala, Mika ; Mika Kuoppala > > Subject: [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on g

Re: [Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Chris Wilson
Quoting Bruce Chang (2019-11-13 19:52:44) > There are quite a few reports regarding "BUG: sleeping function called from > invalid context at mm/page_alloc.c" > > Basically after the io_mapping_map_atomic_wc/kmap_atomic, it enters atomic > context, but compress_page cannot be called in atomic conte

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2)

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2) URL : https://patchwork.freedesktop.org/series/69399/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7332 -> Patchwork_15253 =

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Bruce Chang
There are quite a few reports regarding "BUG: sleeping function called from invalid context at mm/page_alloc.c" Basically after the io_mapping_map_atomic_wc/kmap_atomic, it enters atomic context, but compress_page cannot be called in atomic context as it will call pool_alloc with GFP_KERNEL flag w

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_create: Check for cache bypass around zeroed pages

2019-11-13 Thread Matthew Auld
On Wed, 13 Nov 2019 at 14:05, Chris Wilson wrote: > > Check that even if userspace tries to sneak around the CPU caches of its > zeroed pages, it sees nothing but zeroes. > > Suggested-by: Joonas Lahtinen > Signed-off-by: Chris Wilson > Cc: Joonas Lahtinen > Cc: Matthew Auld Reviewed-by: Matth

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

Re: [Intel-gfx] [PATCH i-g-t 3/3] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:42:06) > Quoting Chris Wilson (2019-11-13 18:28:08) > > From: Jon Bloomfield > > > > gen9+ introduces a cmdparser for the BLT engine which copies the > > incoming BB to a kmd owned buffer for submission (to prevent changes > > being made after the bb has been s

Re: [Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Brian Welty
On 11/12/2019 4:28 PM, Bruce Chang wrote: > There are quite a few reports regarding "BUG: sleeping function called from > invalid context at mm/page_alloc.c" > > Basically after the io_mapping_map_atomic_wc/kmap_atomic, it enters atomic > context, but compress_page cannot be called in atomic con

Re: [Intel-gfx] [PATCH] drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:06:33) > fbdev uses the physical address of our framebuffer for its fb_mmap() > routine. While we need to adapt this address for the new io BAR, we have > to fix v5.4 first! The simplest fix is to restore the smem back to v5.4 > and we will then probably have to

[Intel-gfx] [PATCH i-g-t] tests: Add exercise for fbdev

2019-11-13 Thread Chris Wilson
I broke fb_mmap() proving that we need a test in CI! References: https://bugs.freedesktop.org/show_bug.cgi?id=112256 Signed-off-by: Chris Wilson --- tests/Makefile.sources| 1 + tests/fbdev.c | 69 +++ tests/intel-ci/fast-feedback.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2)

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2) URL : https://patchwork.freedesktop.org/series/69399/ State : warning == Summary == $ dim checkpatch origin/drm-tip 70ca71d22f04 drm/i915: Split i915_active.mutex into an irq-safe sp

[Intel-gfx] [PATCH 1/2] drm/i915/tgl: Wa_1606679103

2019-11-13 Thread Radhakrishna Sripada
Extend disabling SAMPLER_STATE prefetch workaround to gen12. BSpec: 52890 Cc: Mika Kuoppala Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarou

[Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add Wa_1408615072

2019-11-13 Thread Radhakrishna Sripada
Disable VS Unit Clockgating. BSpec: 52857 Cc: Mika Kuoppala Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h i

Re: [Intel-gfx] [PATCH 1/5] drm/i915/psr: Add bits per pixel limitation

2019-11-13 Thread Lucas De Marchi
On Tue, Nov 12, 2019 at 09:16:57AM -0800, Matt Roper wrote: On Tue, Nov 05, 2019 at 05:45:00PM -0800, José Roberto de Souza wrote: PSR2 HW only support a limited number of bits per pixel, if mode has more than supported PSR2 should not be enabled. BSpec: 50422 BSpec: 7713 Cc: Gwan-gyeong Mun S

Re: [Intel-gfx] [PATCH 1/5] drm/i915/psr: Add bits per pixel limitation

2019-11-13 Thread Lucas De Marchi
On Tue, Nov 05, 2019 at 05:45:00PM -0800, Jose Souza wrote: PSR2 HW only support a limited number of bits per pixel, if mode has more than supported PSR2 should not be enabled. BSpec: 50422 BSpec: 7713 matches both specs Reviewed-by: Lucas De Marchi Lucas De Marchi Cc: Gwan-gyeong Mun S

Re: [Intel-gfx] [PATCH 3/3] drm/i915/display/mst: Enable virtual channel payload allocation earlier

2019-11-13 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 11:18:37PM +, Jose Souza wrote: On Thu, 2019-11-07 at 15:10 -0800, Lucas De Marchi wrote: On Thu, Nov 07, 2019 at 10:56:09PM +, Jose Souza wrote: > On Thu, 2019-11-07 at 14:44 -0800, Lucas De Marchi wrote: > > On Thu, Nov 07, 2019 at 01:45:59PM -0800, Jose Souza w

Re: [Intel-gfx] [PATCH 2/3] drm/i915/display/dsi: Add support to pipe D

2019-11-13 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 01:45:58PM -0800, Jose Souza wrote: Adding pipe D support to DSI transcoder. Not adding it for EDP transcoder code paths as only TGL has 4 pipes and it do not have a EDP transcoder. Cc: Lucas De Marchi Signed-off-by: José Roberto de Souza Reviewed-by: Lucas De Marchi

[Intel-gfx] [PATCH] drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree

2019-11-13 Thread Chris Wilson
As we want to be able to run inside atomic context for retiring the i915_active, and we are no longer allowed to abuse mutex_trylock, split the tree management portion of i915_active.mutex into an irq-safe spinlock. References: a0855d24fc22d ("locking/mutex: Complain upon mutex API misuse in IRQ

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/fbdev: Restore physical addresses for fb_mmap() URL : https://patchwork.freedesktop.org/series/69416/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7332 -> Patchwork_15252 Summary -

Re: [Intel-gfx] [PATCH] drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:06:33) > fbdev uses the physical address of our framebuffer for its fb_mmap() > routine. While we need to adapt this address for the new io BAR, we have > to fix v5.4 first! The simplest fix is to restore the smem back to v5.4 > and we will then probably have to

Re: [Intel-gfx] [PATCH i-g-t 3/3] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:28:08) > From: Jon Bloomfield > > gen9+ introduces a cmdparser for the BLT engine which copies the > incoming BB to a kmd owned buffer for submission (to prevent changes > being made after the bb has been safely scanned). This breaks the > spin functionality be

Re: [Intel-gfx] [PATCH i-g-t 2/3] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:28:07) > From: Mika Kuoppala > > To simplify emitting the recursive batch, make batch > always the first object on the execbuf list. > > This will require kernel v4.13 or greater. > > v2: set handles early, poll_ptr indecency (Chris) > v3: allow dep with poll

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Lionel Landwerlin
On 13/11/2019 20:11, Chris Wilson wrote: Quoting Chris Wilson (2019-11-13 18:10:22) Quoting Lionel Landwerlin (2019-11-13 18:07:59) On 13/11/2019 18:35, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-11-13 15:46:39) I'm observing incoherence metric values, changing from run to run. It a

Re: [Intel-gfx] [PATCH i-g-t 1/3] i915: Skip if secure batches is not available

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:28:06) > From: "Kuoppala, Mika" > > If we can't do secure execbuf, there is no point in trying. > > Signed-off-by: Kuoppala, Mika Reviewed-by: Chris Wilson There are a few more I915_EXEC_SECURE users, as MI_STORE_DWORD requires it on gen4/5; but they are of

[Intel-gfx] [PATCH i-g-t 1/3] i915: Skip if secure batches is not available

2019-11-13 Thread Chris Wilson
From: "Kuoppala, Mika" If we can't do secure execbuf, there is no point in trying. Signed-off-by: Kuoppala, Mika --- tests/i915/gem_exec_params.c | 22 -- tests/i915/gem_mocs_settings.c | 14 ++ tests/perf_pmu.c | 14 ++ 3 files chang

[Intel-gfx] [PATCH i-g-t 3/3] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

[Intel-gfx] [PATCH i-g-t 2/3] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Chris Wilson
From: Mika Kuoppala To simplify emitting the recursive batch, make batch always the first object on the execbuf list. This will require kernel v4.13 or greater. v2: set handles early, poll_ptr indecency (Chris) v3: allow dep with poll v4: fix gem_exec_schedule v5: rebase v6: rebase v6: gem_ctx_

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/fbdev: Hide smem_start from userspace

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/fbdev: Hide smem_start from userspace URL : https://patchwork.freedesktop.org/series/69415/ State : success == Summary == CI Bug Log - changes from CI_DRM_7332 -> Patchwork_15251 Summary --- **SU

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:10:22) > Quoting Lionel Landwerlin (2019-11-13 18:07:59) > > On 13/11/2019 18:35, Chris Wilson wrote: > > > Quoting Lionel Landwerlin (2019-11-13 15:46:39) > > >> I'm observing incoherence metric values, changing from run to run. > > >> > > >> It appears the patc

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-11-13 18:07:59) > On 13/11/2019 18:35, Chris Wilson wrote: > > Quoting Lionel Landwerlin (2019-11-13 15:46:39) > >> I'm observing incoherence metric values, changing from run to run. > >> > >> It appears the patches introducing noa wait & reconfiguration from > >> co

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Lionel Landwerlin
On 13/11/2019 18:35, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-11-13 15:46:39) I'm observing incoherence metric values, changing from run to run. It appears the patches introducing noa wait & reconfiguration from command stream switched places in the series multiple times during the r

[Intel-gfx] [PATCH] drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Chris Wilson
fbdev uses the physical address of our framebuffer for its fb_mmap() routine. While we need to adapt this address for the new io BAR, we have to fix v5.4 first! The simplest fix is to restore the smem back to v5.4 and we will then probably have to implement our fbops->fb_mmap() call back to handle

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbdev: Hide smem_start from userspace

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/fbdev: Hide smem_start from userspace URL : https://patchwork.freedesktop.org/series/69415/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0392ce3a5721 drm/i915/fbdev: Hide smem_start from userspace -:12: ERROR:GIT_COMMIT_ID: Please use git

[Intel-gfx] [PATCH] drm/i915/fbdev: Hide smem_start from userspace

2019-11-13 Thread Chris Wilson
Do not leak our internal kernel address for random userspace to abuse. Daniel added the support to fbdev to filter out the physical addresses being exposed by fbdev, put that to use to protect ourselves. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112256 Fixes: 5f889b9a61dd ("drm/i915:

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/7] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-11-13 15:49:08) >> From: Jon Bloomfield >> >> gen9+ introduces a cmdparser for the BLT engine which copies the >> incoming BB to a kmd owned buffer for submission (to prevent changes >> being made after the bb has been safely scanned). This bre

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/perf: don't forget noa wait after oa config URL : https://patchwork.freedesktop.org/series/69409/ State : success == Summary == CI Bug Log - changes from CI_DRM_7331 -> Patchwork_15250 Summary ---

[Intel-gfx] [PATCH i-g-t] i915/gem_mocs_settings: Update TGL MOCS table

2019-11-13 Thread Matt Roper
The TGL MOCS table was corrected in the bspec and the kernel. Since this test hardcodes its own copy of the MOCS table, we need to make corresponding fixes here. References: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for EHL"") References: bfb0e8e63d86 ("drm/i915/tgl: MOCS table updat

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/2] Revert "drm/i915/ehl: Update MOCS table for EHL"

2019-11-13 Thread Matt Roper
On Wed, Nov 13, 2019 at 11:49:53AM +, Patchwork wrote: > == Series Details == > > Series: series starting with [v3,1/2] Revert "drm/i915/ehl: Update MOCS table > for EHL" > URL : https://patchwork.freedesktop.org/series/69383/ > State : failure > > == Summary == > > CI Bug Log - changes f

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 5/7] Add tests/gem_blt_parse

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-11-13 15:49:11) >> From: Mika Kuoppala >> >> For testing blitter engine command parser on gen9. >> >> v2: bad jump offset >> v3: rebase >> v4: improve bb start and subcase it >> v5: fix presumed offsets (Jon) >> >> Signed-off-by: Mika Kuoppal

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-11-13 15:46:39) > I'm observing incoherence metric values, changing from run to run. > > It appears the patches introducing noa wait & reconfiguration from > command stream switched places in the series multiple times during the > review. This lead to the dependency

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/gt: Invalidate as we write the gen7 breadcrumb URL : https://patchwork.freedesktop.org/series/69408/ State : success == Summary == CI Bug Log - changes from CI_DRM_7331 -> Patchwork_15249 Summary --

Re: [Intel-gfx] [PATCH] drm/i915/tgl: allow DVI/HDMI on port A

2019-11-13 Thread Matt Roper
On Tue, Nov 12, 2019 at 06:19:35PM -0800, Lucas De Marchi wrote: > Tiger Lake supports HDMI on port A. For other platforms we ignore what the VBT > says regarding HDMI to workaround broken VBTs, see commit > 2ba7d7e04371 ("drm/i915/bios: ignore HDMI on port A"). Make this apply > gen12+ so they inh

Re: [Intel-gfx] [PATCH] drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:59:53) > Chris Wilson writes: > > > Still the saga of the hsw live_blt incoherency continues. While it did > > seem that the invalidate before the breadcrumb had improved the mtbf, > > nevertheless live_blt still failed. Mika's next idea was to pull the > > in

Re: [Intel-gfx] [PATCH i-g-t 7/7] test/i915: Add i915_rc6_ctx_corruption

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:13) > From: Imre Deak > > Add a test to exercise the kernel's mechanism to detection of RC6 > context corruptions, take the necessary action in response (disable > RC6 and runtime PM) and recover when possible (after system > suspend/resume). > > v2: > - S

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 5/7] Add tests/gem_blt_parse

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:11) > From: Mika Kuoppala > > For testing blitter engine command parser on gen9. > > v2: bad jump offset > v3: rebase > v4: improve bb start and subcase it > v5: fix presumed offsets (Jon) > > Signed-off-by: Mika Kuoppala > --- > tests/Makefile.sources

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/gt: Invalidate as we write the gen7 breadcrumb URL : https://patchwork.freedesktop.org/series/69408/ State : warning == Summary == $ dim checkpatch origin/drm-tip f30aa89cb9aa drm/i915/gt: Invalidate as we write the gen7 breadcrumb -:11: ERROR:GIT_COMMIT_I

Re: [Intel-gfx] [PATCH 1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Be consistent in our mocs setup on Tigerlake and set the unused control > value to follow the PTE entry as we previously have done. The unused > values are beyond the defines of the ABI, the consistency simplifies our > checking. > > Signed-off-by: Chris Wilson Reviewed-b

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/7] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:08) > From: Jon Bloomfield > > gen9+ introduces a cmdparser for the BLT engine which copies the > incoming BB to a kmd owned buffer for submission (to prevent changes > being made after the bb has been safely scanned). This breaks the > spin functionality b

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree URL : https://patchwork.freedesktop.org/series/69399/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7331 -> Patchwork_15248

Re: [Intel-gfx] [PATCH] drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Still the saga of the hsw live_blt incoherency continues. While it did > seem that the invalidate before the breadcrumb had improved the mtbf, > nevertheless live_blt still failed. Mika's next idea was to pull the > invalidate-stall into the breadcrumb write itself. > > Ref

Re: [Intel-gfx] [PATCH i-g-t 1/7] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:07) > To simplify emitting the recursive batch, make batch > always the first object on the execbuf list. Requires v4.13. Useful to leave as a note. Fwiw, looks like 3.16 and 4.14 are still rotting away slowly. -Chris

[Intel-gfx] [PATCH i-g-t 6/7] lib/igt_aux: Add helper to query suspend-to-mem modes

2019-11-13 Thread Mika Kuoppala
From: Imre Deak Add a helper to query the supported and currently selected suspend-to-mem modes. v2: - Fix for old kernels where the mem_sleep sysfs file didn't yet exist. Signed-off-by: Imre Deak --- lib/igt_aux.c | 81 +++ lib/igt_aux.h | 24 +

[Intel-gfx] [PATCH i-g-t 5/7] Add tests/gem_blt_parse

2019-11-13 Thread Mika Kuoppala
From: Mika Kuoppala For testing blitter engine command parser on gen9. v2: bad jump offset v3: rebase v4: improve bb start and subcase it v5: fix presumed offsets (Jon) Signed-off-by: Mika Kuoppala --- tests/Makefile.sources| 3 + tests/i915/gem_blt_parse.c| 997

[Intel-gfx] [PATCH i-g-t 1/7] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Mika Kuoppala
To simplify emitting the recursive batch, make batch always the first object on the execbuf list. v2: set handles early, poll_ptr indecency (Chris) v3: allow dep with poll v4: fix gem_exec_schedule v5: rebase v6: rebase v6: gem_ctx_shared v7: conditional close of poll handle Cc: Chris Wilson Sig

[Intel-gfx] [PATCH i-g-t 2/7] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Mika Kuoppala
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

[Intel-gfx] [PATCH i-g-t 7/7] test/i915: Add i915_rc6_ctx_corruption

2019-11-13 Thread Mika Kuoppala
From: Imre Deak Add a test to exercise the kernel's mechanism to detection of RC6 context corruptions, take the necessary action in response (disable RC6 and runtime PM) and recover when possible (after system suspend/resume). v2: - Skip test on non-existing engines. - Fix for old kernels where

[Intel-gfx] [PATCH i-g-t 4/7] tests/i915: Skip if secure batches is not available

2019-11-13 Thread Mika Kuoppala
From: "Kuoppala, Mika" If we can't do secure execbuf, there is no point in trying. Signed-off-by: Kuoppala, Mika --- tests/i915/gem_exec_params.c | 16 tests/i915/gem_mocs_settings.c | 14 ++ tests/perf_pmu.c | 11 +++ 3 files changed, 41 in

[Intel-gfx] [PATCH i-g-t 3/7] lib/i915: Add query to detect if engine accepts only ro batches

2019-11-13 Thread Mika Kuoppala
From: "Kuoppala, Mika" If cmd parser is mandatory, batch can't be modified post execbuf. Some tests rely on modifying batch post execbuf. Give those tests a method to query if those modifications ever reach the actual engine command stream. v2: pull in the test changes, doh v3: class based query

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