On Tue, Nov 12, 2019 at 8:38 AM Ville Syrjala
wrote:
>
> From: Ville Syrjälä
>
> Move intel_crtc_active() next to its only remaining
> user (pre-g4x wm code).
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 19 ---
> drivers/gpu/drm/i915/d
> -Original Message-
> From: Ville Syrjälä
> Sent: Monday, November 11, 2019 7:34 PM
> To: Kadiyala, Kishore
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gen9: Add missing 10bpc formats
>
> On Mon, Nov 11, 2019 at 09:22:41AM +0530, Kishore Kadiyala
== Series Details ==
Series: series starting with [1/2] drm/i915: Explicitly cleanup
initial_plane_config
URL : https://patchwork.freedesktop.org/series/69355/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7320_full -> Patchwork_15235_full
== Series Details ==
Series: drm/i915/tgl: allow DVI/HDMI on port A
URL : https://patchwork.freedesktop.org/series/69387/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7324 -> Patchwork_15247
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915/tgl: allow DVI/HDMI on port A
URL : https://patchwork.freedesktop.org/series/69387/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5569c16a4f30 drm/i915/tgl: allow DVI/HDMI on port A
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped comm
Tiger Lake supports HDMI on port A. For other platforms we ignore what the VBT
says regarding HDMI to workaround broken VBTs, see commit
2ba7d7e04371 ("drm/i915/bios: ignore HDMI on port A"). Make this apply
gen12+ so they inherit the TGL behavior.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/
== Series Details ==
Series: drm/i915: Fix a bug calling sleep function in atomic context
URL : https://patchwork.freedesktop.org/series/69385/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7324 -> Patchwork_15246
Summary
-
On Tue, Nov 12, 2019 at 02:47:57PM -0800, Matt Roper wrote:
The bspec was just updated with a minor correction to entry 61 (it
shouldn't have had the SCF bit set).
v2:
- Add a MOCS_ENTRY_UNUSED() and use it to declare the
explicitly-reserved MOCS entries. (Lucas)
- Move the warning suppression
== Series Details ==
Series: series starting with [v3,1/2] Revert "drm/i915/ehl: Update MOCS table
for EHL"
URL : https://patchwork.freedesktop.org/series/69383/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7323 -> Patchwork_15245
There are quite a few reports regarding "BUG: sleeping function called from
invalid context at mm/page_alloc.c"
Basically after the io_mapping_map_atomic_wc/kmap_atomic, it enters atomic
context, but compress_page cannot be called in atomic context as it will
call pool_alloc with GFP_KERNEL flag w
On Tue, 2019-11-12 at 13:21 -0800, Matt Roper wrote:
> On Tue, Nov 05, 2019 at 05:45:04PM -0800, José Roberto de Souza
> wrote:
> > Since VBT 228 is from this block that PSR and other power saving
> > features configuration should be read from.
> >
> > Cc: Gwan-gyeong Mun
> > Signed-off-by: José
== Series Details ==
Series: series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow
PTE on tgl as on all others
URL : https://patchwork.freedesktop.org/series/69382/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7323 -> Patchwork_15244
===
== Series Details ==
Series: drm/i915/selftests: Exercise long preemption chains
URL : https://patchwork.freedesktop.org/series/69375/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7323 -> Patchwork_15243
Summary
---
== Series Details ==
Series: series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow
PTE on tgl as on all others
URL : https://patchwork.freedesktop.org/series/69382/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3876af3a2069 drm/i915/gt: Set unused mocs entry
Matt Roper writes:
> The bspec was just updated with a minor correction to entry 61 (it
> shouldn't have had the SCF bit set).
>
> v2:
> - Add a MOCS_ENTRY_UNUSED() and use it to declare the
>explicitly-reserved MOCS entries. (Lucas)
> - Move the warning suppression from the Makefile to a #
Matt Roper writes:
> This reverts commit f4071997f1de016780ec6b79c63d90cd5886ee83.
>
> These extra EHL entries won't behave as expected without a bit more work
> on the kernel side so let's drop them until that kernel work has had a
> chance to land. Userspace trying to use these new entries won
== Series Details ==
Series: drm/i915: Flush all user surfaces prior to first use (rev5)
URL : https://patchwork.freedesktop.org/series/63871/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7323 -> Patchwork_15242
Summary
--
== Series Details ==
Series: drm/i915/selftests: Exercise long preemption chains
URL : https://patchwork.freedesktop.org/series/69375/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a2d073857c00 drm/i915/selftests: Exercise long preemption chains
-:134: WARNING:LINE_SPACING: Mis
This reverts commit f4071997f1de016780ec6b79c63d90cd5886ee83.
These extra EHL entries won't behave as expected without a bit more work
on the kernel side so let's drop them until that kernel work has had a
chance to land. Userspace trying to use these new entries won't get the
advantage of the ne
The bspec was just updated with a minor correction to entry 61 (it
shouldn't have had the SCF bit set).
v2:
- Add a MOCS_ENTRY_UNUSED() and use it to declare the
explicitly-reserved MOCS entries. (Lucas)
- Move the warning suppression from the Makefile to a #pragma that only
affects the TG
Be consistent in our mocs setup on Tigerlake and set the unused control
value to follow the PTE entry as we previously have done. The unused
values are beyond the defines of the ABI, the consistency simplifies our
checking.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 2
Probe the mocs registers for new contexts and across GPU resets. Similar
to intel_workarounds, we have tables of what register values we expect
to see, so verify that user contexts are affected by them. In the
future, we should add tests similar to intel_sseu to cover dynamic
reconfigurations.
Sig
We repeatedly (and more so in future) use the same looping construct
over the mocs definition table to setup the register state. Refactor the
loop construct into a reusable macro.
add/remove: 2/1 grow/shrink: 1/2 up/down: 113/-330 (-217)
Function old new d
As we always run new platforms through CI, we only need the debug code
compiled in during CI runs.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 30 ++--
1 file changed, 11 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel
== Series Details ==
Series: series starting with [1/4] drm/i915/fbc: Nuke bogus single pipe fbc1
restriction
URL : https://patchwork.freedesktop.org/series/69366/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7323 -> Patchwork_15241
==
== Series Details ==
Series: series starting with [1/4] drm/i915/fbc: Nuke bogus single pipe fbc1
restriction
URL : https://patchwork.freedesktop.org/series/69366/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/fbc: Nuke bogus single pipe fbc
LGTM, thanks,
Reviewed-by: Dave Airlie
On Sat, 9 Nov 2019 at 10:52, Manasi Navare wrote:
>
> In case of tiled displays, if we hotplug just one connector,
> fbcon currently just selects the preferred mode and if it is
> tiled mode then that becomes a problem if rest of the tiles are
> not presen
== Series Details ==
Series: drm/i915/selftests: Remove unused local variable 'file'
URL : https://patchwork.freedesktop.org/series/69365/
State : failure
== Summary ==
Applying: drm/i915/selftests: Remove unused local variable 'file'
Using index info to reconstruct a base tree...
M driv
== Series Details ==
Series: drm/i915/gt: More delays for gen7 flushing (rev2)
URL : https://patchwork.freedesktop.org/series/69360/
State : failure
== Summary ==
Applying: drm/i915/gt: Flush gen7 even harder
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/gt/intel_
On Tue, Nov 05, 2019 at 05:45:04PM -0800, José Roberto de Souza wrote:
> Since VBT 228 is from this block that PSR and other power saving
> features configuration should be read from.
>
> Cc: Gwan-gyeong Mun
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/display/intel_bios.
Verify that we can execute a long chain of dependent requests from
userspace, each one slightly more important than the last.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 186 +
1 file changed, 186 insertions(+)
diff --git
Since userspace has the ability to bypass the CPU cache from within its
unprivileged command stream, we have to flush the CPU cache to memory
in order to overwrite the previous contents on creation. We enforce this
at the boundary points (get/put pages) to ensure that before recycling
system pages
pulled, thanks
> On Nov 11, 2019, at 10:18 PM, Zhenyu Wang wrote:
>
>
> Hi,
>
> Here's one GVT dmabuf reference drop fix from Pan Bian.
>
> Thanks
> --
> The following changes since commit ee2c5ef8a9d640ee1617ec97b84fe2f634284e51:
>
> drm/i915/dp: Do not switch aux to TBT mode for non-TC po
On Mon, Nov 4, 2019 at 11:41 AM Rajat Jain wrote:
>
> Certain laptops now come with panels that have integrated privacy
> screens on them. This patch adds support for such panels by adding
> a privacy-screen property to the intel_connector for the panel, that
> the userspace can then use to contro
== Series Details ==
Series: drm/i915: Flush all user surfaces prior to first use (rev4)
URL : https://patchwork.freedesktop.org/series/63871/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7322 -> Patchwork_15238
Summary
--
== Series Details ==
Series: drm/i915: Flush context free work on cleanup (rev2)
URL : https://patchwork.freedesktop.org/series/69339/
State : failure
== Summary ==
Applying: drm/i915: Flush context free work on cleanup
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i91
== Series Details ==
Series: drm/i915/bios: use a flag for vbt hdmi level shift presence (rev4)
URL : https://patchwork.freedesktop.org/series/68998/
State : failure
== Summary ==
Applying: drm/i915/bios: use a flag for vbt hdmi level shift presence
Using index info to reconstruct a base tree.
Chris Wilson writes:
> Quoting Francisco Jerez (2019-07-24 21:37:24)
>> Chris Wilson writes:
>>
>> > Since userspace has the ability to bypass the CPU cache from within its
>> > unprivileged command stream, we have to flush the CPU cache to memory
>> > in order to overwrite the previous content
On Tue, 2019-11-12 at 12:46 +0200, Imre Deak wrote:
> According to internal documents I found for CMP PCHs the PCI ID
> 0xA3C1
> belongs to a CMP-V chipset. Based on the same docs the programming of
> the PCH is compatible with that of KBP. Fix up my previous wrong
> assumption accordingly using th
== Series Details ==
Series: series starting with [1/2] drm/i915: Explicitly cleanup
initial_plane_config
URL : https://patchwork.freedesktop.org/series/69355/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7320 -> Patchwork_15235
==
On Tue, 2019-11-12 at 09:16 -0800, Matt Roper wrote:
> On Tue, Nov 05, 2019 at 05:45:00PM -0800, José Roberto de Souza
> wrote:
> > PSR2 HW only support a limited number of bits per pixel, if mode
> > has
> > more than supported PSR2 should not be enabled.
> >
> > BSpec: 50422
> > BSpec: 7713
> >
On 12/11/19 10:21, Chris Wilson wrote:
Quoting Antonio Argenziano (2019-11-12 18:17:41)
On 12/11/19 07:47, Chris Wilson wrote:
If a test is only targeting the GGTT API and its corner cases, it can
only run if we have a mappable aperture.
Signed-off-by: Chris Wilson
Cc: Antonio Argenziano
Quoting Antonio Argenziano (2019-11-12 18:17:41)
>
>
> On 12/11/19 07:47, Chris Wilson wrote:
> > If a test is only targeting the GGTT API and its corner cases, it can
> > only run if we have a mappable aperture.
> >
> > Signed-off-by: Chris Wilson
> > Cc: Antonio Argenziano
> > ---
> > lib/
On 12/11/19 07:47, Chris Wilson wrote:
If a test is only targeting the GGTT API and its corner cases, it can
only run if we have a mappable aperture.
Signed-off-by: Chris Wilson
Cc: Antonio Argenziano
---
lib/i915/gem_mman.c | 19 +++
lib/i915/gem_mman.h
Quoting Mika Kuoppala (2019-11-12 17:02:18)
> Chris Wilson writes:
> > +static u32 mocs_register(const struct intel_engine_cs *engine)
> > +{
> > + static const u32 offset[] = {
> > + [RCS0] = 0x0c800,
> > + [VCS0] = 0x0c900,
> > + [VCS1] = 0x0ca00,
> > +
On Fri, Nov 8, 2019 at 10:22 PM Chris Wilson wrote:
>
> Quoting Daniel Vetter (2019-11-08 21:13:13)
> > On Fri, Nov 8, 2019 at 9:49 PM Chris Wilson
> > wrote:
> > >
> > > One of the hardest priority inversion tasks to both handle and to
> > > simulate in testing is inversion due to resource cont
> From: Sripada, Radhakrishna
> Sent: Friday, November 01, 2019 12:00 AM
> To: Chery, Nanley G; intel-gfx@lists.freedesktop.org
> Cc: Pandiyan, Dhinakaran; Syrjala, Ville; Sharma, Shashank; Antognolli,
> Rafael; Ville Syrjala; Ekstrand, Jason
> Subject: RE: [PATCH v6 09/10] drm/framebuffer/tgl: Fo
On Tue, Nov 05, 2019 at 05:45:01PM -0800, José Roberto de Souza wrote:
> eDP spec states that when sink enconters a problem that prevents it
> to keep PSR running it should set PSR status to internal error and
> set the reason why it happen to PSR_ERROR_STATUS but it is not how it
> was implemented
On Tue, Nov 05, 2019 at 05:45:00PM -0800, José Roberto de Souza wrote:
> PSR2 HW only support a limited number of bits per pixel, if mode has
> more than supported PSR2 should not be enabled.
>
> BSpec: 50422
> BSpec: 7713
> Cc: Gwan-gyeong Mun
> Signed-off-by: José Roberto de Souza
> ---
> dri
== Series Details ==
Series: drm/i915: Remove leftover gem.pm_notifier member
URL : https://patchwork.freedesktop.org/series/69348/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7312_full -> Patchwork_15231_full
Summary
---
Chris Wilson writes:
> We repeatedly (and more so in future) use the same looping construct
> over the mocs definition table to setup the register state. Refactor the
> loop construct into a reusable macro.
>
> add/remove: 2/1 grow/shrink: 1/2 up/down: 113/-330 (-217)
> Function
On 12/11/2019 16:36, Chris Wilson wrote:
drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:453 igt_threaded_blt()
error: uninitialized symbol 'file'.
Fixes: 34485832cb98 ("drm/i915/selftests: Exercise parallel blit operations on a
single ctx")
Signed-off-by: Chris Wilson
Cc: Matthew Au
From: Ville Syrjälä
Not sure where the single pipe only restriction came for fbc1.
Nothing I can see that would prevent this.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 2 -
drivers/gpu/drm/i915/display/intel_fbc.c | 47
drivers/gp
From: Ville Syrjälä
Move intel_crtc_active() next to its only remaining
user (pre-g4x wm code).
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 19 ---
drivers/gpu/drm/i915/display/intel_display.h | 1 -
drivers/gpu/drm/i915/intel_pm.c
From: Ville Syrjälä
Let's start to eliminate intel_pipe_to_cpu_transcoder() so that
we can get rid of one more crtc->config usage (which we will want
to nuke as well).
In the case of assert_fdi_tx() we know that we're never
dealing with the EDP transcoder so we can simply replace
this with a cas
From: Ville Syrjälä
In order to eliminate intel_pipe_to_cpu_transcoder() (and its
crtc->config usage) let's pass the cpu transcoder to
assert_pipe() so we don't have to do the pipe->cpu transcoder
lookup on HSW+.
On VLV/CHV this can get called during eDP init, which
happens before crtc->config->
On Fri, Nov 08, 2019 at 01:42:51PM -0800, Lucas De Marchi wrote:
> The warning should be just a warning. Where it is currently is wrong
> since we already registered the connector on drm, meaning it dies later
> on a NULL pointer deref if the VBT-overriding we have is removed. Move
> the warning up
drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:453 igt_threaded_blt()
error: uninitialized symbol 'file'.
Fixes: 34485832cb98 ("drm/i915/selftests: Exercise parallel blit operations on
a single ctx")
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gem/selftests
Chris Wilson writes:
> live_blt is still failing on hsw, showing the hallmark of incoherency.
> Since we are fairly certain that the interrupt is after the seqno is
> visible, the other possibility is that the seqno is before the writes to
> memory are flushed. Throw in an TLB invalidate before t
On Mon, 11 Nov 2019, Vandita Kulkarni wrote:
> Adding TE flags and periodic command mode flags
> as part of private flags to indicate what TE interrupts
> we would be getting instead of vblanks in case of mipi dsi
> command mode.
>
> Signed-off-by: Vandita Kulkarni
> ---
> drivers/gpu/drm/i915/d
On Mon, 11 Nov 2019, Vandita Kulkarni wrote:
> Adding all the register definitions needed
> for mipi dsi command mode.
>
> Signed-off-by: Madhav Chauhan
> Signed-off-by: Vandita Kulkarni
There may have been a few naming nitpicks I could've had, but meh.
Pushed to dinq, thanks for the patch.
B
On Mon, 11 Nov 2019, Vandita Kulkarni wrote:
> Configure the transcoder to operate in TE GATE command mode
> and take TE events from GPIO.
> Also disable the periodic command mode, that GOP would have
> programmed.
>
> Signed-off-by: Vandita Kulkarni
> ---
> drivers/gpu/drm/i915/display/icl_dsi
== Series Details ==
Series: drm/i915: Fix detection for a CMP-V PCH
URL : https://patchwork.freedesktop.org/series/69345/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7312_full -> Patchwork_15230_full
Summary
---
*
On Mon, 2019-11-11 at 17:22 -0800, Matt Roper wrote:
> On Thu, Nov 07, 2019 at 05:30:37PM +0200, Stanislav Lisovskiy wrote:
> > According to BSpec 53998, we should try to
> > restrict qgv points, which can't provide
> > enough bandwidth for desired display configuration.
> >
> > Currently we are j
On Fri, 08 Nov 2019, Jani Nikula wrote:
> Using the array is getting clumsy. Make things a bit more dynamic.
>
> Remove early returns on not having child devices when the end result
> after "iterating" the empty list would be the same.
>
> v3:
> - use list_add_tail to not reverse the child device
On Fri, 08 Nov 2019, Jani Nikula wrote:
> The pre-initialized magic value is a bit silly, switch to a flag
> instead.
>
> v2: Reduce paranoia to a single sanity check (Ville)
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
Pushed this one, thanks for the review (in another thread).
BR,
Jani
live_blt is still failing on hsw, showing the hallmark of incoherency.
Since we are fairly certain that the interrupt is after the seqno is
visible, the other possibility is that the seqno is before the writes to
memory are flushed. Throw in an TLB invalidate before the breadcrumb as
we are reasona
On Mon, 2019-11-11 at 16:15 -0800, Matt Roper wrote:
> On Thu, Nov 07, 2019 at 05:30:36PM +0200, Stanislav Lisovskiy wrote:
> > Currently intel_can_enable_sagv function contains
> > a mix of workarounds for different platforms
> > some of them are not valid for gens >= 11 already,
> > so lets split
Chris Wilson writes:
> Throw in a flush_work() to specifically flush the context cleanup work
> before the module is unloaded.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112248
> Fixes: a4e7ccdac38e ("drm/i915: Move context management under GEM")
> Signed-off-by: Chris Wilson
> C
If a test is only targeting the GGTT API and its corner cases, it can
only run if we have a mappable aperture.
Signed-off-by: Chris Wilson
Cc: Antonio Argenziano
---
lib/i915/gem_mman.c | 19 +++
lib/i915/gem_mman.h | 3 +++
tests/i915/gem_gtt_cpu_tlb.c
== Series Details ==
Series: drm/i915: Cleanups around .crtc_enable/disable()
URL : https://patchwork.freedesktop.org/series/69352/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7316 -> Patchwork_15234
Summary
---
**
Quoting Ville Syrjälä (2019-11-12 15:20:52)
> On Tue, Nov 12, 2019 at 02:36:42PM +, Chris Wilson wrote:
> > @@ -3317,7 +3313,6 @@ intel_find_initial_plane_obj(struct intel_crtc
> > *intel_crtc,
> > if (plane_config->tiling)
> > dev_priv->preserve_bios_swizzle = true;
> >
On Mon, Oct 28, 2019 at 12:38:14PM +0200, Jani Nikula wrote:
> Resend of [1]; I may have rebased but I'm not sure anymore...
>
> For starters some fairly benign cleanup, and a proposal for new struct
> drm_device based drm logging macros analoguous to core kernel struct
> device based macros.
>
>
Since userspace has the ability to bypass the CPU cache from within its
unprivileged command stream, we have to flush the CPU cache to memory
in order to overwrite the previous contents on creation. We enforce this
at the boundary points (get/put pages) to ensure that before recycling
system pages
On Tue, Nov 12, 2019 at 02:36:42PM +, Chris Wilson wrote:
> I am about to stuff more objects into the plane_config and would like to
> have it clean up after itself. Move the current framebuffer release into
> a common function so it can be extended with the new object with
> relative ease.
>
live_blt is still failing on hsw, showing the hallmark of incoherency.
Since we are fairly certain that the interrupt is after the seqno is
visible, the other possibility is that the seqno is before the writes to
memory are flushed. Throw in some more MI_FLUSH_DW before the breadcrumb
to try and fl
== Series Details ==
Series: drm/i915: Flush all user surfaces prior to first use (rev3)
URL : https://patchwork.freedesktop.org/series/63871/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7316 -> Patchwork_15233
Summary
--
On Mon, 11 Nov 2019, Vandita Kulkarni wrote:
> In case of dual link, we get the TE on slave.
> So clear the TE on slave DSI IIR.
>
> Signed-off-by: Vandita Kulkarni
> ---
> drivers/gpu/drm/i915/i915_irq.c | 62 +
> 1 file changed, 62 insertions(+)
>
> diff --git a
Hi all,
Dave and me chatted about this last week on irc. Essentially we have:
$ git grep SPDX.*GPL -- ':(glob)drivers/gpu/drm/*c'
drivers/gpu/drm/drm_client.c:// SPDX-License-Identifier: GPL-2.0
drivers/gpu/drm/drm_damage_helper.c:// SPDX-License-Identifier: GPL-2.0 OR MIT
drivers/gpu/drm/drm_dp_
Throw in a flush_work() to specifically flush the context cleanup work
before the module is unloaded.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112248
Fixes: a4e7ccdac38e ("drm/i915: Move context management under GEM")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Mika Kuoppala
On Mon, 11 Nov 2019, Vandita Kulkarni wrote:
> We need to configure TE interrupt in two places.
> Port interrupt and DSI interrupt mask registers.
>
> Signed-off-by: Vandita Kulkarni
> ---
> drivers/gpu/drm/i915/i915_irq.c | 58 +++--
> 1 file changed, 56 insertions(+
Quoting Mika Kuoppala (2019-11-12 14:23:14)
> Chris Wilson writes:
>
> > Throw in a flush_work() and rcu_barrier() to specifically flush the
> > context cleanup work.
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112248
> > Signed-off-by: Chris Wilson
> > ---
> > drivers/gpu/dr
Quoting Mika Kuoppala (2019-11-12 14:13:56)
> Chris Wilson writes:
>
> > Be consistent in our mocs setup on Tigerlake and set the unused control
> > value to follow the PTE entry as we previously have done. The unused
> > values are beyond the defines of the ABI, the consistency simplifies our
>
FIXME: fixup to original.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 522c399753fe..cdd30eeda
I am about to stuff more objects into the plane_config and would like to
have it clean up after itself. Move the current framebuffer release into
a common function so it can be extended with the new object with
relative ease.
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
---
drivers/gpu/drm/i91
As only the display codes tries to pin its preallocated framebuffer into
an exact location in the GGTT, remove the convenience function and make
the pin management explicit in the display code. Then throughout the
display management, we track the framebuffer and its plane->vma; with
less single pur
== Series Details ==
Series: drm/i915: Flush context free work on cleanup
URL : https://patchwork.freedesktop.org/series/69339/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7312_full -> Patchwork_15228_full
Summary
---
Chris Wilson writes:
> Throw in a flush_work() and rcu_barrier() to specifically flush the
> context cleanup work.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112248
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 1 +
> drivers/gpu/drm/i915/gt
From: Ville Syrjälä
Rename pipe_config to new_crtc_state in the .crtc_enable() hooks.
The 'pipe_config' name is a zombie that we need to finally put down.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 175 +--
1 file changed, 86 insertions(+),
From: Ville Syrjälä
Get rid of the horrible aliasing drm_crtc and intel_crtc variables
in the crtc enable/disable hooks.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 142 +--
1 file changed, 65 insertions(+), 77 deletions(-)
diff --git a/driv
From: Ville Syrjälä
My eyes have been bleeding long enough. Let's try to clean up some of
this mess.
Ville Syrjälä (10):
drm/i915: Change intel_encoders_() calling convention
drm/i915: Add intel_crtc_vblank_off()
drm/i915: Move assert_vblank_disabled() into intel_crtc_vblank_on()
drm/i91
From: Ville Syrjälä
Move the assert_vblank_disabled() into intel_crtc_vblank_on()
so that we don't have to inline it all over.
This does mean we now assert_vblank_disabled() during readout as well
but that is totally fine as it happens after drm_crtc_vblank_reset().
One can even argue it's what
From: Ville Syrjälä
Just pass the atomic_state+crtc to the watermarks hooks. Eeasier
time for the caller when it doesn't have to think what to pass.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 32 +-
drivers/gpu/drm/i915/i915_drv.h | 6
From: Ville Syrjälä
Get rid of the last 'dev' usage in ironlake_crtc_enable() by
passing dev_priv to cpt_verify_modeset().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i91
From: Ville Syrjälä
We already have intel_crtc_vblank_on(). Add a counterpart so we
don't have to inline the disable+assert all over.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git
From: Ville Syrjälä
Just pass the atomic state+crtc to the .crtc_enable()
.crtc_disable(). Life is easier when you don't have to think
whether to pass the old or the new crtc state.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 58 +++-
drivers
From: Ville Syrjälä
Switch to intel_crtc from drm_crtc.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/inte
From: Ville Syrjälä
intel_modeset_setup_hw_state() doesn't need the crtc_state at the
top level scope. Move it to where it's needed.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/dri
From: Ville Syrjälä
Just pass the atomic state and the crtc to intel_encoders_enable() & co.
Make life simpler when you don't have to think which state (old vs. new)
you have to pass in. Also constify the states while at it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_d
Chris Wilson writes:
> Be consistent in our mocs setup on Tigerlake and set the unused control
> value to follow the PTE entry as we previously have done. The unused
> values are beyond the defines of the ABI, the consistency simplifies our
> checking.
Simplifies how?
>
> Signed-off-by: Chris W
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