== Series Details ==
Series: drm/i915: Add feature flag for platforms with DRAM info
URL : https://patchwork.freedesktop.org/series/67801/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7045_full -> Patchwork_14732_full
Summ
On 2019/10/1 上午5:36, Alex Williamson wrote:
On Fri, 27 Sep 2019 16:25:13 +
Parav Pandit wrote:
Hi Alex,
-Original Message-
From: Alex Williamson
Sent: Tuesday, September 24, 2019 6:07 PM
To: Jason Wang
Cc: k...@vger.kernel.org; linux-s...@vger.kernel.org; linux-
ker...@vger.k
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Protect peeking at
execlists->active (rev4)
URL : https://patchwork.freedesktop.org/series/67782/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7044_full -> Patchwork_14731_full
==
== Series Details ==
Series: drm/i915/vbt: Handle generic DTD block
URL : https://patchwork.freedesktop.org/series/67811/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14741
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915/vbt: Handle generic DTD block
URL : https://patchwork.freedesktop.org/series/67811/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4081e8320e9c drm/i915/vbt: Handle generic DTD block
-:46: WARNING:UNNECESSARY_ELSE: else is not generally usef
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Add microcontrollers
documentation section
URL : https://patchwork.freedesktop.org/series/67810/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14740
== Series Details ==
Series: series starting with [1/2] drm/i915/tgl: the BCS engine supports
relative MMIO
URL : https://patchwork.freedesktop.org/series/67809/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14739
== Series Details ==
Series: drm/dp-mst: Drop connection_mutex check
URL : https://patchwork.freedesktop.org/series/67807/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14738
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/dp-mst: Drop connection_mutex check
URL : https://patchwork.freedesktop.org/series/67807/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/dp-mst: Drop connection_mutex check
-
+ ^~~
+drivers/gpu/d
== Series Details ==
Series: drm/dp-mst: Drop connection_mutex check
URL : https://patchwork.freedesktop.org/series/67807/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1d7c57f40bb1 drm/dp-mst: Drop connection_mutex check
-:8: ERROR:GIT_COMMIT_ID: Please use git commit descript
VBT revision 229 adds a new "Generic DTD" block 58 and deprecates the
old LFP panel mode data in block 42. Let's start parsing this block to
fill in the panel fixed mode on devices with a >=229 VBT.
Bspec: 54751
Bspec: 20148
Signed-off-by: Matt Roper
---
I don't think we've encountered any devic
To better organize the information, add a microcontrollers section and
move/link the GuC, HuC and DMC documentation under it. Also add a small
intro.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Acked-by: Anna Karas
Reviewed-by: Martin Peres
---
Documentation/gpu/i915.rst | 18 +
Add a short description of what we expect from GuC and some minor
improvements to existing documentation. Also remove a comment about a
difference between GuC and HuC that is not true anymore.
v2: add that the GuC is not mandatory (Martin)
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal Wajdecz
Better explain the usage of the microcontroller and what i915 is
responsible of. While at it, fix the documentation for the auth
function, which doesn't do any pinning anymore.
v2: add a comment on HuC being optional and descrive how HuC accesses
memory (Martin)
Signed-off-by: Daniele Ceraolo
== Series Details ==
Series: series starting with [v7,1/6] drm/i915/display/icl: Save Master
transcoder in slave's crtc_state for Transcoder Port Sync
URL : https://patchwork.freedesktop.org/series/67806/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14737
=
== Series Details ==
Series: series starting with [1/9] drm/i915/perf: store the associated engine
of a stream
URL : https://patchwork.freedesktop.org/series/67804/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14736
=
Hi all,
After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
In file included from drivers/gpu/drm/i915/i915_vma.h:35,
from drivers/gpu/drm/i915/gt/uc/intel_guc.h:17,
from drivers/gpu/drm/i915/gt/uc/intel_uc.h:9,
== Series Details ==
Series: series starting with [1/9] drm/i915/perf: store the associated engine
of a stream
URL : https://patchwork.freedesktop.org/series/67804/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bf2b0e099619 drm/i915/perf: store the associated engine of a strea
== Series Details ==
Series: series starting with [01/11] drm/i915/perf: Disable rc6 only while OA
is enabled (rev2)
URL : https://patchwork.freedesktop.org/series/67802/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14735
===
== Series Details ==
Series: drm/print: cleanup and new drm_device based logging
URL : https://patchwork.freedesktop.org/series/67795/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7043_full -> Patchwork_14728_full
Summary
== Series Details ==
Series: series starting with [01/11] drm/i915/perf: Disable rc6 only while OA
is enabled (rev2)
URL : https://patchwork.freedesktop.org/series/67802/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
abb0ff1fe0d5 drm/i915/perf: Disable rc6 only while OA is ena
== Series Details ==
Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad (rev2)
URL : https://patchwork.freedesktop.org/series/67786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14734
On 10/9/19 2:44 PM, Daniele Ceraolo Spurio wrote:
On 10/9/19 7:41 AM, Martin Peres wrote:
On 28/09/2019 00:42, Daniele Ceraolo Spurio wrote:
Better explain the usage of the microcontroller and what i915 is
responsible of. While at it, fix the documentation for the auth
function, which doesn
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to
dev_priv (rev2)
URL : https://patchwork.freedesktop.org/series/67799/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7046 -> Patchwork_14733
===
The specs don't mention any specific HW limitation on the blitter and
manual inspection shows that the HW does set the relative MMIO bit in
the LRI of the blitter context image, so we can remove our limitations.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Chris Wilson
Cc: John Harrison
Cc: Mika K
There are small differences between the blitter and the video engines in
the xcs context image (e.g. registers 0x200 and 0x204 only exist on the
blitter). Since we never explicitly set a value for those register and
given that we don't need to update the offsets in the lrc image when we
change engi
== Series Details ==
Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad
URL : https://patchwork.freedesktop.org/series/67786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7043_full -> Patchwork_14726_full
==
oh, completely forgot about this one
Reviewed-by: Lyude Paul
On Thu, 2019-10-10 at 00:41 +0200, Daniel Vetter wrote:
> Private atomic objects have grown their own locking with
>
> commit b962a12050a387e4bbf3a48745afe1d29d396b0d
> Author: Rob Clark
> Date: Mon Oct 22 14:31:22 2018 +0200
>
>
Private atomic objects have grown their own locking with
commit b962a12050a387e4bbf3a48745afe1d29d396b0d
Author: Rob Clark
Date: Mon Oct 22 14:31:22 2018 +0200
drm/atomic: integrate modeset lock with private objects
which means we're no longer relying on connection_mutex for mst state
loc
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to
dev_priv (rev2)
URL : https://patchwork.freedesktop.org/series/67799/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7da5381e3ab8 drm/i915: Move SAGV block time to dev_priv
-:63: WARNIN
As per the display enable sequence, we need to follow the enable sequence
for slaves first with DP_TP_CTL set to Idle and configure the transcoder
port sync register to select the corersponding master, then follow the
enable sequence for master leaving DP_TP_CTL to idle.
At this point the transcode
After the state is committed, we readout the HW registers and compare
the HW state with the SW state that we just committed.
For Transcdoer port sync, we add master_transcoder and the
salves bitmask to the crtc_state, hence we need to read those during
the HW state readout to avoid pipe state misma
In the transcoder port sync mode, the slave transcoders mask their vblanks
until master transcoder's vblank so while disabling them, make
sure slaves are disabled first and then the masters.
v5:
* Dont pass dev priv to get_slave_crtc (Ville)
v4:
* Obtain slave state from master (Maarten)
v3:
* Reb
This clears the transcoder port sync bits of the TRANS_DDI_FUNC_CTL2
register during crtc_disable().
v2:
* Directly write the trans_port_sync reg value (Maarten)
Cc: Ville Syrjälä
Cc: Maarten Lankhorst
Cc: Matt Roper
Cc: Jani Nikula
Signed-off-by: Manasi Navare
Reviewed-by: Maarten Lankhorst
In case of tiled displays when the two tiles are sent across two CRTCs
over two separate DP SST connectors, we need a mechanism to synchronize
the two CRTCs and their corresponding transcoders.
So use the master-slave mode where there is one master corresponding
to last horizontal and vertical tile
In case of tiled displays where different tiles are displayed across
different ports, we need to synchronize the transcoders involved.
This patch implements the transcoder port sync feature for
synchronizing one master transcoder with one or more slave
transcoders. This is only enbaled in slave tra
On 10/9/19 7:41 AM, Martin Peres wrote:
On 28/09/2019 00:42, Daniele Ceraolo Spurio wrote:
Better explain the usage of the microcontroller and what i915 is
responsible of. While at it, fix the documentation for the auth
function, which doesn't do any pinning anymore.
Signed-off-by: Daniele Ce
On Wed, Oct 09, 2019 at 05:01:20PM -0400, Daniele Castagna wrote:
> On Wed, Oct 9, 2019 at 1:34 PM Matt Roper wrote:
> >
> > The previous version of this series was posted in February here:
> >
> > https://lists.freedesktop.org/archives/dri-devel/2019-February/208068.html
> >
> > Right be
From: Lionel Landwerlin
Introduce a new perf_ioctl command to change the OA configuration of the
active stream. This allows the OA stream to be reconfigured between
batch buffers, giving greater flexibility in sampling. We inject a
request into the OA context to reconfigure the stream asynchronou
From: Lionel Landwerlin
We would like to make use of perf in Vulkan. The Vulkan API is much
lower level than OpenGL, with applications directly exposed to the
concept of command buffers (pretty much equivalent to our batch
buffers). In Vulkan, queries are always limited in scope to a command
buff
From: Lionel Landwerlin
Here we introduce a mechanism by which the execbuf part of the i915
driver will be able to request that a batch buffer containing the
programming for a particular OA config be created.
We'll execute these OA configuration buffers right before executing a
set of userspace
We set out-of-bound parameters inside the i915_requests.flags field,
such as disabling preemption or marking the end-of-context. We should
not coalesce consecutive requests if they have differing instructions
as we only inspect the last active request in a context. Thus if we
allow a later request
From: Lionel Landwerlin
NOA configuration take some amount of time to apply. That amount of
time depends on the size of the GT. There is no documented time for
this. For example, past experimentations with powergating
configuration changes seem to indicate a 60~70us delay. We go with
500us as def
From: Lionel Landwerlin
We haven't run into issues with programming the global OA/NOA
registers configuration from CPU so far, but HW engineers actually
recommend doing this from the command streamer. On TGL in particular
one of the clock domain in which some of that programming goes might
not be
From: Lionel Landwerlin
Listing configurations at the moment is supported only through sysfs.
This might cause issues for applications wanting to list
configurations from a container where sysfs isn't available.
This change adds a way to query the number of configurations and their
content throu
From: Lionel Landwerlin
Reporting this version will help application figure out what level of
the support the running kernel provides.
v2: Add i915_perf_ioctl_version() (Chris)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_getparam.c | 4
driv
From: Lionel Landwerlin
We'll use this information later to verify that a client trying to
reconfigure the stream does so on the right engine. For now, we want to
pull the knowledge of which engine we use into a central property.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_p
== Series Details ==
Series: series starting with [1/9] drm/i915: Expose 10:10:10 XRGB formats on
SNB-BDW sprites (rev2)
URL : https://patchwork.freedesktop.org/series/67741/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7042_full -> Patchwork_14725_full
=
== Series Details ==
Series: drm/i915: Add feature flag for platforms with DRAM info
URL : https://patchwork.freedesktop.org/series/67801/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7045 -> Patchwork_14732
Summary
--
On 09/10/2019 23:52, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-10-09 21:46:56)
Hmm... nope, sorry.
We'll loose NOA configuration if you do that.
And you'll have to rerun the oa config BO prior to enabling.
Is that not worth it? Move the enable_metric_set/disable_metric_set to
i915_pe
On Wed, Oct 9, 2019 at 1:34 PM Matt Roper wrote:
>
> The previous version of this series was posted in February here:
>
> https://lists.freedesktop.org/archives/dri-devel/2019-February/208068.html
>
> Right before we merged this in February Maarten noticed that we should
> be setting up t
Quoting Lionel Landwerlin (2019-10-09 21:46:56)
> Hmm... nope, sorry.
>
> We'll loose NOA configuration if you do that.
> And you'll have to rerun the oa config BO prior to enabling.
Is that not worth it? Move the enable_metric_set/disable_metric_set to
i915_perf_enable_locked as well?
-Chris
___
From: Lionel Landwerlin
NOA configuration take some amount of time to apply. That amount of
time depends on the size of the GT. There is no documented time for
this. For example, past experimentations with powergating
configuration changes seem to indicate a 60~70us delay. We go with
500us as def
Hmm... nope, sorry.
We'll loose NOA configuration if you do that.
And you'll have to rerun the oa config BO prior to enabling.
-Lionel
On 09/10/2019 23:36, Chris Wilson wrote:
Move rpm_get and forcewake_get into the perf enable (and corresponding
the puts into the disable) so that we only prev
Before we BUG out with bad pending state, leave a telltale as to which
test failed.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 30 -
drivers/gpu/drm/i915/i915_gem.h | 8
2 files changed, 2
From: Lionel Landwerlin
Listing configurations at the moment is supported only through sysfs.
This might cause issues for applications wanting to list
configurations from a container where sysfs isn't available.
This change adds a way to query the number of configurations and their
content throu
From: Lionel Landwerlin
Here we introduce a mechanism by which the execbuf part of the i915
driver will be able to request that a batch buffer containing the
programming for a particular OA config be created.
We'll execute these OA configuration buffers right before executing a
set of userspace
From: Lionel Landwerlin
We would like to make use of perf in Vulkan. The Vulkan API is much
lower level than OpenGL, with applications directly exposed to the
concept of command buffers (pretty much equivalent to our batch
buffers). In Vulkan, queries are always limited in scope to a command
buff
From: Lionel Landwerlin
Introduce a new perf_ioctl command to change the OA configuration of the
active stream. This allows the OA stream to be reconfigured between
batch buffers, giving greater flexibility in sampling. We inject a
request into the OA context to reconfigure the stream asynchronou
From: Lionel Landwerlin
We'll use this information later to verify that a client trying to
reconfigure the stream does so on the right engine. For now, we want to
pull the knowledge of which engine we use into a central property.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_p
We set out-of-bound parameters inside the i915_requests.flags field,
such as disabling preemption or marking the end-of-context. We should
not coalesce consecutive requests if they have differing instructions
as we only inspect the last active request in a context. Thus if we
allow a later request
Rename the function for consistency, and remove the redundant test.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_perf.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 6fa5c9dc3
Move rpm_get and forcewake_get into the perf enable (and corresponding
the puts into the disable) so that we only prevent powermaangement while
we OA is engaged.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_perf.c | 49 --
drivers/gpu/drm/i915/i915_perf
From: Lionel Landwerlin
NOA configuration take some amount of time to apply. That amount of
time depends on the size of the GT. There is no documented time for
this. For example, past experimentations with powergating
configuration changes seem to indicate a 60~70us delay. We go with
500us as def
From: Lionel Landwerlin
We haven't run into issues with programming the global OA/NOA
registers configuration from CPU so far, but HW engineers actually
recommend doing this from the command streamer. On TGL in particular
one of the clock domain in which some of that programming goes might
not be
From: Lionel Landwerlin
Reporting this version will help application figure out what level of
the support the running kernel provides.
v2: Add i915_perf_ioctl_version() (Chris)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_getparam.c | 4
driv
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Protect peeking at
execlists->active (rev4)
URL : https://patchwork.freedesktop.org/series/67782/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7044 -> Patchwork_14731
On Wed, Oct 09, 2019 at 01:00:07PM -0700, Rodrigo Vivi wrote:
> On Wed, Oct 09, 2019 at 10:29:43AM -0700, Matt Roper wrote:
> > On Wed, Oct 09, 2019 at 10:03:31AM +0300, Timo Aaltonen wrote:
> > > On 17.9.2019 2.32, Matt Roper wrote:
> > > > The CMP PCH ID we have in the driver is correct for the C
On Wed, Oct 09, 2019 at 06:15:26PM +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to
> dev_priv
> URL : https://patchwork.freedesktop.org/series/67799/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI
On Wed, Oct 09, 2019 at 10:29:43AM -0700, Matt Roper wrote:
> On Wed, Oct 09, 2019 at 10:03:31AM +0300, Timo Aaltonen wrote:
> > On 17.9.2019 2.32, Matt Roper wrote:
> > > The CMP PCH ID we have in the driver is correct for the CML-U machines we
> > > have
> > > in our CI system, but the CML-S and
== Series Details ==
Series: drm/i915: remove redundant variable err
URL : https://patchwork.freedesktop.org/series/6/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7041_full -> Patchwork_14722_full
Summary
---
*
Quoting Lionel Landwerlin (2019-10-09 15:15:55)
> On 09/10/2019 17:10, Chris Wilson wrote:
> > Are you happy with associating the i915_perf_stream with the
> > specific_ctx and controlling all the parameters via perf-ioctl?
> >
>
> Yeah sounds like it should work, I would like to test the whole se
On Wed, Oct 09, 2019 at 07:57:33PM +0100, Chris Wilson wrote:
> Quoting Sean Paul (2019-10-09 19:53:31)
> > On Thu, Aug 22, 2019 at 7:17 AM Chris Wilson
> > wrote:
> > >
> > > Quoting Joonas Lahtinen (2019-08-22 12:12:03)
> > > > Quoting Chris Wilson (2019-08-22 09:59:17)
> > > > > You have to cu
On Fri, 2019-09-27 at 09:52 -0400, Sean Paul wrote:
> On Tue, Sep 03, 2019 at 04:46:03PM -0400, Lyude Paul wrote:
> > Finally! For a very long time, our MST helpers have had one very
> > annoying issue: They don't know how to reprobe the topology state when
> > coming out of suspend. This means tha
Platforms prior to gen9 to not supply this info to software.
Instead of checking the platform directly, add a new feature
flag, HAS_DRAM_INFO, to allow us to quickly tell if the platform
supports this feature.
v2: Fix commit message and change feature flag name to HAS_DRAM_INFO
Signed-off-by: Stu
Quoting Sean Paul (2019-10-09 19:53:31)
> On Thu, Aug 22, 2019 at 7:17 AM Chris Wilson wrote:
> >
> > Quoting Joonas Lahtinen (2019-08-22 12:12:03)
> > > Quoting Chris Wilson (2019-08-22 09:59:17)
> > > > You have to cut it off at the neck, otherwise it just reappears in the
> > > > next merge, li
On Thu, Aug 22, 2019 at 7:17 AM Chris Wilson wrote:
>
> Quoting Joonas Lahtinen (2019-08-22 12:12:03)
> > Quoting Chris Wilson (2019-08-22 09:59:17)
> > > You have to cut it off at the neck, otherwise it just reappears in the
> > > next merge, like commit 3f866026f0ce ("Merge drm/drm-next
> > > in
== Series Details ==
Series: drm/i915/execlists: Prevent merging requests with conflicting flags
URL : https://patchwork.freedesktop.org/series/67776/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7041_full -> Patchwork_14721_full
==
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv
URL : https://patchwork.freedesktop.org/series/67799/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14730
===
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Jani Nikula
>Sent: Wednesday, October 9, 2019 11:38 AM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
>Cc: Nikula, Jani ; Sam Ravnborg
>Subject: [Intel-gfx] [PATCH 8/8
On Sun, Oct 06, 2019 at 08:43:31PM -0700, Manasi Navare wrote:
> On Mon, Sep 30, 2019 at 05:14:15PM +0300, Ville Syrjälä wrote:
> > On Sun, Sep 22, 2019 at 10:08:02AM -0700, Manasi Navare wrote:
> > > In case of tiled displays when the two tiles are sent across two CRTCs
> > > over two separate DP
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Move SAGV block time to dev_priv
URL : https://patchwork.freedesktop.org/series/67799/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e6a4842921d1 drm/i915: Move SAGV block time to dev_priv
-:63: WARNING:UNNECE
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Protect peeking at
execlists->active (rev3)
URL : https://patchwork.freedesktop.org/series/67782/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14729
On Wed, Oct 09, 2019 at 10:03:31AM +0300, Timo Aaltonen wrote:
> On 17.9.2019 2.32, Matt Roper wrote:
> > The CMP PCH ID we have in the driver is correct for the CML-U machines we
> > have
> > in our CI system, but the CML-S and CML-H CI machines appear to use a
> > different PCH ID, leading our d
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v5.4-rc2 next-20191009]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base&#x
From: James Ausmus
Starting from TGL, we now need to read the SAGV block time via a PCODE
mailbox, rather than having a static value.
BSpec: 49326
v2: Fix up pcode val data type (Ville), tighten variable scope (Ville)
Cc: Ville Syrjälä
Cc: Stanislav Lisovskiy
Cc: Lucas De Marchi
Signed-off-
From: James Ausmus
In prep for newer platforms having more complicated ways to determine
the SAGV block time, move the variable to dev_priv, and extract the
setting to an initial setup function. While we're at it, update the if
ladder to follow the new gen -> old gen order preference, and warn on
== Series Details ==
Series: drm/print: cleanup and new drm_device based logging
URL : https://patchwork.freedesktop.org/series/67795/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14728
Summary
---
Quoting Tvrtko Ursulin (2019-10-09 17:37:42)
>
> On 09/10/2019 16:59, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-10-09 16:53:53)
> >>
> >> On 09/10/2019 11:26, Chris Wilson wrote:
> >>> +static inline void
> >>> +execlists_active_lock(struct intel_engine_execlists *execlists)
> >>> +{
>
On 09/10/2019 17:32, Chris Wilson wrote:
Quoting Chris Wilson (2019-10-09 17:09:06)
The active/pending execlists is no longer protected by the
engine->active.lock, but is serialised by the tasklet instead. Update
the locking around the debug and stats to follow suit.
v2: local_bh_disable() to
== Series Details ==
Series: drm/print: cleanup and new drm_device based logging
URL : https://patchwork.freedesktop.org/series/67795/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
89aa720fbb9a drm/i915: use drm_debug_enabled() to check for debug categories
ad0afd4a8ac2 drm/nou
== Series Details ==
Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad
URL : https://patchwork.freedesktop.org/series/67786/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK include/generated/compile.h
AR
== Series Details ==
Series: drm/i915/execlists: Leave tell-tales as to why pending[] is bad
URL : https://patchwork.freedesktop.org/series/67786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7043 -> Patchwork_14726
Summar
== Series Details ==
Series: treewide: remove unused argument in lock_release() (rev2)
URL : https://patchwork.freedesktop.org/series/67007/
State : failure
== Summary ==
Applying: locking/lockdep: Remove unused @nested argument from lock_release()
error: sha1 information is lacking or useless
On 09/10/2019 16:59, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-10-09 16:53:53)
On 09/10/2019 11:26, Chris Wilson wrote:
+static inline void
+execlists_active_lock(struct intel_engine_execlists *execlists)
+{
+ tasklet_lock(&execlists->tasklet);
+}
+
+static inline void
+execlists_a
Quoting Chris Wilson (2019-10-09 17:09:06)
> The active/pending execlists is no longer protected by the
> engine->active.lock, but is serialised by the tasklet instead. Update
> the locking around the debug and stats to follow suit.
>
> v2: local_bh_disable() to prevent recursing into the tasklet
Applied. thanks!
Alex
On Tue, Oct 8, 2019 at 8:36 PM Stephen Rothwell wrote:
>
> Hi all,
>
> After merging the drm-misc tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> In file included from drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_module.c:25:
> drivers/gpu/drm/amd/
The active/pending execlists is no longer protected by the
engine->active.lock, but is serialised by the tasklet instead. Update
the locking around the debug and stats to follow suit.
v2: local_bh_disable() to prevent recursing into the tasklet in case we
trigger a softirq (Tvrtko)
Fixes: df40306
Quoting Tvrtko Ursulin (2019-10-09 16:53:53)
>
> On 09/10/2019 11:26, Chris Wilson wrote:
> > +static inline void
> > +execlists_active_lock(struct intel_engine_execlists *execlists)
> > +{
> > + tasklet_lock(&execlists->tasklet);
> > +}
> > +
> > +static inline void
> > +execlists_active_unlo
On Fri, Oct 04, 2019 at 01:01:36PM +0100, Tvrtko Ursulin wrote:
>
> On 04/10/2019 12:17, Chris Wilson wrote:
> > Quoting Chris Wilson (2019-10-04 12:07:10)
> > > Quoting Tvrtko Ursulin (2019-10-04 10:15:20)
> > > >
> > > > On 03/10/2019 22:01, Chris Wilson wrote:
> > > > > A few callers need to s
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