[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,v6,1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [CI,v6,1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync URL : https://patchwork.freedesktop.org/series/67551/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6999_full -> Patchwork

[Intel-gfx] ✗ Fi.CI.IGT: failure for DP Phy compliace auto test.

2019-10-03 Thread Patchwork
== Series Details == Series: DP Phy compliace auto test. URL : https://patchwork.freedesktop.org/series/67546/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6998_full -> Patchwork_14653_full Summary --- **FAILURE**

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) (rev9)

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) (rev9) URL : https://patchwork.freedesktop.org/series/67529/ State : success == Summary == CI Bug Log - changes from CI_DRM_6998_full -> Patchwork_14652_full ===

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Implement a better i945gm vblank irq vs. C-states workaround

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Implement a better i945gm vblank irq vs. C-states workaround URL : https://patchwork.freedesktop.org/series/67541/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6998_full -> Patchwork_14651_full ===

[Intel-gfx] linux-next: manual merge of the drm-misc tree with the admgpu tree

2019-10-03 Thread Stephen Rothwell
Hi all, Today's linux-next merge of the drm-misc tree got a conflict in: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c between commit: 2f232cf29e03 ("drm/amdgpu/dm/mst: Don't create MST topology managers for eDP ports") from the admgpu tree and commit: ae85b0df124f ("drm_

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_ctx_isolation: Bump support for Tigerlake

2019-10-03 Thread Stimson, Dale B
> On Wed, Oct 02, 2019 at 12:26:48PM +0100, Chris Wilson wrote: > > There's very little variation in non-privileged registers for Tigerlake, > > so we can mostly inherit the set from gen11. There is no whitelist at > > present, so we do not need to add any special registers. > > > > Bugzilla: http

[Intel-gfx] ✓ Fi.CI.BAT: success for TGL HAX drm/i915/tgl: Interrupts are overrated (rev2)

2019-10-03 Thread Patchwork
== Series Details == Series: TGL HAX drm/i915/tgl: Interrupts are overrated (rev2) URL : https://patchwork.freedesktop.org/series/67558/ State : success == Summary == CI Bug Log - changes from CI_DRM_7000 -> Patchwork_14660 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/execlists: Skip redundant resubmission

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915/execlists: Skip redundant resubmission URL : https://patchwork.freedesktop.org/series/67566/ State : success == Summary == CI Bug Log - changes from CI_DRM_7000 -> Patchwork_14659

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Skip redundant resubmission

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Skip redundant resubmission URL : https://patchwork.freedesktop.org/series/67537/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6997_full -> Patchwork_14650_full Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/execlists: Skip redundant resubmission

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915/execlists: Skip redundant resubmission URL : https://patchwork.freedesktop.org/series/67566/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8852b84cf9e7 drm/i915/execlists: Skip redundant resubmission b34677b475f8

[Intel-gfx] ✓ Fi.CI.BAT: success for LMEM basics (rev2)

2019-10-03 Thread Patchwork
== Series Details == Series: LMEM basics (rev2) URL : https://patchwork.freedesktop.org/series/67350/ State : success == Summary == CI Bug Log - changes from CI_DRM_7000 -> Patchwork_14658 Summary --- **SUCCESS** No regressions fo

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for LMEM basics (rev2)

2019-10-03 Thread Patchwork
== Series Details == Series: LMEM basics (rev2) URL : https://patchwork.freedesktop.org/series/67350/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915/stolen: make the object creation interface consistent Okay! Commit: drm/i915: introduce intel

[Intel-gfx] [PATCH] TGL HAX drm/i915/tgl: Interrupts are overrated

2019-10-03 Thread Chris Wilson
Why sleep when you can busywait for an interrupt? Throw out the old irq handlers, and use irq_poll instead. References: https://bugs.freedesktop.org/show_bug.cgi?id=111880 Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/Kconfig | 1 + drivers/gpu/drm/i915

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for LMEM basics (rev2)

2019-10-03 Thread Patchwork
== Series Details == Series: LMEM basics (rev2) URL : https://patchwork.freedesktop.org/series/67350/ State : warning == Summary == $ dim checkpatch origin/drm-tip 617461d66e9a drm/i915/stolen: make the object creation interface consistent -:89: CHECK:COMPARISON_TO_NULL: Comparison to NULL cou

[Intel-gfx] ✓ Fi.CI.BAT: success for TGL HAX drm/i915/tgl: Interrupts are overrated

2019-10-03 Thread Patchwork
== Series Details == Series: TGL HAX drm/i915/tgl: Interrupts are overrated URL : https://patchwork.freedesktop.org/series/67558/ State : success == Summary == CI Bug Log - changes from CI_DRM_7000 -> Patchwork_14657 Summary --- **SU

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Add the Thunderbolt PLL divider values (rev3)

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Add the Thunderbolt PLL divider values (rev3) URL : https://patchwork.freedesktop.org/series/67498/ State : success == Summary == CI Bug Log - changes from CI_DRM_6997_full -> Patchwork_14649_full

Re: [Intel-gfx] [RFC v3 3/9] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment

2019-10-03 Thread Pandiyan, Dhinakaran
On Wed, 2019-10-02 at 15:29 -0700, Matt Roper wrote: > On Mon, Sep 23, 2019 at 03:29:29AM -0700, Dhinakaran Pandiyan wrote: > > Easier to read if all the alignment changes are in one place and contained > > within a function. > > > > Cc: Ville Syrjälä > > Cc: Matt Roper > > Signed-off-by: Dhinak

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Add getfb2 ioctl

2019-10-03 Thread Patchwork
== Series Details == Series: drm: Add getfb2 ioctl URL : https://patchwork.freedesktop.org/series/67553/ State : success == Summary == CI Bug Log - changes from CI_DRM_7000 -> Patchwork_14656 Summary --- **SUCCESS** No regressions

Re: [Intel-gfx] [RFC v3 7/9] drm/i915: Skip rotated offset adjustment for unsupported modifiers

2019-10-03 Thread Dhinakaran Pandiyan
On Mon, 2019-09-23 at 03:29 -0700, Dhinakaran Pandiyan wrote: > During framebuffer creation, we pre-compute offsets for 90/270 plane > rotation. However, only Y and Yf modifiers support 90/270 rotation. So, > skip the calculations for other modifiers. > > Cc: Matt Roper > Cc: Ville Syrjälä > Sig

[Intel-gfx] [PATCH 4/5] drm/mm: Convert drm_mm_node booleans to bitops

2019-10-03 Thread Chris Wilson
A straightforward conversion of assignment and checking of the boolean state flags (allocated, scanned) into non-atomic bitops. The caller remains responsible for all locking around the drm_mm and its nodes. Signed-off-by: Chris Wilson --- drivers/gpu/drm/drm_mm.c | 18

[Intel-gfx] [PATCH 3/5] drm/mm: Use helpers for drm_mm_node booleans

2019-10-03 Thread Chris Wilson
In preparation for rearranging the booleans into a flags field, ensure all the current users are using the inline helpers and not directly accessing the members. Signed-off-by: Chris Wilson --- drivers/gpu/drm/drm_mm.c | 19 --- .../gpu/drm/i915/gem/i915_gem_

[Intel-gfx] [PATCH 5/5] drm/mm: Use clear_bit_unlock() for releasing the drm_mm_node()

2019-10-03 Thread Chris Wilson
A few callers need to serialise the destruction of their drm_mm_node and ensure it is removed from the drm_mm before freeing. However, to be completely sure that any access from another thread is complete before we free the struct, we require the RELEASE semantics of clear_bit_unlock(). This allow

[Intel-gfx] [PATCH 2/5] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

2019-10-03 Thread Chris Wilson
Make dma_fence_enable_sw_signaling() behave like its dma_fence_add_callback() and dma_fence_default_wait() counterparts and perform the test to enable signaling under the fence->lock, along with the action to do so. This ensure that should an implementation be trying to flush the cb_list (by signal

[Intel-gfx] [PATCH 1/5] drm/i915/execlists: Skip redundant resubmission

2019-10-03 Thread Chris Wilson
If we unwind the active requests, and on resubmission discover that we intend to preempt the active context with itself, simply skip the ELSP submission. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) d

[Intel-gfx] [PATCH 04/11] drm: convert drm_mm_interval_tree to half closed intervals

2019-10-03 Thread Davidlohr Bueso
The drm_mm interval tree really wants [a, b) intervals, not fully closed as it is now. As such convert it to use the new interval_tree_gen.h. Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Signed-off-by: Davidloh

Re: [Intel-gfx] [PATCH v2 20/22] drm/i915/selftests: fallback to using the gpu to trash stolen

2019-10-03 Thread Chris Wilson
Quoting Matthew Auld (2019-10-03 20:24:42) > @@ -148,6 +190,21 @@ static int igt_gem_suspend(void *arg) > if (err) > goto out; > > + /* > +* If we lack the mappable aperture we can't really access stolen from > +* the cpu, but we can always trash it f

Re: [Intel-gfx] [PATCH v2 19/22] drm/i915: don't allocate the ring in stolen if we lack aperture

2019-10-03 Thread Chris Wilson
Quoting Matthew Auld (2019-10-03 20:24:41) > Since we have no way access it from the CPU. For such cases just > fallback to internal objects. > > Signed-off-by: Matthew Auld > --- > drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --

Re: [Intel-gfx] [PATCH v2 14/22] drm/i915: define HAS_MAPPABLE_APERTURE

2019-10-03 Thread Chris Wilson
Quoting Matthew Auld (2019-10-03 20:24:36) > From: Daniele Ceraolo Spurio > > The following patches in the series will use it to avoid certain > operations when aperture is not available in HW. > > Signed-off-by: Daniele Ceraolo Spurio > Cc: Matthew Auld > --- > drivers/gpu/drm/i915/i915_drv.

Re: [Intel-gfx] [PULL] drm-intel-fixes

2019-10-03 Thread Rodrigo Vivi
On Thu, Oct 03, 2019 at 10:37:11PM +0300, Ville Syrjälä wrote: > On Thu, Oct 03, 2019 at 12:30:51PM -0700, Rodrigo Vivi wrote: > > Hi Dave and Daniel, > > > > This v2 contains a critical DP-MST fix that it would be really good to be > > propagated as soon as possible. > > > > Besides all the drm-

Re: [Intel-gfx] [PATCH v2 08/22] drm/i915/lmem: support kernel mapping

2019-10-03 Thread Chris Wilson
Quoting Matthew Auld (2019-10-03 20:24:30) > +void __iomem *i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj, > + unsigned long n, > + unsigned long size) > +{ > + resource_size_t offset; > + > +

Re: [Intel-gfx] [PATCH v2 06/22] drm/i915: support creating LMEM objects

2019-10-03 Thread Chris Wilson
Quoting Matthew Auld (2019-10-03 20:24:28) > +const struct drm_i915_gem_object_ops i915_gem_lmem_obj_ops = { > + .get_pages = i915_gem_object_get_pages_buddy, > + .put_pages = i915_gem_object_put_pages_buddy, > + .release = i915_gem_object_release_memory_region, > +}; > + > +bool

Re: [Intel-gfx] [PATCH v2 13/22] drm/i915: treat stolen as a region

2019-10-03 Thread Tang, CQ
> -Original Message- > From: Intel-gfx On Behalf Of > Matthew Auld > Sent: Thursday, October 3, 2019 12:25 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v2 13/22] drm/i915: treat stolen as a region > > Convert stolen memory over to a region object. Still leaves

Re: [Intel-gfx] [PATCH v2 04/22] drm/i915/region: support volatile objects

2019-10-03 Thread Chris Wilson
Quoting Matthew Auld (2019-10-03 20:24:26) > static const struct drm_i915_gem_object_ops fake_ops = { > @@ -131,6 +128,8 @@ fake_dma_object(struct drm_i915_private *i915, u64 size) > drm_gem_private_object_init(&i915->drm, &obj->base, size); > i915_gem_object_init(obj, &fake_ops);

Re: [Intel-gfx] [PATCH v2 19/22] drm/i915: don't allocate the ring in stolen if we lack aperture

2019-10-03 Thread Tang, CQ
> -Original Message- > From: Intel-gfx On Behalf Of > Matthew Auld > Sent: Thursday, October 3, 2019 12:25 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v2 19/22] drm/i915: don't allocate the ring in > stolen if we lack aperture > > Since we have no way access i

Re: [Intel-gfx] [PULL] drm-intel-fixes

2019-10-03 Thread Ville Syrjälä
On Thu, Oct 03, 2019 at 12:30:51PM -0700, Rodrigo Vivi wrote: > Hi Dave and Daniel, > > This v2 contains a critical DP-MST fix that it would be really good to be > propagated as soon as possible. > > Besides all the drm-intel-next-fixes that I mentioned on previous email. > > Here goes drm-intel

[Intel-gfx] [PULL] drm-intel-fixes

2019-10-03 Thread Rodrigo Vivi
Hi Dave and Daniel, This v2 contains a critical DP-MST fix that it would be really good to be propagated as soon as possible. Besides all the drm-intel-next-fixes that I mentioned on previous email. Here goes drm-intel-fixes-2019-10-03-1: - Fix DP-MST crtc_mask - Fix dsc dpp calculations - Fix g

Re: [Intel-gfx] [PATCH v2 01/22] drm/i915/stolen: make the object creation interface consistent

2019-10-03 Thread Chris Wilson
Quoting Matthew Auld (2019-10-03 20:24:23) > diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c > b/drivers/gpu/drm/i915/gt/intel_rc6.c > index d6167dd592e9..dcf189f26624 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rc6.c > +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c > @@ -299,7 +299,7 @@ static int v

[Intel-gfx] [PATCH v2 19/22] drm/i915: don't allocate the ring in stolen if we lack aperture

2019-10-03 Thread Matthew Auld
Since we have no way access it from the CPU. For such cases just fallback to internal objects. Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/g

[Intel-gfx] [PATCH v2 20/22] drm/i915/selftests: fallback to using the gpu to trash stolen

2019-10-03 Thread Matthew Auld
If we lack a mappable aperture, opt for nuking stolen memory with the blitter engine. Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/selftests/i915_gem.c | 95 +++ 1 file changed, 80 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c

[Intel-gfx] [PATCH v2 21/22] drm/i915/selftests: check for missing aperture

2019-10-03 Thread Matthew Auld
We may be missing support for the mappable aperture on some platforms. Signed-off-by: Matthew Auld Cc: Daniele Ceraolo Spurio --- .../drm/i915/gem/selftests/i915_gem_coherency.c| 5 - drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 6 ++ drivers/gpu/drm/i915/gt/selftest_hangc

[Intel-gfx] [PATCH v2 08/22] drm/i915/lmem: support kernel mapping

2019-10-03 Thread Matthew Auld
From: Abdiel Janulgue We can create LMEM objects, but we also need to support mapping them into kernel space for internal use. Signed-off-by: Abdiel Janulgue Signed-off-by: Matthew Auld Signed-off-by: Steve Hampson Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 36

[Intel-gfx] [PATCH v2 10/22] drm/i915/selftests: extend coverage to include LMEM huge-pages

2019-10-03 Thread Matthew Auld
Signed-off-by: Matthew Auld --- .../gpu/drm/i915/gem/selftests/huge_pages.c | 121 +- 1 file changed, 120 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c index 1772d4cbf3d2..85de3a6fd7a

[Intel-gfx] [PATCH v2 22/22] HAX drm/i915: add the fake lmem region

2019-10-03 Thread Matthew Auld
Intended for upstream testing so that we can still exercise the LMEM plumbing and !HAS_MAPPABLE_APERTURE paths. Smoke tested on Skull Canyon device. This works by allocating an intel_memory_region for a reserved portion of system memory, which we treat like LMEM. For the LMEMBAR we steal the apertu

[Intel-gfx] [PATCH v2 15/22] drm/i915: do not map aperture if it is not available.

2019-10-03 Thread Matthew Auld
From: Daniele Ceraolo Spurio Skip both setup and cleanup of the aperture mapping if the HW doesn't have an aperture bar. Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_gtt.c | 34 ++--- 1 file changed, 21 insertions(

[Intel-gfx] [PATCH v2 07/22] drm/i915: setup io-mapping for LMEM

2019-10-03 Thread Matthew Auld
From: Abdiel Janulgue Signed-off-by: Abdiel Janulgue Cc: Matthew Auld --- drivers/gpu/drm/i915/intel_region_lmem.c | 28 ++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c

[Intel-gfx] [PATCH v2 16/22] drm/i915: set num_fence_regs to 0 if there is no aperture

2019-10-03 Thread Matthew Auld
From: Daniele Ceraolo Spurio We can't fence anything without aperture. Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Stuart Summers Cc: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_fence_reg.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/

[Intel-gfx] [PATCH v2 18/22] drm/i915: Don't try to place HWS in non-existing mappable region

2019-10-03 Thread Matthew Auld
From: Michal Wajdeczko HWS placement restrictions can't just rely on HAS_LLC flag. Signed-off-by: Michal Wajdeczko Cc: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_

[Intel-gfx] [PATCH v2 12/22] drm/i915: treat shmem as a region

2019-10-03 Thread Matthew Auld
Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc: Abdiel Janulgue --- drivers/gpu/drm/i915/gem/i915_gem_phys.c | 5 +- drivers/gpu/drm/i915/gem/i915_gem_region.c| 14 +++- drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 68 ++- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v2 09/22] drm/i915/selftests: add write-dword test for LMEM

2019-10-03 Thread Matthew Auld
Simple test writing to dwords across an object, using various engines in a randomized order, checking that our writes land from the cpu. Signed-off-by: Matthew Auld --- .../drm/i915/selftests/intel_memory_region.c | 171 ++ 1 file changed, 171 insertions(+) diff --git a/drivers

[Intel-gfx] [PATCH v2 17/22] drm/i915: error capture with no ggtt slot

2019-10-03 Thread Matthew Auld
From: Daniele Ceraolo Spurio If the aperture is not available in HW we can't use a ggtt slot and wc copy, so fall back to regular kmap. Signed-off-by: Daniele Ceraolo Spurio Signed-off-by: Abdiel Janulgue Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_gtt.c | 19 dr

[Intel-gfx] [PATCH v2 11/22] drm/i915: enumerate and init each supported region

2019-10-03 Thread Matthew Auld
From: Abdiel Janulgue Nothing to enumerate yet... Signed-off-by: Abdiel Janulgue Signed-off-by: Matthew Auld Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/i915_gem_gtt.c | 70 +-- .../gpu/drm/i915/selftests/mock_g

[Intel-gfx] [PATCH v2 14/22] drm/i915: define HAS_MAPPABLE_APERTURE

2019-10-03 Thread Matthew Auld
From: Daniele Ceraolo Spurio The following patches in the series will use it to avoid certain operations when aperture is not available in HW. Signed-off-by: Daniele Ceraolo Spurio Cc: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drive

[Intel-gfx] [PATCH v2 13/22] drm/i915: treat stolen as a region

2019-10-03 Thread Matthew Auld
Convert stolen memory over to a region object. Still leaves open the question with what to do with pre-allocated objects... Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc: Abdiel Janulgue --- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 66 +++--- drivers/gpu/drm/i915/gem/i

[Intel-gfx] [PATCH v2 03/22] drm/i915/region: support contiguous allocations

2019-10-03 Thread Matthew Auld
Some kernel internal objects may need to be allocated as a contiguous block, also thinking ahead the various kernel io_mapping interfaces seem to expect it, although this is purely a limitation in the kernel API...so perhaps something to be improved. Signed-off-by: Matthew Auld Cc: Joonas Lahtine

[Intel-gfx] [PATCH v2 02/22] drm/i915: introduce intel_memory_region

2019-10-03 Thread Matthew Auld
Support memory regions, as defined by a given (start, end), and allow creating GEM objects which are backed by said region. The immediate goal here is to have something to represent our device memory, but later on we also want to represent every memory domain with a region, so stolen, shmem, and of

[Intel-gfx] [PATCH v2 05/22] drm/i915: Add memory region information to device_info

2019-10-03 Thread Matthew Auld
From: Abdiel Janulgue Exposes available regions for the platform. Shared memory will always be available. Signed-off-by: Abdiel Janulgue Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_device_info.h | 2 ++ 2 files changed, 4 inserti

[Intel-gfx] [PATCH v2 04/22] drm/i915/region: support volatile objects

2019-10-03 Thread Matthew Auld
Volatile objects are marked as DONTNEED while pinned, therefore once unpinned the backing store can be discarded. This is limited to kernel internal objects. Signed-off-by: Matthew Auld Signed-off-by: CQ Tang Cc: Joonas Lahtinen Cc: Abdiel Janulgue --- drivers/gpu/drm/i915/gem/i915_gem_intern

[Intel-gfx] [PATCH v2 00/22] LMEM basics

2019-10-03 Thread Matthew Auld
The basic LMEM bits, minus the uAPI, pruning, etc. The goal is to support basic LMEM object creation within the kernel. From there we can start with the dumb buffer support, and then the other display related bits. Abdiel Janulgue (4): drm/i915: Add memory region information to device_info drm

[Intel-gfx] [PATCH v2 06/22] drm/i915: support creating LMEM objects

2019-10-03 Thread Matthew Auld
We currently define LMEM, or local memory, as just another memory region, like system memory or stolen, which we can expose to userspace and can be mapped to the CPU via some BAR. Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc: Abdiel Janulgue --- drivers/gpu/drm/i915/Makefile

[Intel-gfx] [PATCH v2 01/22] drm/i915/stolen: make the object creation interface consistent

2019-10-03 Thread Matthew Auld
From: CQ Tang Our other backends return an actual error value upon failure. Do the same for stolen objects, which currently just return NULL on failure. Signed-off-by: CQ Tang Signed-off-by: Matthew Auld Cc: Chris Wilson --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/d

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dp: remove static variable for aux last status (rev3)

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915/dp: remove static variable for aux last status (rev3) URL : https://patchwork.freedesktop.org/series/67499/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6996_full -> Patchwork_14647_full ===

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,v6,1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [CI,v6,1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync URL : https://patchwork.freedesktop.org/series/67551/ State : success == Summary == CI Bug Log - changes from CI_DRM_6999 -> Patchwork_1465

Re: [Intel-gfx] [PATCH] TGL HAX drm/i915/tgl: Interrupts are overrated

2019-10-03 Thread Chris Wilson
Quoting Chris Wilson (2019-10-03 19:56:13) > Why sleep when you can busywait for an interrupt? Throw out the old irq > handlers, and use irq_poll instead. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=111880 > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > --- Fwiw, enabling rp

[Intel-gfx] [PATCH] TGL HAX drm/i915/tgl: Interrupts are overrated

2019-10-03 Thread Chris Wilson
Why sleep when you can busywait for an interrupt? Throw out the old irq handlers, and use irq_poll instead. References: https://bugs.freedesktop.org/show_bug.cgi?id=111880 Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/Kconfig | 1 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH i-g-t v2 1/2] tests/kms_getfb: Add getfb2 tests

2019-10-03 Thread Juston Li
From: Daniel Stone Mirroring addfb2, add tests for the new ioctl which will return us information about framebuffers containing multiple buffers, as well as modifiers. Changes since v1: - Add test that uses getfb2 output to call addfb2 as suggested by Ville Signed-off-by: Daniel Stone Signed-

[Intel-gfx] [PATCH i-g-t v2 2/2] NOMERGE: Import drm.h up to 54ecb8f7028c

2019-10-03 Thread Juston Li
Depends on ummerged kernel code for getfb2 Rest of drm.h taken from: commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c Author: Linus Torvalds Date: Mon Sep 30 10:35:40 2019 -0700 Linux 5.4-rc1 Signed-off-by: Juston Li --- include/drm-uapi/drm.h | 39 +++

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Add Sphinx-compatible references to struct fields

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Add Sphinx-compatible references to struct fields URL : https://patchwork.freedesktop.org/series/67550/ State : failure == Summary == Applying: drm/i915: Add Sphinx-compatible references to struct fields Using index info to reconstruct a base tree... M

[Intel-gfx] [RESEND PATCH v2] drm: Add getfb2 ioctl

2019-10-03 Thread Juston Li
From: Daniel Stone getfb2 allows us to pass multiple planes and modifiers, just like addfb2 over addfb. Changes since v1: - unused modifiers set to 0 instead of DRM_FORMAT_MOD_INVALID - update ioctl number Signed-off-by: Daniel Stone Signed-off-by: Juston Li --- drivers/gpu/drm/drm_crtc_in

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915: Fix audio power up sequence for gen10+ display

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915: Fix audio power up sequence for gen10+ display URL : https://patchwork.freedesktop.org/series/67528/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6996_full -> Patchwork_14644_full ==

[Intel-gfx] [CI v6 5/6] drm/i915/display/icl: Disable transcoder port sync as part of crtc_disable() sequence

2019-10-03 Thread Manasi Navare
This clears the transcoder port sync bits of the TRANS_DDI_FUNC_CTL2 register during crtc_disable(). v2: * Directly write the trans_port_sync reg value (Maarten) Cc: Ville Syrjälä Cc: Maarten Lankhorst Cc: Matt Roper Cc: Jani Nikula Signed-off-by: Manasi Navare Reviewed-by: Maarten Lankhorst

[Intel-gfx] [CI v6 3/6] drm/i915/display/icl: HW state readout for transcoder port sync config

2019-10-03 Thread Manasi Navare
After the state is committed, we readout the HW registers and compare the HW state with the SW state that we just committed. For Transcdoer port sync, we add master_transcoder and the salves bitmask to the crtc_state, hence we need to read those during the HW state readout to avoid pipe state misma

[Intel-gfx] [CI v6 4/6] drm/i915/display/icl: Enable master-slaves in trans port sync

2019-10-03 Thread Manasi Navare
As per the display enable sequence, we need to follow the enable sequence for slaves first with DP_TP_CTL set to Idle and configure the transcoder port sync register to select the corersponding master, then follow the enable sequence for master leaving DP_TP_CTL to idle. At this point the transcode

[Intel-gfx] [CI v6 2/6] drm/i915/display/icl: Enable TRANSCODER PORT SYNC for tiled displays across separate ports

2019-10-03 Thread Manasi Navare
In case of tiled displays where different tiles are displayed across different ports, we need to synchronize the transcoders involved. This patch implements the transcoder port sync feature for synchronizing one master transcoder with one or more slave transcoders. This is only enbaled in slave tra

[Intel-gfx] [CI v6 1/6] drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync

2019-10-03 Thread Manasi Navare
In case of tiled displays when the two tiles are sent across two CRTCs over two separate DP SST connectors, we need a mechanism to synchronize the two CRTCs and their corresponding transcoders. So use the master-slave mode where there is one master corresponding to last horizontal and vertical tile

[Intel-gfx] [CI v6 6/6] drm/i915/display/icl: In port sync mode disable slaves first then master

2019-10-03 Thread Manasi Navare
In the transcoder port sync mode, the slave transcoders mask their vblanks until master transcoder's vblank so while disabling them, make sure slaves are disabled first and then the masters. v4: * Obtain slave state from master (Maarten) v3: * Rebase v2: * Use the intel_old_crtc_state_disables() h

Re: [Intel-gfx] [PULL] drm-intel-fixes

2019-10-03 Thread Ville Syrjälä
On Thu, Oct 03, 2019 at 10:58:52AM -0700, Rodrigo Vivi wrote: > Hi Dave and Daniel, > > I know you are on XDC and I was even considering not send any this week, > but let me send this before I forget. > > There are the drm-intel-next-fixes pull requests that I had sent > that are still needed and

[Intel-gfx] [PULL] drm-intel-fixes

2019-10-03 Thread Rodrigo Vivi
Hi Dave and Daniel, I know you are on XDC and I was even considering not send any this week, but let me send this before I forget. There are the drm-intel-next-fixes pull requests that I had sent that are still needed and it would be good if you could pull those. Besides we have more 2 fixes her

[Intel-gfx] ✓ Fi.CI.BAT: success for DP Phy compliace auto test.

2019-10-03 Thread Patchwork
== Series Details == Series: DP Phy compliace auto test. URL : https://patchwork.freedesktop.org/series/67546/ State : success == Summary == CI Bug Log - changes from CI_DRM_6998 -> Patchwork_14653 Summary --- **SUCCESS** No regre

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915/vga: rename intel_vga_msr_write() to intel_vga_reset_io_mem() (rev2)

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/vga: rename intel_vga_msr_write() to intel_vga_reset_io_mem() (rev2) URL : https://patchwork.freedesktop.org/series/67493/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6996_full -> Patchwork_14643_full

[Intel-gfx] [PULL] drm-misc-fixes

2019-10-03 Thread Maxime Ripard
Hi, Here is another attempt at a PR for drm-misc-fixes, after the attempt I did yesterday. Maxime drm-misc-fixes-2019-10-03: - One include fix for tilcdc - A clock fix for OMAP - A memory leak fix for Komeda - Some fixes for resources cleanups with writeback The following changes since commi

[Intel-gfx] [PATCH] drm/i915: Add Sphinx-compatible references to struct fields

2019-10-03 Thread Jonathan Neuschäfer
This fixes the following kernel-doc warnings and makes the corrsponding fields show up in the generated HTML: ./drivers/gpu/drm/i915/i915_drv.h:1143: warning: Incorrect use of kernel-doc format: * State of the OA buffer. ./drivers/gpu/drm/i915/i915_drv.h:1154: warning: Incorrect use of k

Re: [Intel-gfx] [PATCH V6] drm/drm_vblank: Change EINVAL by the correct errno

2019-10-03 Thread Pekka Paalanen
On Wed, 2 Oct 2019 11:05:16 -0300 Rodrigo Siqueira wrote: > For historical reasons, the function drm_wait_vblank_ioctl always return > -EINVAL if something gets wrong. This scenario limits the flexibility > for the userspace to make detailed verification of any problem and take > some action. In

Re: [Intel-gfx] [PULL] drm-misc-fixes

2019-10-03 Thread Maxime Ripard
Hi, On Wed, Oct 02, 2019 at 10:06:04PM +0200, Maxime Ripard wrote: > Hi Dave, Daniel, > > I hope that you enjoy XDC if you could make it this year :) > > Here's the first round of fixes for drm-misc > > Maxime > > drm-misc-fixes-2019-10-02: > - One include fix for tilcdc > - A memory leak fix fo

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) (rev9)

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) (rev9) URL : https://patchwork.freedesktop.org/series/67529/ State : success == Summary == CI Bug Log - changes from CI_DRM_6998 -> Patchwork_14652 =

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Implement a better i945gm vblank irq vs. C-states workaround

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Implement a better i945gm vblank irq vs. C-states workaround URL : https://patchwork.freedesktop.org/series/67541/ State : success == Summary == CI Bug Log - changes from CI_DRM_6998 -> Patchwork_14651

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) (rev9)

2019-10-03 Thread Patchwork
== Series Details == Series: series starting with [v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) (rev9) URL : https://patchwork.freedesktop.org/series/67529/ State : warning == Summary == $ dim checkpatch origin/drm-tip d8ea554e76ab dma-fence: Serialise signal enabl

[Intel-gfx] ✓ Fi.CI.IGT: success for DC3CO Support for TGL test with DC3CO IGT

2019-10-03 Thread Patchwork
== Series Details == Series: DC3CO Support for TGL test with DC3CO IGT URL : https://patchwork.freedesktop.org/series/67525/ State : success == Summary == CI Bug Log - changes from CI_DRM_6996_full -> Patchwork_14642_full Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Skip redundant resubmission

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Skip redundant resubmission URL : https://patchwork.freedesktop.org/series/67537/ State : success == Summary == CI Bug Log - changes from CI_DRM_6997 -> Patchwork_14650 Summary --- **S

Re: [Intel-gfx] [PATCH 6/6] drm/i915/mst: Document the userspace fail with possible_crtcs

2019-10-03 Thread Ville Syrjälä
On Wed, Oct 02, 2019 at 07:25:05PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > To avoid accidentally breaking things in the future add a > comment explaining why we misconfigure the pipe_mask. > > Also toss in a TODO for investigating a single encoder > approach as opposed to the encod

[Intel-gfx] [PATCH i-g-t] i915_hangman: Force error capture

2019-10-03 Thread Chris Wilson
For fast preempt-resets, error capture is skipped, so disable preempt-resets before checking the error state. While thinking ahead, be prepared for when the modparams are not accessible. Signed-off-by: Chris Wilson --- lib/igt_gt.c | 7 --- tests/i915/i915_hangman.c | 7 ---

[Intel-gfx] [RFC 3/6] drm/i915/dp: Preparation for DP phy compliance auto test.

2019-10-03 Thread Animesh Manna
During DP phy compliance auto test mode, sink will request combination of different test pattern with differnt level of vswing, pre-emphasis. Function added to prepare for it. Signed-off-by: Animesh Manna --- .../drm/i915/display/intel_display_types.h| 1 + drivers/gpu/drm/i915/display/inte

[Intel-gfx] [RFC 1/6] drm/dp: get/set phy compliance pattern.

2019-10-03 Thread Animesh Manna
During phy complaince auto test mode source need to read requested test pattern from sink through DPCD. After processing the request source need to set the pattern. So set/get method added in drm layer as it is DP protocol. Signed-off-by: Animesh Manna --- drivers/gpu/drm/drm_dp_helper.c | 77 ++

[Intel-gfx] [RFC 2/6] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation

2019-10-03 Thread Animesh Manna
vswing/pre-emphasis adjustment calculation is needed in processing of auto phy compliance request other than link training, so moved the same function in intel_dp.c. No functional change. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_dp.c | 32 +++ dr

[Intel-gfx] [RFC 6/6] drm/i915/dp: Program vswing, pre-emphasis, test-pattern

2019-10-03 Thread Animesh Manna
This patch process phy compliance request by programming requested vswing, pre-emphasis and test pattern. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_dp.c | 62 + 1 file changed, 62 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.

[Intel-gfx] [RFC 4/6] drm/i915/dp: Register definition for DP compliance register.

2019-10-03 Thread Animesh Manna
DP_COMP_CTL and DP_COMP_PAT register used to program DP compliance pattern. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_reg.h | 20 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index eefd789b9

[Intel-gfx] [RFC 5/6] drm/i915/dp: Update the pattern as per request.

2019-10-03 Thread Animesh Manna
set pattern in DP_COMP_CTL. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_dp.c | 55 + 1 file changed, 55 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index a19141fc672e..93b1ce80c174

[Intel-gfx] [RFC 0/6] DP Phy compliace auto test.

2019-10-03 Thread Animesh Manna
Driver changes mainly to process the request coming from Test equipment as short pulse hpd interrupt to change link-pattern/v-swing/pre-emphasis Complete auto test suite takes much lesser time than manual run. Overall design: -- Automate test request will come to source device as HDP s

Re: [Intel-gfx] [PATCH] drm/i915/tc: Implement the TC cold exit sequence

2019-10-03 Thread Imre Deak
On Mon, Sep 30, 2019 at 05:55:36PM -0700, José Roberto de Souza wrote: > This is required for legacy/static TC ports as IOM is not aware of > the connection and will not trigger the TC cold exit. > > BSpec: 21750 > BSpsc: 49294 > Cc: Imre Deak > Cc: Lucas De Marchi > Signed-off-by: José Roberto

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Add the Thunderbolt PLL divider values (rev3)

2019-10-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Add the Thunderbolt PLL divider values (rev3) URL : https://patchwork.freedesktop.org/series/67498/ State : success == Summary == CI Bug Log - changes from CI_DRM_6997 -> Patchwork_14649 Summary --

Re: [Intel-gfx] [PATCH v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

2019-10-03 Thread Tvrtko Ursulin
On 03/10/2019 15:18, Chris Wilson wrote: Quoting Ruhl, Michael J (2019-10-03 15:12:38) -Original Message- From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of Chris Wilson Sent: Thursday, October 3, 2019 9:24 AM To: intel-gfx@lists.freedesktop.org Cc: dri-de...@

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