Am 12.08.19 um 16:53 schrieb Chris Wilson:
> Quoting Koenig, Christian (2019-08-12 15:50:59)
>> Am 12.08.19 um 16:43 schrieb Chris Wilson:
>>> Quoting Koenig, Christian (2019-08-12 15:34:32)
Am 10.08.19 um 17:34 schrieb Chris Wilson:
> Move the duplicated code within dma-fence.c into the h
Quoting Daniele Ceraolo Spurio (2019-08-13 00:31:51)
> The last user has been removed, so drop the functions.
>
> Signed-off-by: Daniele Ceraolo Spurio
> Cc: Chris Wilson
If this sticks, we can remove the b->irq_enabled counter (iirc). For the
moment, keep it simple in case we need to revive it
Closing the object on another file should not affect the local
mmap_offset.
Signed-off-by: Chris Wilson
Cc: Abdiel Janulgue
---
tests/i915/gem_mmap_gtt.c | 40 +++
1 file changed, 40 insertions(+)
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_
Check that we can run a second request even if an equal priority spinner
is hogging the engine.
Signed-off-by: Chris Wilson
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
---
tests/i915/gem_exec_schedule.c | 36 ++
1 file changed, 36 insertions(+)
diff --git a/tests/
Runtime suspend kicks in quicker if we flush any idle work that may been
accrued.
Signed-off-by: Chris Wilson
---
tests/perf_pmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index d392a67d4..351090710 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu
Make sure we don't block while setting up the stress case before the
reset by only submitting less batches than would fill the ring.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111379
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 13 +
1 file changed, 9 insertio
The intent of the test is to exercise that each channel in the engine[]
is an independent context/ring/timeline. It setups 64 channels pointing
to rcs0 and then submits one request to each in turn waiting on a
timeline that will force them to run out of submission order. They can
only run in fence
If we are not running with a scheduler, we are using a global ringbuffer
which may not accommodate 16 extra batches. Fortunately, we only need
one such batch to block the submission queue as without a scheduler, it
is in order submission (and so the batch is after the main setup
anyway!).
Signed-o
When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.
References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c| 4 +++-
tests/i915/gem_exec_fence.c | 3 ++-
tests/kms_busy.c
Trying to hit a deadlock for invalidating dirty userptr pages (via
kcompactd).
Signed-off-by: Chris Wilson
---
tests/i915/gem_shrink.c | 36
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index
Still trying to hit a deadlock with userptr from kcompatcd.
Signed-off-by: Chris Wilson
---
tests/i915/gem_userptr_blits.c | 49 +-
1 file changed, 42 insertions(+), 7 deletions(-)
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index
If we are not running with a scheduler, we are using a global ringbuffer
which may not accommodate 16 extra batches. Fortunately, we only need
one such batch to block the submission queue as without a scheduler, it
is in order submission (and so the batch is after the main setup
anyway!).
Signed-o
== Series Details ==
Series: drm/i915/tgl: Fix missing parentheses on
TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT
URL : https://patchwork.freedesktop.org/series/65097/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6687_full -> Patchwork_13990_full
=
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Forgo last_fence active request
tracking
URL : https://patchwork.freedesktop.org/series/65096/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6687_full -> Patchwork_13989_full
== Series Details ==
Series: series starting with [1/2] drm/i915/icl: Implement gen11 flush
including tile cache
URL : https://patchwork.freedesktop.org/series/65094/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6687_full -> Patchwork_13988_full
=
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/guc: keep breadcrumb irq always
enabled
URL : https://patchwork.freedesktop.org/series/65105/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6690 -> Patchwork_13995
== Series Details ==
Series: dma-buf/sw_sync: Synchronize signal vs syncpt free
URL : https://patchwork.freedesktop.org/series/65092/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6687_full -> Patchwork_13987_full
Summary
-
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/guc: keep breadcrumb irq always
enabled
URL : https://patchwork.freedesktop.org/series/65105/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
29af7f2e7ad9 drm/i915/guc: keep breadcrumb irq always enabled
-:54: C
The last user has been removed, so drop the functions.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 22 -
drivers/gpu/drm/i915/gt/intel_engine.h | 3 ---
2 files changed, 25 deletions(-)
diff --git a/drivers/
We rely on the tasklet to update the GT PM refcount, so we can't disable
it even if we've processed all the requests for the engine because we
might have detected the request completion before the interrupt arrived.
Since on all platforms on which we plan to support guc submission we
don't allow d
== Series Details ==
Series: drm/i915/cml: Add Missing PCI IDs
URL : https://patchwork.freedesktop.org/series/65104/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6690 -> Patchwork_13994
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915/guc: keep breadcrumb irq always enabled
URL : https://patchwork.freedesktop.org/series/65103/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6690 -> Patchwork_13993
Summary
---
**
The BSpec has added three new IDS for CML.
Update the IDs in accordance to the Spec.
Cc: Lucas De Marchi
Cc: José Roberto de Souza
Signed-off-by: Anusha Srivatsa
---
include/drm/i915_pciids.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/drm/i915_pciids.h b/in
== Series Details ==
Series: drm/i915/guc: keep breadcrumb irq always enabled
URL : https://patchwork.freedesktop.org/series/65103/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
836e502a9887 drm/i915/guc: keep breadcrumb irq always enabled
-:98: CHECK:MULTIPLE_ASSIGNMENTS: mult
On Thu, Jul 25, 2019 at 05:02:24PM -0700, Lucas De Marchi wrote:
> From: Michel Thierry
>
> Inherit workarounds from previous platforms that are still valid for
> Tigerlake.
>
> WaPipelineFlushCoherentLines:tgl (changed register but has same name)
> WaSendPushConstantsFromMMIO:tgl
> WaAllo
Quoting Daniele Ceraolo Spurio (2019-08-12 23:10:16)
> We rely on the tasklet to update the GT PM refcount, so we can't disable
> it even if we've processed all the requests for the engine because we
> might have detected the request completion before the interrupt arrived.
>
> Since on all platfo
We rely on the tasklet to update the GT PM refcount, so we can't disable
it even if we've processed all the requests for the engine because we
might have detected the request completion before the interrupt arrived.
Since on all platforms on which we plan to support guc submission we
don't allow d
On Thu, Jul 25, 2019 at 05:02:26PM -0700, Lucas De Marchi wrote:
> From: Michel Thierry
>
> Enable Small PL for power benefit.
>
> Signed-off-by: Michel Thierry
> Signed-off-by: Lucas De Marchi
> Reviewed-by: Stuart Summers
Reviewed-by: Radhakrishna Sripada
> Link:
> https://patchwork.freed
== Series Details ==
Series: series starting with drm/i915/guc: Use a local cancel_port_requests
(rev2)
URL : https://patchwork.freedesktop.org/series/65089/
State : failure
== Summary ==
Applying: drm/i915/guc: Use a local cancel_port_requests
Applying: drm/i915: Push the wakeref->count defe
== Series Details ==
Series: drm/i915/uc: Log fw status changes only under debug config
URL : https://patchwork.freedesktop.org/series/65101/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6689 -> Patchwork_13991
Summary
---
== Series Details ==
Series: series starting with [01/18] drm/i915/guc: Use a local
cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65089/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6686_full -> Patchwork_13986_full
=
Quoting Daniele Ceraolo Spurio (2019-08-12 21:38:39)
>
>
> On 8/12/19 3:44 AM, Chris Wilson wrote:
> > Quoting Chris Wilson (2019-08-12 10:10:43)
> >> For the guc, we need to keep the engine awake (and not parked) and not
> >> just the gt. If we let the engine park, we disable the irq and stop
>
On 8/12/19 3:44 AM, Chris Wilson wrote:
Quoting Chris Wilson (2019-08-12 10:10:43)
For the guc, we need to keep the engine awake (and not parked) and not
just the gt. If we let the engine park, we disable the irq and stop
processing the tasklet, leaving state outstanding inside the tasklet.
T
Since execlists and the guc have diverged in their port tracking, we
cannot simply reuse the execlists cancellation code as it leads to
unbalanced reference counting. Use a local, simpler routine for the guc.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
Reviewed-by: Daniele Ceraolo Spu
On 8/12/19 6:38 AM, Chris Wilson wrote:
Since execlista and the guc have diverged in their port tracking, we
cannot simply reuse the execlists cancellation code as it leads to
unbalanced reference counting. Use a local simpler routine for the guc.
LGTM, just wondering if we should put a comm
Quoting Michal Wajdeczko (2019-08-12 20:51:25)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> index 20a5ddb753c3..885a4d7e4d37 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
> @@ -42,7
We don't care about internal firmware status changes unless
we are doing some real debugging. Note that our CI is not
using DRM_I915_DEBUG_GUC config by default so use it.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
---
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
== Series Details ==
Series: series starting with [1/8] drm/i915/execlists: Avoid sync calls during
park (rev2)
URL : https://patchwork.freedesktop.org/series/65080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6685_full -> Patchwork_13984_full
==
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: d3862e44daa7 dma-buf/sw-sync: Fix locking around sync_timeline
lists.
The bot has tested the following trees: v5.2.8, v4.19.66, v4.14.138, v4.9.189.
v5.2.8: Build OK!
v4.19.66: Bu
== Series Details ==
Series: drm/i915/tgl: Fix missing parentheses on
TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT
URL : https://patchwork.freedesktop.org/series/65097/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6687 -> Patchwork_13990
===
On Mon, Aug 12, 2019 at 10:54:05AM -0700, Jose Souza wrote:
In this case we want to apply the mask and then shift so the
parentheses is needed.
SPANK! SPANK! SPANK! Naughty programmer!
Fixes: 9749a5b6c09f ("drm/i915/tgl: Fix the read of the DDI that transcoder is
attached to")
Cc: Lucas De Mar
== Series Details ==
Series: drm/i915/tgl: Fix missing parentheses on
TGL_TRANS_DDI_FUNC_CTL_VAL_TO_PORT
URL : https://patchwork.freedesktop.org/series/65097/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
efdcc43de9ae drm/i915/tgl: Fix missing parentheses on
TGL_TRANS_DDI_FUN
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Forgo last_fence active request
tracking
URL : https://patchwork.freedesktop.org/series/65096/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6687 -> Patchwork_13989
==
== Series Details ==
Series: drm/i915/uc: Update copyright and license
URL : https://patchwork.freedesktop.org/series/65083/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6685_full -> Patchwork_13983_full
Summary
---
Quoting José Roberto de Souza (2019-08-12 18:54:05)
> In this case we want to apply the mask and then shift so the
> parentheses is needed.
>
> SPANK! SPANK! SPANK! Naughty programmer!
>
> Fixes: 9749a5b6c09f ("drm/i915/tgl: Fix the read of the DDI that transcoder
> is attached to")
> Cc: Lucas
In this case we want to apply the mask and then shift so the
parentheses is needed.
SPANK! SPANK! SPANK! Naughty programmer!
Fixes: 9749a5b6c09f ("drm/i915/tgl: Fix the read of the DDI that transcoder is
attached to")
Cc: Lucas De Marchi
Cc: Chris Wilson
Signed-off-by: José Roberto de Souza
-
On Mon, 2019-08-12 at 19:20 +0530, Gupta, Anshuman wrote:
>
> On 7/31/2019 4:17 AM, José Roberto de Souza wrote:
> > According to PSR2_CTL definition on BSpec there is only one
> > instance
> > of PSR2_CTL also ICL display overview state that PSR2 is only
> > supported in EDP transcoder, so now th
Remove the raw i915_active_request tracking in favour of the higher
level i915_active tracking for the sole purpose of making the lockless
transition easier in later patches.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/display/intel_overlay.c | 129 +--
We were using the last_fence to track the last request that used this
vma that might be interpreted by a fence register and forced ourselves
to wait for this request before modifying any fence register that
overlapped our vma. Due to requirement that we need to track any XY_BLT
command, linear or t
== Series Details ==
Series: series starting with [1/2] drm/i915/icl: Implement gen11 flush
including tile cache
URL : https://patchwork.freedesktop.org/series/65094/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6687 -> Patchwork_13988
===
Am 12.08.19 um 17:42 schrieb Chris Wilson:
> During release of the syncpt, we remove it from the list of syncpt and
> the tree, but only if it is not already been removed. However, during
> signaling, we first remove the syncpt from the list. So, if we
> concurrently free and signal the syncpt, the
== Series Details ==
Series: dma-buf/sw_sync: Synchronize signal vs syncpt free
URL : https://patchwork.freedesktop.org/series/65092/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6687 -> Patchwork_13987
Summary
---
== Series Details ==
Series: series starting with [1/2] drm/i915/icl: Implement gen11 flush
including tile cache
URL : https://patchwork.freedesktop.org/series/65094/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
34ef48906b2c drm/i915/icl: Implement gen11 flush including tile
On Tue, Jul 30, 2019 at 6:22 PM Daniel Vetter wrote:
> On Tue, Jul 30, 2019 at 03:28:11PM +0100, Matthew Auld wrote:
> > On 30/07/2019 10:49, Daniel Vetter wrote:
> > > On Thu, Jun 27, 2019 at 09:56:25PM +0100, Matthew Auld wrote:
> > > > From: Abdiel Janulgue
> > > >
> > > > Add a new CPU mmap i
Quoting Mika Kuoppala (2019-08-12 17:01:07)
> Add tile cache flushing for gen11. To relive us from the
> burden of previous obsolete workarounds, make a dedicated
> flush/invalidate callback for gen11.
>
> To fortify an independent single flush, do post
> sync op as there are indications that with
+Vandita
On Thu, Jul 25, 2019 at 4:57 PM Lucas De Marchi
wrote:
>
> Mostly the same patches as https://patchwork.freedesktop.org/series/63670/.
> Rebased.
>
> Lucas De Marchi (2):
> drm/i915/tgl: re-indent code to prepare for DKL changes
> drm/i915/tgl: start adding the DKL PLLs to use on TC
== Series Details ==
Series: dma-buf/sw_sync: Synchronize signal vs syncpt free
URL : https://patchwork.freedesktop.org/series/65092/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
857ced2942e5 dma-buf/sw_sync: Synchronize signal vs syncpt free
-:22: WARNING:COMMIT_LOG_LONG_LINE
Quoting Mika Kuoppala (2019-08-12 17:01:08)
> On the set of invalidations, we need to add command
> cache invalidate as a new domain.
Found the bit, left none the wiser, but just based on the invalidate
keyword it fits our mo.
> Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
-Chris
___
Add tile cache flushing for gen11. To relive us from the
burden of previous obsolete workarounds, make a dedicated
flush/invalidate callback for gen11.
To fortify an independent single flush, do post
sync op as there are indications that without it
we don't flush everything. This should also make
On the set of invalidations, we need to add command
cache invalidate as a new domain.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/in
During release of the syncpt, we remove it from the list of syncpt and
the tree, but only if it is not already been removed. However, during
signaling, we first remove the syncpt from the list. So, if we
concurrently free and signal the syncpt, the free may decide that it is
not part of the tree an
On Mon, 12 Aug 2019 at 14:41, Chris Wilson wrote:
>
> Remove the raw i915_active_request tracking in favour of the higher
> level i915_active tracking for the sole purpose of making the lockless
> transition easier in later patches.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
_
-Wilson/drm-i915-execlists-Lift-process_csb-out-of-the-irq-off-spinlock/20190812-211057
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-defconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-10) 7.4.0
reproduce:
# save the attached .config to linux build
Make sure we don't block while setting up the stress case before the
reset by only submitting less batches than would fill the ring.
References: https://bugs.freedesktop.org/show_bug.cgi?id=111379
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 13 +
1 file changed, 9 insertio
Quoting Koenig, Christian (2019-08-12 15:50:59)
> Am 12.08.19 um 16:43 schrieb Chris Wilson:
> > Quoting Koenig, Christian (2019-08-12 15:34:32)
> >> Am 10.08.19 um 17:34 schrieb Chris Wilson:
> >>> Move the duplicated code within dma-fence.c into the header for wider
> >>> reuse. In the process ap
Quoting Bloomfield, Jon (2019-08-12 15:39:33)
> > -Original Message-
> > From: Chris Wilson
> > Sent: Friday, August 9, 2019 4:35 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Joonas Lahtinen ; Winiarski, Michal
> > ; Bloomfield, Jon
> > Subject: Re: [PATCH 5/5] drm/i915: Cancel non-
Am 12.08.19 um 16:43 schrieb Chris Wilson:
> Quoting Koenig, Christian (2019-08-12 15:34:32)
>> Am 10.08.19 um 17:34 schrieb Chris Wilson:
>>> Move the duplicated code within dma-fence.c into the header for wider
>>> reuse. In the process apply a small micro-optimisation to only prune the
>>> fence
Quoting Koenig, Christian (2019-08-12 15:34:32)
> Am 10.08.19 um 17:34 schrieb Chris Wilson:
> > Move the duplicated code within dma-fence.c into the header for wider
> > reuse. In the process apply a small micro-optimisation to only prune the
> > fence->cb_list once rather than use list_del on eve
> -Original Message-
> From: Chris Wilson
> Sent: Friday, August 9, 2019 4:35 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: Re: [PATCH 5/5] drm/i915: Cancel non-persistent contexts on close
>
> Quoting Chris Wilson (2019
Am 10.08.19 um 17:34 schrieb Chris Wilson:
> Move the duplicated code within dma-fence.c into the header for wider
> reuse. In the process apply a small micro-optimisation to only prune the
> fence->cb_list once rather than use list_del on every entry.
>
> Signed-off-by: Chris Wilson
> Cc: Tvrtko
Quoting Chris Wilson (2019-08-11 22:06:33)
> From: Andi Shyti
>
> i915_irq.c is large. It serves as the central dispatch and handler for
> all of our device interrupts. Lets break it up by pulling out the GT
> interrupt handlers.
>
> Based on a patch by Chris Wilson.
>
> Signed-off-by: Andi Shy
Quoting Chris Wilson (2019-08-11 15:28:00)
> From: Andi Shyti
>
> i915_irq.c is large. It serves as the central dispatch and handler for
> all of our device interrupts. Pull out the GT pm interrupt handling
> (leaving the central dispatch) so that we can encapsulate the logic a
> little better.
>
== Series Details ==
Series: series starting with [01/18] drm/i915/guc: Use a local
cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65089/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6686 -> Patchwork_13986
===
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-08-12 12:52:56)
>> Chris Wilson writes:
>>
>> > Be a little more conservative in our ring measurement and exclude one
>> > batch to leave room in case our user needs to wrap (where a request will
>> > be expanded to cover the unused space at th
== Series Details ==
Series: series starting with [1/2] drm/i915: Extract GT powermanagement
interrupt handling (rev3)
URL : https://patchwork.freedesktop.org/series/65049/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6683_full -> Patchwork_13981_full
===
== Series Details ==
Series: series starting with [01/18] drm/i915/guc: Use a local
cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65089/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Use a local cancel_port_request
== Series Details ==
Series: series starting with [01/18] drm/i915/guc: Use a local
cancel_port_requests
URL : https://patchwork.freedesktop.org/series/65089/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3d6da5baf737 drm/i915/guc: Use a local cancel_port_requests
1f0621c12a25
== Series Details ==
Series: Support mipi dsi video mode on TGL (rev3)
URL : https://patchwork.freedesktop.org/series/63058/
State : failure
== Summary ==
Applying: drm/i915/tgl/dsi: Program TRANS_VBLANK register
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/displ
Stop assuming we only get called with irqs-on for disarming the
breadcrumbs, and do a full save/restore spin_lock_irq.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/inte
Instead of rummaging through the intel_context to peek at the GEM
context in the middle of request submission to decide whether to use
semaphores, store that information on the intel_context itself.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 52 +-
As every i915_active_request should be serialised by a dedicated lock,
i915_active consists of a tree of locks; one for each node. Markup up
the i915_active_request with what lock is supposed to be guarding it so
that we can verify that the serialised updated are indeed serialised.
Signed-off-by:
Move the active tracking for the frontbuffer operations out of the
i915_gem_object and into its own first class (refcounted) object. In the
process of detangling, we switch from low level request tracking to the
easier i915_active -- with the plan that this avoids any potential
atomic callbacks as
On 7/31/2019 4:17 AM, José Roberto de Souza wrote:
According to PSR2_CTL definition on BSpec there is only one instance
of PSR2_CTL also ICL display overview state that PSR2 is only
supported in EDP transcoder, so now that is possible to have PSR in
any transcoder lets add this hardware restric
Remove the raw i915_active_request tracking in favour of the higher
level i915_active tracking for the sole purpose of making the lockless
transition easier in later patches.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_overlay.c | 129 +--
drivers/gpu/drm/i
Keep the intel_context as being the primary state for i915_request, with
the GEM context a backpointer from the low level state for the rarer
cases we need client information. Our goal is to remove such references
to clients from the backend, and leave the HW submission agnostic to
client interface
With the introduction of ctx->engines[] we allow multiple logical
contexts to be used on the same engine (e.g. with virtual engines). Each
logical context requires a unique tag in order for context-switching to
occur correctly between them.
We only need to keep a unique tag for the active lifetime
Keep track of the GEM contexts underneath i915->gem.contexts and assign
them their own lock for the purposes of list management.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 108 +++---
drivers/gpu/drm/i915/gem/i915_gem_context.h
If the backend wishes to defer the wakeref parking, make it responsible
for unlocking the wakeref (i.e. bumping the counter). This allows it to
time the unlock much more carefully in case it happens to needs the
wakeref to be active during its deferral.
For instance, during engine parking we may c
If we only call process_csb() from the tasklet, though we lose the
ability to bypass ksoftirqd interrupt processing on direct submission
paths, we can push it out of the irq-off spinlock.
The penalty is that we then allow schedule_out to be called concurrently
with schedule_in requiring us to hand
We were using the last_fence to track the last request that used this
vma that might be interpreted by a fence register and forced ourselves
to wait for this request before modifying any fence register that
overlapped our vma. Due to requirement that we need to track any XY_BLT
command, linear or t
Lift moving the timeline to/from the active_list on enter/exit in order
to shorten the active tracking span in comparison to the existing
pin/unpin.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 1 -
drivers/gpu/drm/i915/gt/intel_context.c | 2 +
drivers
In preparation for removing struct_mutex from around context retirement,
we need to make timeline pinning safe. Since multiple engines/contexts
can share a single timeline, it needs to be protected by a mutex.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 27 +++
Convert the list manipulation of active to use spinlocks so that we can
perform the updates from underneath a quick interrupt callback.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c| 10 --
drivers/gpu/drm/i915
Since execlista and the guc have diverged in their port tracking, we
cannot simply reuse the execlists cancellation code as it leads to
unbalanced reference counting. Use a local simpler routine for the guc.
Signed-off-by: Chris Wilson
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/gt/inte
Forgo the struct_mutex requirement for request retirement as we have
been transitioning over to only using the timeline->mutex for
controlling the lifetime of a request on that timeline.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 183 ++
drive
As we track when we put the GT device to sleep upon idling, we can use
that callback to sample the current rc6 counters and record the
timestamp for estimating samples after that point while asleep.
v2: Stick to using ktime_t
v3: Track user_wakerefs that interfere with the new
intel_gt_pm_wait_for
We use timeline->mutex to protect modifications to
context->active_count, and the associated enable/disable callbacks.
Due to complications with engine-pm barrier there is a path where we used
a "superlock" to provide serialised protect and so could not
unconditionally assert with lockdep that it w
Quoting Mika Kuoppala (2019-08-12 12:52:56)
> Chris Wilson writes:
>
> > Be a little more conservative in our ring measurement and exclude one
> > batch to leave room in case our user needs to wrap (where a request will
> > be expanded to cover the unused space at the end of the ring).
> >
>
> d
== Series Details ==
Series: series starting with [1/8] drm/i915/execlists: Avoid sync calls during
park (rev2)
URL : https://patchwork.freedesktop.org/series/65080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6685 -> Patchwork_13984
== Series Details ==
Series: drm/i915/uc: Update copyright and license
URL : https://patchwork.freedesktop.org/series/65083/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6685 -> Patchwork_13983
Summary
---
**SUCCESS
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