== Series Details ==
Series: More mmio and intel_gt cleanups and refactorings (rev2)
URL : https://patchwork.freedesktop.org/series/63063/
State : failure
== Summary ==
Patch format detection failed.
___
Intel-gfx mailing list
Intel-gfx@lists.freede
== Series Details ==
Series: drm/i915: Report if i915_active is still busy upon waiting
URL : https://patchwork.freedesktop.org/series/63062/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13487_full
S
== Series Details ==
Series: Improve whitelist selftest for read-only registers
URL : https://patchwork.freedesktop.org/series/63102/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6398 -> Patchwork_13499
Summary
---
Patches sent.
I haven't made any changes to dmesg output as I'm not sure what you mean.
Ah, do you mean the debug print in wa_init_finish()? Sure, I can add the
engine name to that.
John.
On 6/25/2019 01:33, Tvrtko Ursulin wrote:
Ping.
We agreed to follow up with a test ASAP after mergin
From: John Harrison
Follow up patch to earlier whitelist updates. This series adds some
extra sanity checking to the driver and improves the self-test.
John Harrison (2):
drm/i915: Add test for invalid flag bits in whitelist entries
drm/i915: Implement read-only support in whitelist selftest
From: John Harrison
As per review feedback by Tvrtko, added a check that no invalid bits
are being set in the whitelist flags fields.
Also updated the read/write access definitions to make it clearer that
they are an enum field not a set of single bit flags.
Signed-off-by: John Harrison
CC: Tv
From: John Harrison
Newer hardware supports extra feature in the whitelist registers. This
patch updates the selftest to test that entries marked as read only
are actually read only.
Signed-off-by: John Harrison
CC: Tvrtko Ursulin
---
.../gpu/drm/i915/gt/selftest_workarounds.c| 43 +++
== Series Details ==
Series: Support mipi dsi video mode on TGL
URL : https://patchwork.freedesktop.org/series/63058/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13486_full
Summary
---
**SUCC
== Series Details ==
Series: drm/i915/guc: Remove preemption support for current fw (rev2)
URL : https://patchwork.freedesktop.org/series/56767/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13485_full
On Tue, Jul 02, 2019 at 09:42:04PM +0200, Maarten Lankhorst wrote:
> When the clock is higher than the dotclock, try with 2 pipes enabled.
> If we can enable 2, then we will go into big joiner mode, and steal
> the adjacent crtc.
>
> This only links the planes in software, no hardware programming
== Series Details ==
Series: drm/i915/gem: Free pages before rcu-freeing the object (rev2)
URL : https://patchwork.freedesktop.org/series/63042/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13484_full
On Tue, Jul 02, 2019 at 09:42:02PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i
This adds a helper function for reading the rotation (panel
orientation) from the device tree.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_panel.c | 43 +
include/drm/drm_panel.h | 7 ++
2 files changed, 50 insertions(+)
diff --git a/driver
This inits the panel orientation property for the mediatek dsi driver
if the panel orientation (connector.display_info.panel_orientation) is
not DRM_MODE_PANEL_ORIENTATION_UNKNOWN.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 8
1 file changed, 8 insertions(+)
This adds the plumbing for reading panel rotation from the devicetree
and sets up adding a panel property for the panel orientation on
Mediatek SoCs when a rotation is present.
v4 changes:
-fixed some changes made to the i915 driver
-clarified comments on of orientation helper
v3 changes:
-change
Not every platform needs quirk detection for panel orientation, so
split the drm_connector_init_panel_orientation_property into two
functions. One for platforms without the need for quirks, and the
other for platforms that need quirks.
Signed-off-by: Derek Basehore
---
drivers/gpu/drm/drm_connec
Devicetree systems can set panel orientation via a panel binding, but
there's no way, as is, to propagate this setting to the connector,
where the property need to be added.
To address this, this patch sets orientation, as well as other fixed
values for the panel, in the drm_panel_attach function.
== Series Details ==
Series: drm/i915/selftests: Common live setup/teardown
URL : https://patchwork.freedesktop.org/series/63099/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6398 -> Patchwork_13498
Summary
---
**FA
== Series Details ==
Series: series starting with [1/3] drm/i915/guc: Remove preemption support for
current fw
URL : https://patchwork.freedesktop.org/series/63095/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6398 -> Patchwork_13497
=
== Series Details ==
Series: drm/i915/selftests: Common live setup/teardown
URL : https://patchwork.freedesktop.org/series/63099/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5f846dba1d19 drm/i915/selftests: Common live setup/teardown
-:239: CHECK:MACRO_ARG_REUSE: Macro argume
== Series Details ==
Series: drm/i915: Use the "display core" power domain in vlv/chv set_cdclk()
URL : https://patchwork.freedesktop.org/series/63045/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13483_full
=
== Series Details ==
Series: series starting with [1/3] drm/i915/guc: Remove preemption support for
current fw
URL : https://patchwork.freedesktop.org/series/63095/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Remove preemption support
== Series Details ==
Series: Bigjoiner atomic preparations.
URL : https://patchwork.freedesktop.org/series/63094/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6398 -> Patchwork_13496
Summary
---
**SUCCESS**
No re
We frequently, and not frequently enough, remember to flush residual
openations and objects at the end of a live subtest. The purpose is to
cleanup after every subtest, leaving a clean slate for the next subtest,
and perform early detection of leaky state.
Signed-off-by: Chris Wilson
Cc: Tvrtko U
== Series Details ==
Series: series starting with [1/6] drm/i915: Check
crtc_state->wm.need_postvbl_update before grabbing wm.mutex
URL : https://patchwork.freedesktop.org/series/63044/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394_full -> Patchwork_13482_full
==
== Series Details ==
Series: Bigjoiner atomic preparations.
URL : https://patchwork.freedesktop.org/series/63094/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Prepare to split crtc state in uapi and hw state
-O:drivers/gpu/drm/i915/intel_pm
== Series Details ==
Series: Bigjoiner atomic preparations.
URL : https://patchwork.freedesktop.org/series/63094/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b9e17bf6bac7 drm/i915: Prepare to split crtc state in uapi and hw state
-:11: WARNING:COMMIT_LOG_LONG_LINE: Possible u
== Series Details ==
Series: drm/i915: synchronize_irq() against the actual irq (rev2)
URL : https://patchwork.freedesktop.org/series/63081/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6398 -> Patchwork_13494
Summary
== Series Details ==
Series: drm/i915/dmc: protect against reading random memory (rev2)
URL : https://patchwork.freedesktop.org/series/61695/
State : failure
== Summary ==
Applying: drm/i915/dmc: protect against reading random memory
Using index info to reconstruct a base tree...
M drive
On 7/2/19 1:52 PM, Michal Wajdeczko wrote:
On Tue, 02 Jul 2019 22:09:47 +0200, Daniele Ceraolo Spurio
wrote:
The "misc" terminology doesn't clearly explain what we intend to cover
in this phase. The only thing we do in there apart from FW fetch is
initializing the log workqueue. We can move
On Sat, Jun 29, 2019 at 09:45:10AM -0700, Joe Perches wrote:
> On Sat, 2019-06-29 at 17:25 +0300, Alexey Dobriyan wrote:
> > On Tue, Jun 11, 2019 at 03:00:10PM -0600, Andreas Dilger wrote:
> > > On Jun 11, 2019, at 2:48 PM, Andrew Morton
> > > wrote:
> > > > On Wed, 12 Jun 2019 01:08:36 +0530 Shy
On Tue, 02 Jul 2019 22:09:47 +0200, Daniele Ceraolo Spurio
wrote:
The "misc" terminology doesn't clearly explain what we intend to cover
in this phase. The only thing we do in there apart from FW fetch is
initializing the log workqueue. We can move the latter to the
init_early phase and renam
On Tue, 2019-07-02 at 23:29 +0300, Timo Aaltonen wrote:
> On 2.7.2019 22.54, Souza, Jose wrote:
> > Here a dmesg output of this patch working in a unpowered type-c
> > dongle:
> > https://gist.github.com/zehortigoza/93c54b03fb65237cc1a2e193acef61a8
> >
> > With the latest type-c patches from Imre
On 2.7.2019 22.54, Souza, Jose wrote:
> Here a dmesg output of this patch working in a unpowered type-c dongle:
> https://gist.github.com/zehortigoza/93c54b03fb65237cc1a2e193acef61a8
>
> With the latest type-c patches from Imre it is becoming really hard to
> reproduce this but is still possible,
== Series Details ==
Series: series starting with [1/3] drm/i915/gt: Use caller provided forcewake
for intel_mocs_init_engine
URL : https://patchwork.freedesktop.org/series/63082/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6397 -> Patchwork_13493
==
From: Chris Wilson
Preemption via GuC submission is not being supported with its current
legacy incarnation. The current FW does support a similar pre-emption
flow via H2G, but it is class-based instead of being instance-based,
which doesn't fit well with the i915 tracking. To fix this, the
firmw
The "misc" terminology doesn't clearly explain what we intend to cover
in this phase. The only thing we do in there apart from FW fetch is
initializing the log workqueue. We can move the latter to the
init_early phase and rename the function to clarify that they only
fetch/release the blobs.
Signe
We originally added support, in some cases partial, for different modes
of operations via guc clients:
- proxy vs direct submission;
- variable engine mask per-client.
We only ever used one flow (all submissions via a single proxy), so the
other code paths haven't been exercised and are most like
Here a dmesg output of this patch working in a unpowered type-c dongle:
https://gist.github.com/zehortigoza/93c54b03fb65237cc1a2e193acef61a8
With the latest type-c patches from Imre it is becoming really hard to
reproduce this but is still possible, also looks like due some internal
error on the d
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index d5c56ea079a4..b41ff88d3258 100644
--- a/drivers/gpu/
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 38 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 4 +--
3 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/dr
This is just a proof of concept for the software state,
not sure I handled every case correctly, and completely
untested on real hardware.
Maarten Lankhorst (7):
drm/i915: Prepare to split crtc state in uapi and hw state
drm/i915: Handle a few more cases for hw/sw split
drm/i915: Complete sw
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_atomic.c | 44
drivers/gpu/drm/i915/display/intel_atomic.h | 2 +
drivers/gpu/drm/i915/display/intel_display.c | 39 ++---
drivers/gpu/drm/i915/intel_drv.h | 8 ++--
4 files ch
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_dp.c | 234 +---
drivers/gpu/drm/i915/display/intel_dp.h | 4 -
2 files changed, 130 insertions(+), 108 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/
When the clock is higher than the dotclock, try with 2 pipes enabled.
If we can enable 2, then we will go into big joiner mode, and steal
the adjacent crtc.
This only links the planes in software, no hardware programming is
done yet.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/dis
This can be useful when calling the vdsc enable functions
directly without encoder.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
b/drivers/gpu/
== Series Details ==
Series: series starting with [1/3] drm/i915/gt: Use caller provided forcewake
for intel_mocs_init_engine
URL : https://patchwork.freedesktop.org/series/63082/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1d27975cb696 drm/i915/gt: Use caller provided force
commit bc7b488b1d1c71dc4c5182206911127bc6c410d6 upstream.
While loading the DMC firmware we were double checking the headers made
sense, but in no place we checked that we were actually reading memory
we were supposed to. This could be wrong in case the firmware file is
truncated or malformed.
Be
== Series Details ==
Series: Extend BT2020 support in iCSC and fixes (rev5)
URL : https://patchwork.freedesktop.org/series/60480/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6379_full -> Patchwork_13466_full
Summary
-
Just a little bit of feedback at the end of an otherwise quiet 20s.
Signed-off-by: Chris Wilson
---
tests/i915/gem_create.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index 9008cd8a2..aed7d1cec 100644
---
== Series Details ==
Series: drm/i915/display: Exploratory patch for fi-icl-dsi (rev2)
URL : https://patchwork.freedesktop.org/series/63069/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6396 -> Patchwork_13492
Summary
== Series Details ==
Series: drm/i915: Vulkan performance query support (rev6)
URL : https://patchwork.freedesktop.org/series/60916/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6390_full -> Patchwork_13480_full
Summary
--
== Series Details ==
Series: series starting with drm/i915/gem: Free pages before rcu-freeing the
object (rev2)
URL : https://patchwork.freedesktop.org/series/63076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6396 -> Patchwork_13491
On 7/2/19 4:45 AM, Tvrtko Ursulin wrote:
On 02/07/2019 11:34, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-07-02 11:23:11)
From: Tvrtko Ursulin
Some interrupt handling functions already have gt in their names
suggesting them as obvious candidates to make them take struct intel_gt
inste
== Series Details ==
Series: drm/i915/tgl: Enable HDCP 1.4 and 2.2 on Gen12+
URL : https://patchwork.freedesktop.org/series/63074/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6396 -> Patchwork_13490
Summary
---
**W
== Series Details ==
Series: series starting with [1/2] Revert "drm/i915: Introduce private PAT
management"
URL : https://patchwork.freedesktop.org/series/63065/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6396 -> Patchwork_13489
== Series Details ==
Series: series starting with [1/2] Revert "drm/i915: Introduce private PAT
management"
URL : https://patchwork.freedesktop.org/series/63065/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: Revert "drm/i915: Introduce private PAT ma
== Series Details ==
Series: series starting with [1/2] Revert "drm/i915: Introduce private PAT
management"
URL : https://patchwork.freedesktop.org/series/63065/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
73077b75c985 Revert "drm/i915: Introduce private PAT management"
-:26
From: Ville Syrjälä
When eliminating our use of drm_irq_install() I failed to convert
all our synchronize_irq() calls to consult pdev->irq instead of
dev_priv->drm.irq. As we no longer populate dev_priv->drm.irq
we're no longer synchronizing against anything.
v2: Add intel_syncrhonize_irq() (Chr
On Tue, Jul 02, 2019 at 03:58:46PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2019-07-02 15:49:47)
> > From: Ville Syrjälä
> >
> > When eliminating our use of drm_irq_install() I failed to convert
> > all our synchronize_irq() calls to consult pdev->irq instead of
> > dev_priv->drm.irq.
Quoting Mika Kuoppala (2019-07-01 11:44:42)
> If we untrack wakerefs, the actual count may reach zero.
> However the krealloced owners array is still there and
> needs to be taken care of. Free the owners unconditionally
> to fix the leak.
>
> Fixes: bd780f37a361 ("drm/i915: Track all held rpm wak
We don't care about the result of the read, so it may be garbage, we
only care that the mmio is flushed. As such, we can forgo using an
individual forcewake and lock around any posting-read for an engine.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h | 2 +-
1 file chang
We can assume the caller is holding a blanket forcewake for the
register writes during resume, and so we can skip taking individual
locks around each write inside execlists resume.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 23 ---
1 file changed, 1
During post-reset resume, we call intel_mocs_init_engine to reinitialise
the MOCS registers. Suprisingly, especially when enhanced by lockdep,
the acquisition of the forcewake lock around each register write takes a
substantial portion of the reset time. We don't need to use the
individual forcewak
From: Ville Syrjälä
When eliminating our use of drm_irq_install() I failed to convert
all our synchronize_irq() calls to consult pdev->irq instead of
dev_priv->drm.irq. As we no longer populate dev_priv->drm.irq
we're no longer synchronizing against anything.
Cc: Chris Wilson
Reported-by: Imre
Quoting Ville Syrjala (2019-07-02 15:49:47)
> From: Ville Syrjälä
>
> When eliminating our use of drm_irq_install() I failed to convert
> all our synchronize_irq() calls to consult pdev->irq instead of
> dev_priv->drm.irq. As we no longer populate dev_priv->drm.irq
> we're no longer synchronizing
== Series Details ==
Series: drm/i915: Fix memleak in runtime wakeref tracking
URL : https://patchwork.freedesktop.org/series/63031/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6390_full -> Patchwork_13479_full
Summary
--
When forcing a reset, it is crucial that the kernel correctly identifies
the injected hang. Verify this is the case for reset-stress.
Signed-off-by: Chris Wilson
---
Keep the igt_spin_free at the end to avoid issues where we fail to
bypass the guilty batch.
---
tests/i915/gem_eio.c | 17
icl-dsi is dying on suspend/resume at
RIP: 0010:icl_update_active_dpll+0x2c/0xa0 [i915]
which appears due to the loss of the time primary_port across suspend.
Protect against the potential NULL dereference by assuming
ICL_PORT_DPLL_DEFAULT unless the port is actively specified otherwise.
== Series Details ==
Series: series starting with [01/12] drm/i915/guc: Avoid reclaim locks during
reset
URL : https://patchwork.freedesktop.org/series/63029/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6390_full -> Patchwork_13478_full
=
On Tue, Jul 02, 2019 at 01:33:26PM +0100, Chris Wilson wrote:
> icl-dsi is dying on suspend/resume at
>
> RIP: 0010:icl_update_active_dpll+0x2c/0xa0 [i915]
>
> so take a guess that it is the primary_port is NULL.
Yes, DSI ports are not intel_digital_ports but use the shared DPLL code.
Not
Hi Oleg,
On Mon, 1 Jul 2019 at 09:00, Oleg Vasilev wrote:
>
> Currently, downstream port type is only reported in debugfs. This
> information should be considered important since it reflects the actual
> physical connector type. Some userspace (e.g. window compositors)
> may want to show this inf
As we have dropped the final reference to the object, we do not need to
wait until after the rcu grace period to drop its pages. We still require
struct_mutex to completely unbind the object to release the pages, so we
still need a free-worker to manage that from process context. By
scheduling the
Remember to lock the drm_mm as we modify it, lest it be modified in the
background by retire/free workers!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
Make the lockchains more deterministic via i915_active by flagging the
potential lock.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_active.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_active.c
b/drivers/gpu/drm/i915/i915_active.c
index 584b247df
As we have dropped the final reference to the object, we do not need to
wait until after the rcu grace period to drop its pages. We still require
struct_mutex to completely unbind the object to release the pages, so we
still need a free-worker to manage that from process context. By
scheduling the
Since a shrinker may be forced to wait on GPU activity,
i915_active_wait(&vma->active) must be safe for use inside a shrinker,
and so let's mark up the lock as being acquired by the shrinker to avoid
any nasty surprises creeping in.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_vma.c
>-Original Message-
>From: Peres, Martin
>Sent: Monday, July 1, 2019 7:05 PM
>To: Shankar, Uma ; intel-gfx@lists.freedesktop.org
>Subject: Re: ✗ Fi.CI.BAT: failure for Extend BT2020 support in iCSC and fixes
>(rev5)
>
>On 28/06/2019 18:06, Shankar, Uma wrote:
>>
>>
>>> -Original Mess
From Gen12 onwards, HDCP HW block is implemented within transcoders.
Till Gen11 HDCP HW block was part of DDI.
Hence required changes in HW programming is handled here.
v2:
_MMIO_TRANS is used [Lucas and Daniel]
platform check is moved into the caller [Lucas]
v3:
platform check is moved int
On Mon, Jul 01, 2019 at 11:00:21AM +0300, Oleg Vasilev wrote:
> Currently, downstream port type is only reported in debugfs. This
> information should be considered important since it reflects the actual
> physical connector type. Some userspace (e.g. window compositors)
> may want to show this inf
icl-dsi is dying on suspend/resume at
RIP: 0010:icl_update_active_dpll+0x2c/0xa0 [i915]
so take a guess that it is the primary_port is NULL.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
On 02/07/2019 15:30, Mika Kuoppala wrote:
Lionel Landwerlin writes:
The same tests failing on CFL+ platforms are also failing on ICL.
Documentation doesn't list the
WaAllowPMDepthAndInvocationCountAccessFromUMD workaround for ICL but
applying it fixes the same tests as CFL.
Didn't find more d
Lionel Landwerlin writes:
> The same tests failing on CFL+ platforms are also failing on ICL.
> Documentation doesn't list the
> WaAllowPMDepthAndInvocationCountAccessFromUMD workaround for ICL but
> applying it fixes the same tests as CFL.
Didn't find more documentation either but I have asked
Chris Wilson writes:
> Quoting Lionel Landwerlin (2019-06-28 13:07:19)
>> CFL:C0+ changed the status of those registers which are now
>> blacklisted by default.
>>
>> This is breaking a number of CTS tests on GL & Vulkan :
>>
>>
>> KHR-GL45.pipeline_statistics_query_tests_ARB.functional_frag
Quoting Michał Winiarski (2019-07-02 12:31:48)
> This reverts commit 4395890a48551982549d222d1923e2833dac47cf.
>
> It's been over a year since this was merged, and the actual users of
> intel_ppat_get / intel_ppat_put never materialized.
>
> Time to remove it!
>
> v2: Unbreak suspend (Chris)
> v
Quoting Michał Winiarski (2019-07-02 12:31:49)
> We missed one place where we check PPGTT-only platform for PPGTT
> presence. Let's remove it.
> While I'm here let's assert that this particular code is never called on
> pre-gen8 platforms.
>
> References: 4bdafb9ddfa4 ("drm/i915: Remove i915.enabl
On 02/07/2019 11:34, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-07-02 11:23:11)
From: Tvrtko Ursulin
Some interrupt handling functions already have gt in their names
suggesting them as obvious candidates to make them take struct intel_gt
instead of i915.
Signed-off-by: Paulo Zanoni
Co
On 02/07/2019 11:50, Chris Wilson wrote:
CI is currently breaking on linus/drm-intel-fixes due to the assert that
the kernel supports context engine maps. Report the lack of maps on
older kernels gracefully!
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
lib/i915/gem_engine_topology.c |
When forcing a reset, it is crucial that the kernel correctly identifies
the injected hang. Verify this is the case for reset-stress.
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/tests/i915/gem_eio.c
This reverts commit 4395890a48551982549d222d1923e2833dac47cf.
It's been over a year since this was merged, and the actual users of
intel_ppat_get / intel_ppat_put never materialized.
Time to remove it!
v2: Unbreak suspend (Chris)
v3: Rebase, drop fixes tag to avoid confusion
Signed-off-by: Mich
On 01/07/2019 18:17, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-07-01 12:34:32)
We're planning to use this for a couple of new feature where we need
to provide additional parameters to execbuf.
Signed-off-by: Lionel Landwerlin
Looks ok, are you convinced by I915_EXEC_EXT? It doesn't
We missed one place where we check PPGTT-only platform for PPGTT
presence. Let's remove it.
While I'm here let's assert that this particular code is never called on
pre-gen8 platforms.
References: 4bdafb9ddfa4 ("drm/i915: Remove i915.enable_ppgtt override")
Signed-off-by: Michał Winiarski
Cc: Chr
Quoting Lionel Landwerlin (2019-06-29 14:00:40)
> Okay to land?
Pushed with my ack. Thanks for the patches and sorry that simple changes
with such clear causality take so long to get reviewed.
-Chris
___
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== Series Details ==
Series: series starting with [1/2] drm: report dp downstream port type as a
subconnector property
URL : https://patchwork.freedesktop.org/series/63026/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6389_full -> Patchwork_13477_full
===
Quoting Chris Wilson (2019-06-29 14:13:50)
> From: Lionel Landwerlin
>
> When a register is readonly there is not much we can tell about its
> value (apart from its default value?). This can be covered by tests
> exercising the value of the register from userspace.
>
> For PS_INVOCATION_COUNT we
Quoting Lionel Landwerlin (2019-06-28 13:07:20)
> The same tests failing on CFL+ platforms are also failing on ICL.
> Documentation doesn't list the
> WaAllowPMDepthAndInvocationCountAccessFromUMD workaround for ICL but
> applying it fixes the same tests as CFL.
>
> v2: Use only one whitelist entr
Quoting Lionel Landwerlin (2019-06-28 13:07:19)
> CFL:C0+ changed the status of those registers which are now
> blacklisted by default.
>
> This is breaking a number of CTS tests on GL & Vulkan :
>
>
> KHR-GL45.pipeline_statistics_query_tests_ARB.functional_fragment_shader_invocations
> (GL)
== Series Details ==
Series: More mmio and intel_gt cleanups and refactorings
URL : https://patchwork.freedesktop.org/series/63063/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6394 -> Patchwork_13488
Summary
---
**
== Series Details ==
Series: drm/i915: Report if i915_active is still busy upon waiting
URL : https://patchwork.freedesktop.org/series/63062/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6394 -> Patchwork_13487
Summary
---
Quoting Patchwork (2019-07-02 11:46:48)
> == Series Details ==
>
> Series: More mmio and intel_gt cleanups and refactorings
> URL : https://patchwork.freedesktop.org/series/63063/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> a59370ad3ca8 drm/i915: Rework some inter
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