On 10/06/2019 18:25, Kenneth Graunke wrote:
On Monday, June 10, 2019 1:19:14 AM PDT Lionel Landwerlin wrote:
We got the wrong offsets (could they have changed?). New values were
computed off an error state by looking up the register offset in the
context image as written by the HW.
Signed-off-b
== Series Details ==
Series: Enable Multi-segmented-gamma for ICL (rev4)
URL : https://patchwork.freedesktop.org/series/60126/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6242 -> Patchwork_13248
Summary
---
**FAILU
== Series Details ==
Series: drm/i915: Add Wa_1409120013:icl,ehl
URL : https://patchwork.freedesktop.org/series/61867/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13231_full
Summary
---
**WAR
On 11/06/2019 18:11, Ville Syrjälä wrote:
On Mon, Jun 10, 2019 at 01:06:08PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Now that all their users are gone we can remove the macros and
accompanying duplicated comment.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Jani Nikula
Reviewed-by
From: Shashank Sharma
ICL introduces a new gamma correction mode in display engine, called
multi-segmented-gamma mode. This mode allows users to program the
darker region of the gamma curve with sueprfine precision. An
example use case for this is HDR curves (like PQ ST-2084).
If we plot a gamma
From: Shashank Sharma
This patch renames function ivb_load_lut_10_max to
ivb_load_lut_ext_max.
V3: Added Vill'es r-b.
Cc: Uma Shankar
Suggested-by: Ville Syrjala
Reviewed-by: Ville Syrjala
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/i915/intel_color.c | 14 +++---
1 file ch
Add macros to define multi segmented gamma registers
V2: Addressed Ville's comments:
Add gen-lable before bit definition
Addressed Jani's comment
- Use REG_GENMASK() and REG_BIT()
V3: Addressed Ville's comments:
- Put comments at the end of line.
- Change the comment at
This patch series enables programming of Multi-segmented-gamma
palette for ICL.
Note: Due to the roundup and eventual precision loss, there are CRC
failures with IGT color tests when multi segmented gamma mode is enabled.
v4: Rebase and addressed Ville's review comments.
Shashank Sharma (3):
d
From: Shashank Sharma
Currently, data type of gamma_lut_size & degamma_lut_size elements
in intel_device_info is u16, which means it can accommodate maximum
64k values. In case of ICL multisegmented gamma, the size of gamma
LUT is 256K.
This patch changes the data type of both of these elements
On Tue, 11 Jun 2019, Daniel Thompson wrote:
> On Fri, Jun 07, 2019 at 12:07:55PM +0200, Bartlomiej Zolnierkiewicz wrote:
> > On 6/6/19 9:38 AM, Daniel Vetter wrote:
> >
> > >> - Hash out actual merge plan.
> > >
> > > I'd like to stuff this into drm.git somehow, I guess topic branch works
> > > t
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: move modesetting
output/encoder code under display/
URL : https://patchwork.freedesktop.org/series/61865/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13230_full
== Series Details ==
Series: Use ranges for voltage level lookup
URL : https://patchwork.freedesktop.org/series/61864/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230_full -> Patchwork_13229_full
Summary
---
**SUC
== Series Details ==
Series: drm/i915/gvt: remove duplicate entry of trace (rev2)
URL : https://patchwork.freedesktop.org/series/61281/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6242 -> Patchwork_13247
Summary
---
== Series Details ==
Series: drm/i915/gvt: remove duplicate entry of trace (rev2)
URL : https://patchwork.freedesktop.org/series/61281/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1e63ef1847a7 drm/i915/gvt: remove duplicate entry of trace
-:16: WARNING:COMMIT_LOG_LONG_LINE: P
On 2019.05.26 13:26:33 +0530, Hariprasad Kelam wrote:
> Remove duplicate include of trace.h
>
> Issue identified by includecheck
>
> Signed-off-by: Hariprasad Kelam
> ---
> drivers/gpu/drm/i915/gvt/trace_points.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
between commit:
c7c7192c56d2 ("drm/amd/display: add audio related regs")
from the amdgpu tree and commit:
4fc4dca8320e ("drm/amd: drop use of drmp.h in os_types.h")
f
On Tue, Jun 11, 2019 at 1:57 AM Daniel Vetter wrote:
>
> On Mon, Jun 10, 2019 at 09:03:48PM -0700, Derek Basehore wrote:
> > This adds the attach/detach callbacks. These are for setting up
> > internal state for the connector/panel pair that can't be done at
> > probe (since the connector doesn't
On Mon, May 20, 2019 at 07:19:58AM +0100, Tvrtko Ursulin wrote:
>
> On 17/05/2019 02:25, John Harrison wrote:
> > On 5/15/2019 01:52, Tvrtko Ursulin wrote:
> > >
> > > On 13/05/2019 20:45, john.c.harri...@intel.com wrote:
> > > > From: John Harrison
> > > >
> > > > With virtual engines, it is n
On Tue, Jun 11, 2019 at 1:54 AM Hans de Goede wrote:
>
> Hi,
>
> On 11-06-19 10:08, Jani Nikula wrote:
> > On Mon, 10 Jun 2019, Derek Basehore wrote:
> >> This removes the orientation quirk detection from the code to add
> >> an orientation property to a panel. This is used only for legacy x86
>
== Series Details ==
Series: series starting with [REBASED,1/2] drm/i915: Move
intel_add_dsi_properties to intel_dsi
URL : https://patchwork.freedesktop.org/series/61862/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13228_full
=
Need some suggestions on what could be stored in slave_crtc_state to point to
the master,
See my comments/questions inline
On Tue, Apr 23, 2019 at 08:48:58AM -0700, Manasi Navare wrote:
> In case of tiled displays when the two tiles are sent across two CRTCs
> over two separate DP SST connectors,
== Series Details ==
Series: Implicit dev_priv removal (rev2)
URL : https://patchwork.freedesktop.org/series/61705/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13227_full
Summary
---
**WARNIN
== Series Details ==
Series: drm/i915: Promote i915->mm.obj_lock to be irqsafe (rev3)
URL : https://patchwork.freedesktop.org/series/61832/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13226_full
Sum
On Tue, Jun 11, 2019 at 8:25 AM Rob Herring wrote:
>
> On Mon, Jun 10, 2019 at 10:03 PM Derek Basehore
> wrote:
> >
> > This adds to the rotation documentation to explain how drivers should
> > use the property and gives an example of the property in a devicetree
> > node.
> >
> > Signed-off-by:
Quoting Chris Wilson (2019-06-11 20:50:09)
> Quoting Mika Kuoppala (2019-06-11 18:27:30)
> > Swapping a pd entry is same across the page directories, if
> > we succeed we need to increment the count and write the phys page
> > entry. Make a common function for it.
> >
> > Signed-off-by: Mika Kuopp
On Tue, 11 Jun 2019 15:00:10 -0600 Andreas Dilger wrote:
> >> to FIELD_SIZEOF
> >
> > As Alexey has pointed out, C structs and unions don't have fields -
> > they have members. So this is an opportunity to switch everything to
> > a new member_sizeof().
> >
> > What do people think of that and
On Wed, 12 Jun 2019 01:08:36 +0530 Shyam Saini
wrote:
> Currently, there are 3 different macros, namely sizeof_field, SIZEOF_FIELD
> and FIELD_SIZEOF which are used to calculate the size of a member of
> structure, so to bring uniformity in entire kernel source tree lets use
> FIELD_SIZEOF and r
On Wed, Jun 12, 2019 at 01:08:36AM +0530, Shyam Saini wrote:
> In favour of FIELD_SIZEOF, this patch also deprecates other two similar
> macros sizeof_field and SIZEOF_FIELD.
>
> For code compatibility reason, retain sizeof_field macro as a wrapper macro
> to FIELD_SIZEOF
Can you explain this par
On 6/7/19 1:58 AM, Tvrtko Ursulin wrote:
+ Jani & Ville
Jani, Ville, any feedback on this approach?
BTW, If we want to keep the accesses short we could also have display_*
register access wrappers that take i915 and internally use &i915->de_uncore.
On 06/06/2019 22:52, Daniele Ceraolo
Quoting Chris Wilson (2019-06-11 20:41:59)
> Quoting Mika Kuoppala (2019-06-11 18:27:24)
> > struct i915_page_table {
> > struct i915_page_dma base;
> > - atomic_t used_ptes;
> > + atomic_t used;
> > };
> >
> > struct i915_page_directory {
> > struct i915_page_dma b
Quoting Mika Kuoppala (2019-06-11 18:27:30)
> Swapping a pd entry is same across the page directories, if
> we succeed we need to increment the count and write the phys page
> entry. Make a common function for it.
>
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 41
Quoting Mika Kuoppala (2019-06-11 18:27:25)
> We set the page directory entries to point into a page table.
> There is no gen specifics in here so make it simple and
> obvious.
>
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 16
> 1 file changed, 8
Quoting Mika Kuoppala (2019-06-11 18:27:24)
> All page directories are identical in function, only the position in the
> hierarchy differ. Use same base type for directory functionality.
>
> Cc: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Matthew Auld
> Cc: Abdiel Janulgue
> Signed-off-by: Mika K
== Series Details ==
Series: Revert "drm/i915/icl: More workaround for port F detection due to
broken VBTs"
URL : https://patchwork.freedesktop.org/series/61846/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13225_full
==
Quoting Mika Kuoppala (2019-06-11 18:27:24)
> struct i915_page_table {
> struct i915_page_dma base;
> - atomic_t used_ptes;
> + atomic_t used;
> };
>
> struct i915_page_directory {
> struct i915_page_dma base;
> -
> - struct i915_page_table *page_table[I915_PD
Quoting Mika Kuoppala (2019-06-11 18:27:23)
> We set them to scratch right after allocation so prevent
> useless zeroing before.
>
> v2: atomic_t
>
> Cc: Chris Wilson
> Signed-off-by: Mika Kuoppala
> Reviewed-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
> 1 file chan
== Series Details ==
Series: series starting with [1/5] drm/i915: Do not touch the PCH SSC reference
if a PLL is using it (rev2)
URL : https://patchwork.freedesktop.org/series/61608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6227_full -> Patchwork_13224_full
=
== Series Details ==
Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for
page dirs
URL : https://patchwork.freedesktop.org/series/61914/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6240 -> Patchwork_13246
==
On Tue, Jun 11, 2019 at 07:55:45PM +0200, Daniel Vetter wrote:
> On Tue, Jun 11, 2019 at 7:50 PM Ville Syrjälä
> wrote:
> >
> > On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote:
> > > On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
> > > >
>
Hi Sean,
Thank you for the patch.
On Tue, Jun 11, 2019 at 12:08:18PM -0400, Sean Paul wrote:
> From: Sean Paul
>
> Everyone who implements connector_helper_funcs->atomic_check reaches
> into the connector state to get the atomic state. Instead of continuing
> this pattern, change the callback s
== Series Details ==
Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for
page dirs
URL : https://patchwork.freedesktop.org/series/61914/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/gtt: No need to zero the table
On Tue, Jun 11, 2019 at 7:50 PM Ville Syrjälä
wrote:
>
> On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote:
> > On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > i915 will now refuse to enable a C8 plane unless the gamma_lut
> > > is
== Series Details ==
Series: series starting with [1/9] drm/i915/gtt: No need to zero the table for
page dirs
URL : https://patchwork.freedesktop.org/series/61914/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
84806e55a140 drm/i915/gtt: No need to zero the table for page dirs
On Fri, Jun 07, 2019 at 08:43:56PM +0200, Daniel Vetter wrote:
> On Fri, Jun 07, 2019 at 07:26:11PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Respect the user's choice of depth/bpp for the fbdev framebuffer
> > and throw out the fb we inherited from the BIOS if it doesn't
> > ma
On Fri, Jun 07, 2019 at 08:40:15PM +0200, Daniel Vetter wrote:
> On Fri, Jun 07, 2019 at 07:26:10PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > i915 will now refuse to enable a C8 plane unless the gamma_lut
> > is already enabled (to avoid scanning out whatever garbage got
> > lef
All page directories are identical in function, only the position in the
hierarchy differ. Use same base type for directory functionality.
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc: Abdiel Janulgue
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/gem/i915_gem_context.c |
Swapping a pd entry is same across the page directories, if
we succeed we need to increment the count and write the phys page
entry. Make a common function for it.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 41 +++--
1 file changed, 27 insertio
We set the page directory entries to point into a page table.
There is no gen specifics in here so make it simple and
obvious.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm
We don't use common codepaths to setup and cleanup page
directories vs page tables. So their setup and cleanup macros
are of no use.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu
Check the physical page before writing the entry into
the physical page. This further generalizes the pd so that
manipulation in callsites will be identical, removing the need to
handle pdps differently for gen8.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 20 +++--
Allocate all page directory variants with alloc_pd. As
the lvl3 and lvl4 variants differ in manipulation, we
need to check for existence of backing phys page before accessing
it.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 100
1 file chang
We set them to scratch right after allocation so prevent
useless zeroing before.
v2: atomic_t
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
For all page directory entries, the pde encoding is
identical. Don't compilicate call sites with different
versions of doing the same thing.
Only wart that remains is a 4 entry gen8/bsw pdp, for which
we need to check the backing phys page.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/
All page directories, excluding last level, are initialized with
pointer to next level page directories. Make common function for it.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 37 +++--
1 file changed, 14 insertions(+), 23 deletions(-)
diff -
On Tue, Jun 11, 2019 at 08:47:07AM +0100, Chris Wilson wrote:
> Quoting Jani Nikula (2019-06-10 22:53:11)
> > Add a new subdirectory for display code, and start off by moving
> > modesetting output/encoder code. Judging by the include changes, this is
> > a surprisingly clean operation.
> >
> > Cc
On Tue, Jun 11, 2019 at 08:52:31AM +0100, Chris Wilson wrote:
> Quoting Jani Nikula (2019-06-10 22:53:12)
> > Now that we have a new subdirectory for display code, continue by moving
> > modesetting core code.
> >
> > display/intel_frontbuffer.h sticks out like a sore thumb, otherwise this
> > is,
On Mon, Jun 10, 2019 at 01:06:08PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Now that all their users are gone we can remove the macros and
> accompanying duplicated comment.
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Jani Nikula
> Reviewed-by: Jani Nikula
> ---
> driver
On Tue, Jun 11, 2019 at 03:28:20PM +0200, Maarten Lankhorst wrote:
> They have been unused since rotation was added to drm core in 2015,
> time to get rid of them.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.c | 45 --
Chris Wilson writes:
> If we will completely overwrite the PT with PTEs for the object, we can
> forgo filling it with scratch entries.
>
> References: 14826673247e ("drm/i915: Only initialize partially filled
> pagetables")
> Signed-off-by: Chris Wilson
> Cc: Joonas Lahtinen
> Cc: Mika Kuoppa
On 6/11/2019 2:36 AM, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-11 09:41:02)
On 10/06/2019 19:17, Daniele Ceraolo Spurio wrote:
On 6/10/19 9:16 AM, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-10 16:54:13)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
b/drivers/
== Series Details ==
Series: drm/i915: Prevent lock-cycles between GPU waits and GPU resets
URL : https://patchwork.freedesktop.org/series/61901/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13245
Summary
From: Sean Paul
Everyone who implements connector_helper_funcs->atomic_check reaches
into the connector state to get the atomic state. Instead of continuing
this pattern, change the callback signature to just give atomic state
and let the driver determine what it does and does not need from it.
On Tue, Jun 11, 2019 at 03:16:35PM +0100, Daniel Thompson wrote:
> On Fri, Jun 07, 2019 at 12:07:55PM +0200, Bartlomiej Zolnierkiewicz wrote:
> >
> > On 6/6/19 9:38 AM, Daniel Vetter wrote:
> > > Hi Bart,
> >
> > Hi Daniel,
> >
> > > On Tue, May 28, 2019 at 11:02:31AM +0200, Daniel Vetter wrote:
On Mon, Jun 10, 2019 at 02:48:19PM -0700, Lucas De Marchi wrote:
> Spec shows voltage level 0 as 307.2, 312, or lower and suggests to use
> range checks. Prepare for having other frequencies in these ranges by
> not comparing the exact frequency.
>
> v2: invert checks by comparing biggest cdclk fi
On Tue, Jun 11, 2019 at 03:09:29PM +0100, Daniel Thompson wrote:
> On Tue, May 28, 2019 at 11:02:55AM +0200, Daniel Vetter wrote:
> > This reverts commit 994efacdf9a087b52f71e620b58dfa526b0cf928.
> >
> > The justification is that if hw blanking fails (i.e. fbops->fb_blank)
> > fails, then we still
== Series Details ==
Series: drm/i915/gtt: Skip initializing PT with scratch if full
URL : https://patchwork.freedesktop.org/series/61900/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13244
Summary
--
== Series Details ==
Series: drm/i915/gtt: Skip initializing PT with scratch if full
URL : https://patchwork.freedesktop.org/series/61900/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6afacc870ab4 drm/i915/gtt: Skip initializing PT with scratch if full
-:9: WARNING:COMMIT_LOG_
== Series Details ==
Series: drm/i915: Check the right binding exists in i915_vma_misplaced()
URL : https://patchwork.freedesktop.org/series/61899/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13243
Summa
== Series Details ==
Series: drm/i915/hangcheck: Look at instdone for all engines
URL : https://patchwork.freedesktop.org/series/61843/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13223_full
Summary
== Series Details ==
Series: drm/i915: Nuke atomic set/get prop plane stubs
URL : https://patchwork.freedesktop.org/series/61898/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13242
Summary
---
**SU
We cannot allow ourselves to wait on the GPU while holding any lock we
may need to reset the GPU. While there is not an explicit lock between
the two operations, lockdep cannot detect the dependency. So let's tell
lockdep about the wait/reset dependency with an explicit lockmap.
Signed-off-by: Chr
If we will completely overwrite the PT with PTEs for the object, we can
forgo filling it with scratch entries.
References: 14826673247e ("drm/i915: Only initialize partially filled
pagetables")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
Reviewed-by: Mat
On Fri, Jun 07, 2019 at 12:07:55PM +0200, Bartlomiej Zolnierkiewicz wrote:
>
> On 6/6/19 9:38 AM, Daniel Vetter wrote:
> > Hi Bart,
>
> Hi Daniel,
>
> > On Tue, May 28, 2019 at 11:02:31AM +0200, Daniel Vetter wrote:
> >> Hi all,
> >>
> >> I think we're slowly getting there. Previous cover letter
On Tue, May 28, 2019 at 11:03:04AM +0200, Daniel Vetter wrote:
> With all the work I've done on replacing fb notifier calls with direct
> calls into fbcon the backlight/lcd notifier is the only user left.
>
> It will only receive events now that it cares about, hence we can
> remove this check.
>
On Tue, May 28, 2019 at 11:02:59AM +0200, Daniel Vetter wrote:
> Create a new wrapper function for this, feels like there's some
> refactoring room here between the two modes.
>
> v2: backlight notifier is also interested in the mode change event,
> it calls lcd->set_mode, of which there are 3 imp
On Tue, May 28, 2019 at 11:02:55AM +0200, Daniel Vetter wrote:
> This reverts commit 994efacdf9a087b52f71e620b58dfa526b0cf928.
>
> The justification is that if hw blanking fails (i.e. fbops->fb_blank)
> fails, then we still want to shut down the backlight. Which is exactly
> _not_ what fb_blank()
As a final check, after checking the various alignment and placement,
check that we exist in the right binding alias.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_vma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/
== Series Details ==
Series: drm/i915: Make read_subslice_reg take engine
URL : https://patchwork.freedesktop.org/series/61841/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13222_full
Summary
---
They have been unused since rotation was added to drm core in 2015,
time to get rid of them.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 45 ---
drivers/gpu/drm/i915/intel_atomic_plane.h | 8
drivers/gpu/drm/i915/intel_display.c
On Tue, 11 Jun 2019 15:13:21 +0200, Tvrtko Ursulin
wrote:
Michal,
On 11/06/2019 13:23, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_t
Michal,
On 11/06/2019 13:23, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rena
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move
intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
URL : https://patchwork.freedesktop.org/series/61887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13240
==
== Series Details ==
Series: series starting with [1/2] drm/i915: Move fence register tracking from
i915->mm to ggtt
URL : https://patchwork.freedesktop.org/series/61895/
State : failure
== Summary ==
Applying: drm/i915: Move fence register tracking from i915->mm to ggtt
Using index info to r
Den 08.06.2019 17.26, skrev Noralf Trønnes:
> This moves the modesetting code from drm_fb_helper to drm_client so it
> can be shared by all internal clients.
>
> Let's see what the CI says about the remaining patches. I have added the
> bootsplash todo entry patch adding Sam as contact.
>
> Nor
We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.
Signed-off-by
As the fence registers only apply to regions inside the GGTT is makes
more sense that we track these as part of the i915_ggtt and not the
general mm. In the next patch, we will then pull the register locking
underneath the i915_ggtt.mutex.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
-
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move
intel_guc_reserved_gtt_size to intel_wopcm_guc_size (rev2)
URL : https://patchwork.freedesktop.org/series/61887/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Mo
== Series Details ==
Series: series starting with [1/2] drm/i915: Move fence register tracking from
i915->mm to ggtt
URL : https://patchwork.freedesktop.org/series/61893/
State : failure
== Summary ==
Applying: drm/i915: Move fence register tracking from i915->mm to ggtt
Using index info to r
== Series Details ==
Series: series starting with [CI,1/6] drm/i915: Eliminate unused mmio accessors
URL : https://patchwork.freedesktop.org/series/61837/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13221_full
==
From: Tvrtko Ursulin
These functions operate on ggtt so make them take that directly as
parameter.
At the same time move the USES_GUC conditional down to
intel_guc_reserve_ggtt_top for symmetry with
intel_guc_reserved_gtt_size.
v2:
* Rename and move functions to be static in i915_gem_gtt.c (Mi
As the fence registers only apply to regions inside the GGTT is makes
more sense that we track these as part of the i915_ggtt and not the
general mm. In the next patch, we will then pull the register locking
underneath the i915_ggtt.mutex.
Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
-
We can reduce the locking for fence registers from the dev->struct_mutex
to a local mutex. We could introduce a mutex for the sole purpose of
tracking the fence acquisition, except there is a little bit of overlap
with the fault tracking, so use the i915_ggtt.mutex as it covers both.
Signed-off-by
Quoting Tvrtko Ursulin (2019-06-11 13:05:58)
>
> On 11/06/2019 09:52, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-06-11 09:35:07)
> >>
> >> On 10/06/2019 17:26, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2019-06-10 16:54:06)
> From: Tvrtko Ursulin
>
> Continuing the
On Mon, Jun 10, 2019 at 10:45:14PM +0300, Jani Nikula wrote:
> From: Vandita Kulkarni
>
> Since intel_add_dsi_properties will be used by other
> platforms too move it out of platform specific file.
>
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i
On 11/06/2019 09:52, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-11 09:35:07)
On 10/06/2019 17:26, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-06-10 16:54:06)
From: Tvrtko Ursulin
Continuing the conversion and elimination of implicit dev_priv.
Signed-off-by: Tvrtko Ursulin
S
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move
intel_guc_reserved_gtt_size to intel_wopcm_guc_size
URL : https://patchwork.freedesktop.org/series/61887/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13237
=
== Series Details ==
Series: series starting with [1/2] drm/i915: Move fence register tracking from
i915->mm to ggtt
URL : https://patchwork.freedesktop.org/series/61891/
State : failure
== Summary ==
Applying: drm/i915: Move fence register tracking from i915->mm to ggtt
Using index info to r
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move
intel_guc_reserved_gtt_size to intel_wopcm_guc_size
URL : https://patchwork.freedesktop.org/series/61887/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Move inte
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: Move
intel_guc_reserved_gtt_size to intel_wopcm_guc_size
URL : https://patchwork.freedesktop.org/series/61887/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
08010f3675e3 drm/i915/guc: Move intel_guc_reserved
== Series Details ==
Series: series starting with [CI,1/6] drm/i915: Remove I915_READ8
URL : https://patchwork.freedesktop.org/series/61886/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6230 -> Patchwork_13236
Summary
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