== Series Details ==
Series: GuC 32.0.3 (rev4)
URL : https://patchwork.freedesktop.org/series/58760/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5942 -> Patchwork_12818
Summary
---
**SUCCESS**
No regressions fou
Quoting Zhenyu Wang (2019-04-16 11:48:14)
> On 2019.04.16 10:29:03 +0300, Joonas Lahtinen wrote:
> > I'm getting an error while pulling this, could you check it:
> >
> > From https://github.com/intel/gvt-linux
> >* tag gvt-next-2019-04-09 -> FETCH_HEAD
> > dim: 66bd
Copy uapi/i915_drm.h across from
kernel commit d1172ab3d443e84ade75285f8c107bfac7e386d8
Author: Chris Wilson
Date: Fri Apr 12 08:14:16 2019 +0100
drm/i915: Introduce struct class_instance for engines across the uAPI
and adapt gem_ctx_sseu to match the new struct.
Signed-off-by: Chris Wils
== Series Details ==
Series: GuC 32.0.3 (rev4)
URL : https://patchwork.freedesktop.org/series/58760/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/guc: Change platform default GuC mode
Okay!
Commit: drm/i915/guc: Don't allow GuC submission
O
New GuC firmwares use updated sleep status definitions.
The polling on scratch register 14 is also now required only on suspend
and there is no need to provide the shared page.
v2: include changes for polling and shared page
Signed-off-by: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
Due to the upcoming changes to the GuC ABI interface, we must
disable GuC submission mode until final ABI will be available
on all GuC firmwares.
To avoid regressions on systems configured to run with no longer
supported configuration "enable_guc=3" or "enable_guc=1" clear
GuC submission bit.
v2:
From: Oscar Mateo
Controlling and handling of the GuC interrupts is Gen specific.
Create virtual functions to avoid redundant runtime Gen checks.
Gen-specific versions of these functions will follow.
v2: move vfuncs to struct guc (Daniele)
Signed-off-by: Oscar Mateo
Signed-off-by: Michal Wajde
This patch adds the support to load HuC on ICL.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Anusha Srivatsa
Cc: Tony Ye
---
drivers/gpu/drm/i915/intel_huc_fw.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_
New GuC firmwares require updated boot parameters.
v2: rebased
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Cc: Daniele Ceraolo Spurio
Cc: John Spotswood
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc.c | 38 +-
There are few minor changes in the CSS header related to the version
numbering in new GuC firmwares. Update our definition and start using
common tools for extracting bitfields.
v2: drop deprecated prod_preprod_fw field, replace unions with bit defs
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ce
Current GuC firmwares identify response message in a different way.
v2: update comments for other H2G bits (Daniele)
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Kelvin Gardiner
Cc: John Spotswood
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_ct.c
Define GuC firmware version for Icelake.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Anusha Srivatsa
Reviewed-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_guc_fw.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-
From: Oscar Mateo
The GuC interrupts now get their own interrupt vector (instead of
sharing a register with the PM interrupts) so handle appropriately.
v2: (Chris)
v3: rebased (Michal)
Bspec: 19820
Signed-off-by: Oscar Mateo
Signed-off-by: Michal Wajdeczko
Cc: Tvrtko Ursulin
Cc: Daniele Cera
Gen11 adds new set of scratch registers that can be used for MMIO
based Host-to-Guc communication. Due to limited number of these
registers it is expected that host will use them only for command
transport buffers (CTB) communication setup if one is available.
Bspec: 21044
Signed-off-by: Michal W
With newer GuC firmware it is always ok to ask GuC to update power
domain states. Make it an unconditional initialization step.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: John Spotswood
Reviewed-by: Daniele Ceraolo Spurio
Reviewed-by: John Spotswood
---
drivers/gpu/drm/i9
New GuC firmwares use different action code value for this command.
Signed-off-by: Michal Wajdeczko
Cc: John Spotswood
Cc: Daniele Ceraolo Spurio
Reviewed-by: Daniele Ceraolo Spurio
Reviewed-by: John Spotswood
---
drivers/gpu/drm/i915/intel_guc_fwif.h | 2 +-
1 file changed, 1 insertion(+),
Today our most desired GuC configuration is to only enable HuC
if it is available and we really don't care about GuC submission.
Change platform default GuC mode to match our desire.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spuri
Gen11 defines new more flexible Host-to-GuC interrupt register.
Now the host can write any 32-bit payload to trigger an interrupt
and GuC can additionally read this payload from the register.
Current GuC firmware ignores the payload so we just write 0.
Bspec: 21043
Signed-off-by: Michal Wajdeczko
Gen11 defines new register for checking HuC authentication status.
Look into the right register and bit.
v2: use reg/mask/value instead of dedicated functions (Daniele)
BSpec: 19686
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tony Ye
Cc: Vinay Belgaumkar
Cc: Joh
Gen11 GuC firmware expects H2G command messages to be sent over CTB
(command transport buffers).
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: John Spotswood
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file changed, 1
GuC stores some data in there, which might be stale after a reset.
Reinitialize whole ADS in case any part of it was corrupted during
previous GuC run.
v2: s/reinit/init, update functions descriptions (Tomek/Michal)
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: MichaĹ Winiarski
New GuC firmwares use updated definitions for the Additional Data
Structures (ADS).
v2: add note about Gen9 definition mismatch (Daniele)
rename __intel_engine_context_size (Daniele)
Signed-off-by: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Fernando Pacheco
Cc: J
GuC firmware changed its release version numbering schema and now it
also includes patch version. Update our GuC firmware path definitions
to match new pattern:
_guc_...bin
While here, reorder platform checks and start from the latest.
v2: keep single platform defs in one block (Daniele)
Si
New GuC firmwares (for SKL, BXT, KBL, ICL) with updated ABI interface.
Note: For correct bisecting, patches 3-8 can be squashed, as Gen9 GuC
support will be broken during update of GuC firmware definitions.
v2: only HuC authentication is supported
v3: never allow to turn on GuC submission mode
== Series Details ==
Series: drm/i915: Seal races between async GPU cancellation, retirement and
signaling
URL : https://patchwork.freedesktop.org/series/59584/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5939_full -> Patchwork_12817_full
===
On Tue, 2019-04-16 at 11:28 +0300, Jani Nikula wrote:
> The cdclk init/uninit code was changed by commit 93a643f29bcb
> ("drm/i915/cdclk: have only one init/uninit function") between the
> versions of commit 39564ae86d51 ("drm/i915/ehl: Inherit Ice Lake
> conditional code"). What got merged fails t
== Series Details ==
Series: i915/gem_spin_batch: Add test to resend spinner (rev2)
URL : https://patchwork.freedesktop.org/series/59586/
State : success
== Summary ==
CI Bug Log - changes from IGT_4952_full -> IGTPW_2870_full
Summary
-
On Fri, 2019-04-12 at 17:10 -0700, Ceraolo Spurio, Daniele wrote:
>
> On 4/11/19 1:44 AM, Michal Wajdeczko wrote:
> >
> > New GuC firmwares use different action code value for this command.
> >
> > Signed-off-by: Michal Wajdeczko
> > Cc: John Spotswood
> > Cc: Daniele Ceraolo Spurio
> Reviewe
On Mon, 2019-04-15 at 13:46 -0700, Ceraolo Spurio, Daniele wrote:
>
> On 4/11/19 1:44 AM, Michal Wajdeczko wrote:
> >
> > With newer GuC firmware it is always ok to ask GuC to update power
> > domain states. Make it an unconditional initialization step.
> >
> > Signed-off-by: Michal Wajdeczko
>
On Fri, 2019-04-12 at 17:20 -0700, Ceraolo Spurio, Daniele wrote:
> From: Michal Wajdeczko
>
> New GuC firmwares use updated sleep status definitions.
> The polling on scratch register 14 is also now required only on
> suspend
> and there is no need to provide the shared page.
>
> v2: include ch
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20190416]
[cannot apply to v5.1-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
On Thu, 11 Apr 2019 16:36:00 -0700
Vivek Kasireddy wrote:
> This patch adds support for DPLL4 on EHL that include the
> following restrictions:
>
> - DPLL4 cannot be used with DDIA (combo port A internal eDP usage).
> DPLL4 can be used with other DDIs, including DDID
> (combo port A external
Quoting Chris Wilson (2019-04-16 15:59:38)
> Quoting Tvrtko Ursulin (2019-04-16 15:53:40)
> >
> > On 16/04/2019 15:17, Chris Wilson wrote:
> > > Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
> > >>
> > >> On 16/04/2019 14:14, Chris Wilson wrote:
> > >>> Read the engine workarounds back using the GP
== Series Details ==
Series: series starting with [1/2] drm/i915: Verify workarounds immediately
after application
URL : https://patchwork.freedesktop.org/series/59579/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5938_full -> Patchwork_12816_full
===
On Tue, Apr 16, 2019 at 08:13:12PM +0200, Maarten Lankhorst wrote:
> Op 16-04-2019 om 15:42 schreef Ville Syrjälä:
> > On Tue, Apr 16, 2019 at 03:28:15PM +0200, Maarten Lankhorst wrote:
> >> Op 16-04-2019 om 15:20 schreef Ville Syrjälä:
> >>> On Sat, Apr 13, 2019 at 11:13:27AM +, Simon Ser wrot
Den 16.04.2019 09.59, skrev Daniel Vetter:
> On Sun, Apr 07, 2019 at 06:52:33PM +0200, Noralf Trønnes wrote:
>> drm_fb_helper_is_bound() is used to check if DRM userspace is in control.
>> This is done by looking at the fb on the primary plane. By the time
>> fb-helper gets around to committing,
Op 16-04-2019 om 15:42 schreef Ville Syrjälä:
> On Tue, Apr 16, 2019 at 03:28:15PM +0200, Maarten Lankhorst wrote:
>> Op 16-04-2019 om 15:20 schreef Ville Syrjälä:
>>> On Sat, Apr 13, 2019 at 11:13:27AM +, Simon Ser wrote:
From: Ville Syrjälä
This adds basic immutable support fo
== Series Details ==
Series: drm/i915: Seal races between async GPU cancellation, retirement and
signaling
URL : https://patchwork.freedesktop.org/series/59584/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5939 -> Patchwork_12817
=
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: start moving state checker to
intel_verify.c
URL : https://patchwork.freedesktop.org/series/59569/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5937_full -> Patchwork_12815_full
===
== Series Details ==
Series: i915/gem_spin_batch: Add test to resend spinner (rev2)
URL : https://patchwork.freedesktop.org/series/59586/
State : success
== Summary ==
CI Bug Log - changes from IGT_4952 -> IGTPW_2870
Summary
---
**SU
Quoting Bob Paauwe (2019-04-16 00:05:26)
> There are real-time use cases where having deterministic CPU processes
> can be more important than GPU power/performance. Parking the GPU at a
> specific freqency by setting idle, min and max prohibits the normal
> dynamic GPU frequency switching which ca
On Tue, 2019-04-16 at 17:14 +0300, Ville Syrjälä wrote:
> On Mon, Apr 15, 2019 at 03:55:19PM -0700, Radhakrishna Sripada wrote:
> > Fixes the clock-gating issue when pipe scaling is enabled.
> > (Lineage #2006604312)
> >
> > V2: Fix typo in headline(Chris)
> > Handle the non double buffered na
On Tue, Apr 16, 2019 at 08:30:22AM -0700, Bob Paauwe wrote:
On Mon, 15 Apr 2019 17:33:30 -0700
Vanshidhar Konda wrote:
On Mon, Apr 15, 2019 at 04:05:26PM -0700, Bob Paauwe wrote:
>There are real-time use cases where having deterministic CPU processes
>can be more important than GPU power/perfo
On Mon, 15 Apr 2019 17:33:30 -0700
Vanshidhar Konda wrote:
> On Mon, Apr 15, 2019 at 04:05:26PM -0700, Bob Paauwe wrote:
> >There are real-time use cases where having deterministic CPU processes
> >can be more important than GPU power/performance. Parking the GPU at a
> >specific freqency by sett
On 4/16/19 8:04 AM, Chris Wilson wrote:
> Quoting Fernando Pacheco (2019-04-16 15:51:15)
>> On 4/9/19 3:22 PM, Chris Wilson wrote:
>>> Quoting Fernando Pacheco (2019-04-09 22:31:01)
diff --git a/drivers/gpu/drm/i915/intel_huc.c
b/drivers/gpu/drm/i915/intel_huc.c
index 94c04f16a2ad.
On Tue, 16 Apr 2019 11:28:52 +0300
Jani Nikula wrote:
> The cdclk init/uninit code was changed by commit 93a643f29bcb
> ("drm/i915/cdclk: have only one init/uninit function") between the
> versions of commit 39564ae86d51 ("drm/i915/ehl: Inherit Ice Lake
> conditional code"). What got merged fails
On 4/16/19 8:05 AM, Chris Wilson wrote:
> Quoting Fernando Pacheco (2019-04-16 15:45:03)
>>
>> On 4/9/19 2:54 PM, Chris Wilson wrote:
>>> Quoting Fernando Pacheco (2019-04-09 22:31:02)
This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8.
>>> And don't forget the test code that skips g
Quoting Mika Kuoppala (2019-04-16 16:01:58)
> Add subtests to resend the same spinner to same context
> and to other context.
>
> v2: other engines (Chris)
>
> Cc: Chris Wilson
> Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
> + igt_subtest_f("resubmit-%s", e->name)
> +
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: Verify workarounds immediately
after application (rev2)
URL : https://patchwork.freedesktop.org/series/59560/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5936_full -> Patchwork_12814_full
=
On Mon, Apr 15, 2019 at 09:20:55PM +0200, Daniel Vetter wrote:
> On Mon, Apr 15, 2019 at 4:14 PM Lankhorst, Maarten
> wrote:
> >
> > mån 2019-04-15 klockan 19:26 +0530 skrev Sharma, Shashank:
> > > > -Original Message-
> > > > From: Lankhorst, Maarten
> > > > Sent: Monday, April 15, 2019 4
Quoting Fernando Pacheco (2019-04-16 15:45:03)
>
>
> On 4/9/19 2:54 PM, Chris Wilson wrote:
> > Quoting Fernando Pacheco (2019-04-09 22:31:02)
> >> This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8.
> > And don't forget the test code that skips guc.
> > -Chris
>
> Selftests? I couldn'
Quoting Fernando Pacheco (2019-04-16 15:51:15)
>
> On 4/9/19 3:22 PM, Chris Wilson wrote:
> > Quoting Fernando Pacheco (2019-04-09 22:31:01)
> >> diff --git a/drivers/gpu/drm/i915/intel_huc.c
> >> b/drivers/gpu/drm/i915/intel_huc.c
> >> index 94c04f16a2ad..89e0b942ae86 100644
> >> --- a/drivers/g
Add subtests to resend the same spinner to same context
and to other context.
v2: other engines (Chris)
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
tests/i915/gem_spin_batch.c | 67 -
1 file changed, 58 insertions(+), 9 deletions(-)
diff --git a/tests
Quoting Tvrtko Ursulin (2019-04-16 15:53:40)
>
> On 16/04/2019 15:17, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
> >>
> >> On 16/04/2019 14:14, Chris Wilson wrote:
> >>> Read the engine workarounds back using the GPU after loading the initial
> >>> context state to verify
Den 16.04.2019 11.42, skrev Maxime Ripard:
> Hi,
>
> On Sun, Apr 07, 2019 at 06:52:40PM +0200, Noralf Trønnes wrote:
>> All drivers add all their connectors so there's no need to keep around an
>> array of available connectors.
>>
>> Rename functions which signature is changed since they will be
On 4/9/19 3:22 PM, Chris Wilson wrote:
> Quoting Fernando Pacheco (2019-04-09 22:31:01)
>> diff --git a/drivers/gpu/drm/i915/intel_huc.c
>> b/drivers/gpu/drm/i915/intel_huc.c
>> index 94c04f16a2ad..89e0b942ae86 100644
>> --- a/drivers/gpu/drm/i915/intel_huc.c
>> +++ b/drivers/gpu/drm/i915/intel_h
On 16/04/2019 15:17, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
On 16/04/2019 14:14, Chris Wilson wrote:
Read the engine workarounds back using the GPU after loading the initial
context state to verify that we are setting them correctly, and bail if
it fails.
v2: Break
Hi Chris,
Thank you for the patch! Perhaps something to improve:
url:
https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Verify-whitelist-of-context-registers/20190416-105231
base: git://anongit.freedesktop.org/drm-intel for-linux-next
New smatch warnings:
drivers
On 16/04/2019 10:12, Chris Wilson wrote:
The RING_NONPRIV allows us to add registers to a whitelist that allows
userspace to modify them. Ideally such registers should be safe and
saved within the context such that they do not impact system behaviour
for other users. This selftest verifies that
On 4/9/19 2:54 PM, Chris Wilson wrote:
> Quoting Fernando Pacheco (2019-04-09 22:31:02)
>> This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8.
> And don't forget the test code that skips guc.
> -Chris
Selftests? I couldn't find anything that skips guc.
I found some skips for guc submis
On Tue, Apr 16, 2019 at 05:28:57PM +0300, Eero Tamminen wrote:
> Hi,
>
> Based on quick tests with the patch:
>
> * Results in GfxBench and Unigine (Valley/Heaven) tests were within
> daily variation on the tested SKL machines
>
> * SKL GT4e (128MB eLLC) / Wayland / Weston:
>+15-20% SynMark
Quoting Mika Kuoppala (2019-04-16 15:23:15)
> Add subtests to resend the same spinner to same context
> and to other context.
>
> Cc: Chris Wilson
> Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
For completeness in creating concise examples of use elsewhere, feed the
gem_execbuf to th
Add subtests to resend the same spinner to same context
and to other context.
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
tests/i915/gem_spin_batch.c | 47 ++---
1 file changed, 38 insertions(+), 9 deletions(-)
diff --git a/tests/i915/gem_spin_batch.c b/te
Quoting Tvrtko Ursulin (2019-04-16 15:10:25)
>
> On 16/04/2019 14:14, Chris Wilson wrote:
> > Read the engine workarounds back using the GPU after loading the initial
> > context state to verify that we are setting them correctly, and bail if
> > it fails.
> >
> > v2: Break out the verification i
== Series Details ==
Series: drm/i915: Drop bool return from breadcrumbs signaler
URL : https://patchwork.freedesktop.org/series/59565/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5936_full -> Patchwork_12813_full
Summary
Currently there is an underlying assumption that i915_request_unsubmit()
is synchronous wrt the GPU -- that is the request is no longer in flight
as we remove it. In the near future that may change, and this may upset
our signaling as we can process an interrupt for that request while it
is no long
Hi,
Based on quick tests with the patch:
* Results in GfxBench and Unigine (Valley/Heaven) tests were within
daily variation on the tested SKL machines
* SKL GT4e (128MB eLLC) / Wayland / Weston:
+15-20% SynMark TexMem512 (512MB of textures)
+4-6% SynMark TerrainFly*, CSCloth, ShMapVsm
On Mon, Apr 15, 2019 at 03:55:19PM -0700, Radhakrishna Sripada wrote:
> Fixes the clock-gating issue when pipe scaling is enabled.
> (Lineage #2006604312)
>
> V2: Fix typo in headline(Chris)
> Handle the non double buffered nature of the register(Ville)
> V3: Fix checkpatch warning. BAT failur
On 16/04/2019 14:14, Chris Wilson wrote:
Read the engine workarounds back using the GPU after loading the initial
context state to verify that we are setting them correctly, and bail if
it fails.
v2: Break out the verification into its own loop
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
== Series Details ==
Series: series starting with [1/2] drm/i915: Verify workarounds immediately
after application
URL : https://patchwork.freedesktop.org/series/59579/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5938 -> Patchwork_12816
=
On Thu, 2019-04-11 at 17:00 +0100, Lisovskiy, Stanislav wrote:
> On Thu, 2019-04-11 at 17:36 +0300, Gwan-gyeong Mun wrote:
> > The hotplug detection routine of drm_helper_hpd_irq_event() can
> > detect
> > changing of status of connector, but it can not detect changing of
> > edid.
> >
> > Followi
On Tue, Apr 16, 2019 at 03:28:15PM +0200, Maarten Lankhorst wrote:
> Op 16-04-2019 om 15:20 schreef Ville Syrjälä:
> > On Sat, Apr 13, 2019 at 11:13:27AM +, Simon Ser wrote:
> >> From: Ville Syrjälä
> >>
> >> This adds basic immutable support for the zpos property. The zpos increases
> >> from
Quoting Mika Kuoppala (2019-04-16 14:26:19)
> Chris Wilson writes:
>
> > Quoting Mika Kuoppala (2019-04-15 15:45:29)
> >> Set chicken bits to workaround a possible pixel shader
> >> dispatch hang.
> >>
> >> v2: no need to filter out preprod skl (Ville, Chris)
> >> v3: formatting
> >>
> >> Bspec
Op 16-04-2019 om 15:20 schreef Ville Syrjälä:
> On Sat, Apr 13, 2019 at 11:13:27AM +, Simon Ser wrote:
>> From: Ville Syrjälä
>>
>> This adds basic immutable support for the zpos property. The zpos increases
>> from bottom to top: primary, sprites, cursor.
> I was thinking a bit about how we m
Chris Wilson writes:
> When resubmitting the spinner, fill in the expected offset so that we
> are not tempted to relocate it across contexts (as the spinner must
> point back to itself for the MI_BB_START to work). In this case, these
> should work correctly as they are reusing the same active v
Chris Wilson writes:
> Quoting Mika Kuoppala (2019-04-15 15:45:29)
>> Set chicken bits to workaround a possible pixel shader
>> dispatch hang.
>>
>> v2: no need to filter out preprod skl (Ville, Chris)
>> v3: formatting
>>
>> Bspec: 14091, ID#0651
>> Cc: Chris Wilson
>> Cc: Ville Syrjälä
>> S
On Sat, Apr 13, 2019 at 11:13:27AM +, Simon Ser wrote:
> From: Ville Syrjälä
>
> This adds basic immutable support for the zpos property. The zpos increases
> from bottom to top: primary, sprites, cursor.
I was thinking a bit about how we might go about testing this.
We probably want a basi
Immediately after writing the workaround, verify that it stuck in the
register.
References: https://bugs.freedesktop.org/show_bug.cgi?id=108954
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_workarounds.c | 32 +---
Read the engine workarounds back using the GPU after loading the initial
context state to verify that we are setting them correctly, and bail if
it fails.
v2: Break out the verification into its own loop
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: start moving state checker to
intel_verify.c
URL : https://patchwork.freedesktop.org/series/59569/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5937 -> Patchwork_12815
=
== Series Details ==
Series: drm/i915/ehl: inherit icl cdclk init/uninit
URL : https://patchwork.freedesktop.org/series/59562/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5936_full -> Patchwork_12812_full
Summary
---
Chris Wilson writes:
> drivers/gpu/drm/i915/intel_pm.c:8352:9: error: incompatible types in
> comparison expression (different address spaces)
> drivers/gpu/drm/i915/intel_pm.c:8359:9: error: incompatible types in
> comparison expression (different address spaces)
>
Yes, they are gone,
Review
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: start moving state checker to
intel_verify.c
URL : https://patchwork.freedesktop.org/series/59569/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: start moving state checke
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915: start moving state checker to
intel_verify.c
URL : https://patchwork.freedesktop.org/series/59569/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a4e2e34c9de6 drm/i915: start moving state checker to intel_ver
Only comment issues. Besides these:
Reviewed-by: Tomasz Lis
On 2019-04-11 10:44, Michal Wajdeczko wrote:
GuC stores some data in there, which might be stale after a reset.
Reinitialize whole ADS in case any part of it was corrupted during
previous GuC run.
Signed-off-by: Michal Wajdeczko
Cc
Hi Swati,
Thank you for the patch! Perhaps something to improve:
url:
https://github.com/0day-ci/linux/commits/Swati-Sharma/drm-i915-adding-state-checker-for-gamma-lut-values/20190416-021708
base: git://anongit.freedesktop.org/drm-intel for-linux-next
New smatch warnings:
drivers/gpu/drm
== Series Details ==
Series: i915/gem_exec_schedule: Fill in obj.offset for spinner resubmission
URL : https://patchwork.freedesktop.org/series/59564/
State : success
== Summary ==
CI Bug Log - changes from IGT_4949_full -> IGTPW_2862_full
Quoting Tvrtko Ursulin (2019-04-16 10:48:05)
>
> On 16/04/2019 09:10, Chris Wilson wrote:
> > Sometimes the HW doesn't even play fair, and completely forgets about
> > register writes. Skip verifying known troublemakers.
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=108954
> >
== Series Details ==
Series: series starting with [v2,1/4] drm/i915: Verify workarounds immediately
after application (rev2)
URL : https://patchwork.freedesktop.org/series/59560/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5936 -> Patchwork_12814
===
Quoting Tvrtko Ursulin (2019-04-16 11:36:12)
>
> On 16/04/2019 10:57, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-04-16 10:43:43)
> >>
> >> On 16/04/2019 09:10, Chris Wilson wrote:
> >>> Read the engine workarounds back using the GPU after loading the initial
> >>> context state to verify
== Series Details ==
Series: drm/i915: Drop bool return from breadcrumbs signaler
URL : https://patchwork.freedesktop.org/series/59565/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5936 -> Patchwork_12813
Summary
---
On Tue, 16 Apr 2019, Jani Nikula wrote:
> On Mon, 15 Apr 2019, Swati Sharma wrote:
>> Signed-off-by: Swati Sharma
>> ---
>> drivers/gpu/drm/i915/i915_reg.h| 3 +++
>> drivers/gpu/drm/i915/intel_color.c | 51
>> ++
>> 2 files changed, 54 insertions(+)
>>
On Mon, 15 Apr 2019, Swati Sharma wrote:
> Signed-off-by: Swati Sharma
> ---
> drivers/gpu/drm/i915/i915_reg.h| 3 +++
> drivers/gpu/drm/i915/intel_color.c | 51
> ++
> 2 files changed, 54 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/
On 16/04/2019 10:57, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-04-16 10:43:43)
On 16/04/2019 09:10, Chris Wilson wrote:
Read the engine workarounds back using the GPU after loading the initial
context state to verify that we are setting them correctly, and bail if
it fails.
Signed-off
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_display.c | 471 +--
drivers/gpu/drm/i915/intel_drv.h | 9 +-
drivers/gpu/drm/i915/intel_verify.c | 465 ++
drivers/gpu/drm/i915/intel_verify.h | 8 +
4 files changed, 478 insertion
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/intel_display.c | 474 +--
drivers/gpu/drm/i915/intel_drv.h | 12 +
drivers/gpu/drm/i915/intel_verify.c | 464 ++
drivers/gpu/drm/i915/intel_veri
Hi,
On Sun, Apr 07, 2019 at 06:52:40PM +0200, Noralf Trønnes wrote:
> All drivers add all their connectors so there's no need to keep around an
> array of available connectors.
>
> Rename functions which signature is changed since they will be moved to
> drm_client in a later patch.
>
> Signed-off
== Series Details ==
Series: drm/i915/ehl: inherit icl cdclk init/uninit
URL : https://patchwork.freedesktop.org/series/59562/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5936 -> Patchwork_12812
Summary
---
**SUCCE
On Sun, Apr 07, 2019 at 06:52:32PM +0200, Noralf Trønnes wrote:
> Prepare for moving drm_fb_helper modesetting code to drm_client.
> drm_client will be linked to drm.ko, so move
> __drm_atomic_helper_disable_plane() and __drm_atomic_helper_set_config()
> out of drm_kms_helper.ko.
>
> While at it, f
Quoting Tvrtko Ursulin (2019-04-16 10:43:43)
>
> On 16/04/2019 09:10, Chris Wilson wrote:
> > Read the engine workarounds back using the GPU after loading the initial
> > context state to verify that we are setting them correctly, and bail if
> > it fails.
> >
> > Signed-off-by: Chris Wilson
> >
1 - 100 of 135 matches
Mail list logo
