Re: [Intel-gfx] [PATCH 4/4] drm/i915: Predictive governor to control eu/slice/subslice based on workload

2018-11-05 Thread Navik, Ankit P
Hi Tvrtko, > -Original Message- > From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com] > Sent: Tuesday, September 25, 2018 1:56 PM > To: Navik, Ankit P ; intel-gfx@lists.freedesktop.org > Cc: J Karanje, Kedar ; Diwakar, Praveen > ; Marathe, Yogesh > ; Muthukumar, Aravindan > > Su

Re: [Intel-gfx] [PATCH 3/4] drm/i915: set optimum eu/slice/sub-slice configuration based on load type

2018-11-05 Thread Navik, Ankit P
Hi Tvrtko, Your review changes are incorporated in v2. Regards, Ankit > -Original Message- > From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com] > Sent: Friday, September 21, 2018 6:36 PM > To: J Karanje, Kedar ; intel- > g...@lists.freedesktop.org > Cc: Diwakar, Praveen ; Marath

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Update render power clock state configuration for given context

2018-11-05 Thread Navik, Ankit P
Hi Tvrtko, > -Original Message- > From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com] > Sent: Friday, September 21, 2018 6:22 PM > To: J Karanje, Kedar ; intel- > g...@lists.freedesktop.org > Cc: Diwakar, Praveen ; Marathe, Yogesh > ; Navik, Ankit P ; > Muthukumar, Aravindan > S

[Intel-gfx] ✗ Fi.CI.BAT: failure for Dynamic EU configuration of Slice/Subslice/EU. (rev2)

2018-11-05 Thread Patchwork
== Series Details == Series: Dynamic EU configuration of Slice/Subslice/EU. (rev2) URL : https://patchwork.freedesktop.org/series/50006/ State : failure == Summary == Applying: drm/i915: Get active pending request for given context Using index info to reconstruct a base tree... M drivers

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Get active pending request for given context

2018-11-05 Thread Navik, Ankit P
Hi Tvrtko, > -Original Message- > From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com] > Sent: Friday, September 21, 2018 6:10 PM > To: J Karanje, Kedar ; intel- > g...@lists.freedesktop.org > Cc: Diwakar, Praveen ; Marathe, Yogesh > ; Navik, Ankit P ; > Muthukumar, Aravindan > Su

[Intel-gfx] [PATCH v2 4/4] drm/i915: Predictive governor to control eu/slice/subslice

2018-11-05 Thread Ankit Navik
From: Praveen Diwakar High resoluton timer is used for predictive governor to control eu/slice/subslice based on workloads. Debugfs is provided to enable/disable/update timer configuration Signed-off-by: Praveen Diwakar Signed-off-by: Yogesh Marathe Signed-off-by: Aravindan Muthukumar Signed

[Intel-gfx] [PATCH v2 2/4] drm/i915: Update render power clock state configuration for given context

2018-11-05 Thread Ankit Navik
From: Praveen Diwakar This patch will update power clock state register at runtime base on the flag which can set by any governor which computes load and want to update rpcs register. subsequent patches will have a timer based governor which computes pending load/request. Signed-off-by: Praveen

[Intel-gfx] [PATCH v2 0/4] Dynamic EU configuration of Slice/Subslice/EU.

2018-11-05 Thread Ankit Navik
drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel Current GPU configuration code for i915 does not allow us to change EU/Slice/Sub-slice configuration dynamically. Its done only once while context is created. While particular graphics application is running, if we exa

[Intel-gfx] [PATCH v2 3/4] drm/i915: set optimum eu/slice/sub-slice configuration based on load type

2018-11-05 Thread Ankit Navik
From: Praveen Diwakar This patch will select optimum eu/slice/sub-slice configuration based on type of load (low, medium, high) as input. Based on our readings and experiments we have predefined set of optimum configuration for each platform(CHT, KBL). i915_gem_context_set_load_type will select o

[Intel-gfx] [PATCH v2 1/4] drm/i915: Get active pending request for given context

2018-11-05 Thread Ankit Navik
From: Praveen Diwakar This patch gives us the active pending request count which is yet to be submitted to the GPU Signed-off-by: Praveen Diwakar Signed-off-by: Yogesh Marathe Signed-off-by: Aravindan Muthukumar Signed-off-by: Kedar J Karanje Signed-off-by: Ankit Navik Suggested-by: Tvrtko

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/framebuffer: Expose only modifiers that support at least a format

2018-11-05 Thread Patchwork
== Series Details == Series: drm/framebuffer: Expose only modifiers that support at least a format URL : https://patchwork.freedesktop.org/series/52064/ State : warning == Summary == $ dim checkpatch origin/drm-tip dcf2012746d9 drm/framebuffer: Expose only modifiers that support at least a fo

[Intel-gfx] [PATCH] drm/framebuffer: Expose only modifiers that support at least a format

2018-11-05 Thread Dhinakaran Pandiyan
Allows drivers to pass a larger modifier array, thereby avoiding declarations of static modifier arrays that are only slight different for each plane. Cc: dri-de...@lists.freedesktop.org Cc: Ville Syrjälä Suggested-by: Ville Syrjälä Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/drm_pl

Re: [Intel-gfx] [PATCH v4 2/2] drm/i915/icl: Define MOCS table for Icelake

2018-11-05 Thread Daniele Ceraolo Spurio
On 05/11/2018 05:50, Tomasz Lis wrote: The table has been unified across OSes to minimize virtualization overhead. The MOCS table is now published as part of bspec, and versioned. Entries are supposed to never be modified, but new ones can be added. Adding entries increases table version. The

Re: [Intel-gfx] [PATCH v8 04/19] drm/dsc: Add helpers for DSC picture parameter set infoframes

2018-11-05 Thread Srivatsa, Anusha
>-Original Message- >From: Navare, Manasi D >Sent: Friday, November 2, 2018 2:31 PM >To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org >Cc: Navare, Manasi D ; Jani Nikula >; Ville Syrjala ; >Srivatsa, Anusha ; Harry Wentland > >Subject: [PATCH v8 04/19] drm/dsc: Add hel

Re: [Intel-gfx] [v6 2/4] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-05 Thread Manasi Navare
On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote: > If the panel supports FEC, the driver has to > set the FEC_READY bit in the dpcd register: > FEC_CONFIGURATION. > > This has to happen before link training. > > v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready >- chang

Re: [Intel-gfx] [v6 1/4] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-05 Thread Manasi Navare
On Mon, Nov 05, 2018 at 03:31:47PM -0800, Anusha Srivatsa wrote: > For DP 1.4 and above, Display Stream compression can be > enabled only if Forward Error Correctin can be performed. > > Add a crtc state for FEC. Currently, the state > is determined by platform, DP and DSC being > enabled. Moving

[Intel-gfx] linux-next: manual merge of the drm-msm tree with the drm-misc tree

2018-11-05 Thread Stephen Rothwell
Hi all, Today's linux-next merge of the drm-msm tree got a conflict in: drivers/gpu/drm/msm/hdmi/hdmi.c between commit: f384d7d514d1 ("drm: Convert to using %pOFn instead of device_node.name") from the drm-misc tree and commit: bdc309778907 ("drm: msm: Use DRM_DEV_* instead of dev_*")

Re: [Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Kuo-Hsin Yang
On Tue, Nov 6, 2018 at 2:52 AM Dave Hansen wrote: > > On 11/5/18 3:13 AM, Kuo-Hsin Yang wrote: > > -These are currently used in two places in the kernel: > > +These are currently used in three places in the kernel: > > > > (1) By ramfs to mark the address spaces of its inodes when they are > >

Re: [Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Kuo-Hsin Yang
On Tue, Nov 6, 2018 at 12:41 AM Michal Hocko wrote: > On Mon 05-11-18 22:33:13, Kuo-Hsin Yang wrote: > > OK, this function should not be specific to shmem pages. > > > > Is it OK to remove the #ifdef SHMEM surrounding > > check_move_unevictable_pages? > > Yes, I think so. Thanks for you review.

Re: [Intel-gfx] [PATCH v3 09/10] drm/i915: Keep PSR disabled after a driver reload after a PSR error

2018-11-05 Thread Souza, Jose
On Wed, 2018-10-31 at 16:45 -0700, Dhinakaran Pandiyan wrote: > On Thu, 2018-10-25 at 18:17 -0700, José Roberto de Souza wrote: > > If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR > > will still keep the error set even after the reset done in the > > irq_preinstall and irq_unins

[Intel-gfx] ✗ Fi.CI.BAT: failure for Forward Error Correction (rev6)

2018-11-05 Thread Patchwork
== Series Details == Series: Forward Error Correction (rev6) URL : https://patchwork.freedesktop.org/series/47848/ State : failure == Summary == Applying: i915/dp/fec: Add fec_enable to the crtc state. error: sha1 information is lacking or useless (drivers/gpu/drm/i915/intel_dp.c). error: coul

[Intel-gfx] [v6 4/4] drm/i915/fec: Disable FEC state.

2018-11-05 Thread Anusha Srivatsa
Set the suitable bits in DP_TP_CTL to stop bit correction when DSC is disabled. v2: - rebased. - Add additional check for compression state. (Gaurav) v3: rebased. v4: - Move the code to the proper spot according to spec (Ville) - Use proper checks (manasi) v5: Remove unnecessary checks (Ville)

[Intel-gfx] [v6 2/4] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION

2018-11-05 Thread Anusha Srivatsa
If the panel supports FEC, the driver has to set the FEC_READY bit in the dpcd register: FEC_CONFIGURATION. This has to happen before link training. v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready - change commit message. (Gaurav) v3: rebased. (r-b Manasi) v4: Use fec crtc state, be

[Intel-gfx] [v6 3/4] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-05 Thread Anusha Srivatsa
If FEC is supported, the corresponding DP_TP_CTL register bits have to be configured. The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register and wait till FEC_STATUS in DP_TP_CTL[28] is 1. Also add the warn message to make sure that the control register is already active while enabling

[Intel-gfx] [v6 0/4] Forward Error Correction

2018-11-05 Thread Anusha Srivatsa
With Display Compression, the bit error in the pixel stream can turn into a significant corruption on the screen. The DP1.4 adds FEC - Forward Error Correction scheme which uses Reed-Solomon parity/correction check generated by the source and used by the sink to detect and correct small numbers of

[Intel-gfx] [v6 1/4] i915/dp/fec: Add fec_enable to the crtc state.

2018-11-05 Thread Anusha Srivatsa
For DP 1.4 and above, Display Stream compression can be enabled only if Forward Error Correctin can be performed. Add a crtc state for FEC. Currently, the state is determined by platform, DP and DSC being enabled. Moving forward we can use the state to have error correction on other scenarios too

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: HPD IRQ storm detection fixes (rev4)

2018-11-05 Thread Patchwork
== Series Details == Series: drm/i915: HPD IRQ storm detection fixes (rev4) URL : https://patchwork.freedesktop.org/series/51556/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Fix possible race in intel_dp_add_mst_connector() Okay! Commit:

[Intel-gfx] [PATCH v4 0/5] drm/i915: HPD IRQ storm detection fixes

2018-11-05 Thread Lyude Paul
This series contains a fix for a problem which is very difficult to reproduce under normal circumstances without specialized testing hardware, along with a fix that seems to be required for some especially rebellious GM45 laptops. Lyude Paul (5): drm/i915: Fix possible race in intel_dp_add_mst_c

[Intel-gfx] [PATCH v4 4/5] drm/i915: Clarify flow for disabling IRQs on storms

2018-11-05 Thread Lyude Paul
This is rather confusing to look at as-is: dev_priv->display.hpd_irq_setup(dev_priv); in intel_hpd_irq_handler() handles disabling the actual HPD IRQ, while intel_hpd_irq_storm_disable() handles moving the HPD pin state over from MARK_DISABLED to DISABLED along with enabling polling for it. Change

[Intel-gfx] [PATCH v4 1/5] drm/i915: Fix possible race in intel_dp_add_mst_connector()

2018-11-05 Thread Lyude Paul
This hasn't caused any issues yet that I'm aware of, but as Ville Syrjälä pointed out - we need to make sure that intel_connector->mst_port is set before initializing MST connectors, since in theory we could potentially check intel_connector->mst_port in i915_hpd_poll_init_work() after registering

[Intel-gfx] [PATCH v4 5/5] drm/i915: Add short HPD IRQ storm detection for non-MST systems

2018-11-05 Thread Lyude Paul
Unfortunately, it seems that the HPD IRQ storm problem from the early days of Intel GPUs was never entirely solved, only mostly. Within the last couple of days, I got a bug report from one of our customers who had been having issues with their machine suddenly booting up very slowly after having up

[Intel-gfx] [PATCH v4 2/5] drm/i915: Fix NULL deref when re-enabling HPD IRQs on systems with MST

2018-11-05 Thread Lyude Paul
Turns out that if you trigger an HPD storm on a system that has an MST topology connected to it, you'll end up causing the kernel to eventually hit a NULL deref: [ 332.339041] BUG: unable to handle kernel NULL pointer dereference at 00ec [ 332.340906] PGD 0 P4D 0 [ 332.342750] Oops

[Intel-gfx] [PATCH v4 3/5] drm/i915: Fix threshold check in intel_hpd_irq_storm_detect()

2018-11-05 Thread Lyude Paul
Currently in intel_hpd_irq_storm_detect() when we detect that the last recorded hotplug wasn't within the period defined by HPD_STORM_DETECT_DELAY, we make the mistake of resetting the HPD count to 0 without incrementing it. This results in us only enabling storm detection when we go +2 above the t

Re: [Intel-gfx] [PATCH v3 4/5] drm/i915: Clarify flow for disabling IRQs on storms

2018-11-05 Thread Rodrigo Vivi
On Fri, Nov 02, 2018 at 08:19:07PM -0400, Lyude Paul wrote: > This is rather confusing to look at as-is: > dev_priv->display.hpd_irq_setup(dev_priv); in intel_hpd_irq_handler() > handles disabling the actual HPD IRQ, while > intel_hpd_irq_storm_disable() handles moving the HPD pin state over from >

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/mst: Drop pre_pll_enable null check

2018-11-05 Thread Rodrigo Vivi
On Mon, Nov 05, 2018 at 12:25:52PM -0800, José Roberto de Souza wrote: > MST is only supported in DDI ports that have this hook, so the null > check can be dropped. > > Suggested-by: Imre Deak > Cc: Imre Deak > Signed-off-by: José Roberto de Souza I feel that the extra check doesn't hurt since

Re: [Intel-gfx] X freezes for a second or every now and then when lid closed

2018-11-05 Thread Rodrigo Vivi
On Sun, Nov 04, 2018 at 09:51:44PM -0800, Joel Fernandes wrote: > i915 DRM maintainers, could you take a look at the below issue? It causes an > annoying Xorg hang every 30 seconds when my laptop lid is closed with > external monitors connected. This is a thinkpad laptop. I am not sure how to > get

[Intel-gfx] [PATCH v2 1/3] drm/i915: Reuse the aux_domain cached

2018-11-05 Thread José Roberto de Souza
intel_dp_detect() caches the aux_domain in the beginning of the function as it is used twice, so lets also use it as the aux_domain don't change in runtime by jumping to the end of function when retrain the link fails. v2: jumping to the end of the function instead of just reuse aux_domain Cc: Im

[Intel-gfx] [PATCH v2 3/3] drm/i915/mst: Drop pre_pll_enable null check

2018-11-05 Thread José Roberto de Souza
MST is only supported in DDI ports that have this hook, so the null check can be dropped. Suggested-by: Imre Deak Cc: Imre Deak Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_dp_mst.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i91

[Intel-gfx] [PATCH v2 2/3] drm/i915: Release DDI power well references in MST ports

2018-11-05 Thread José Roberto de Souza
MST ports did not had the post_pll_disable() hook causing the references get in pre_pll_enable() never being released causing DDI and AUX CH being enabled all the times. v2: renamed intel_mst_post_pll_disable_dp() parameters Reviewed-by: Ville Syrjälä Reviewed-by: Imre Deak Cc: Imre Deak Cc: M

Re: [Intel-gfx] [PATCH] drm/i915: Don't oops during modeset shutdown after lpe audio deinit

2018-11-05 Thread Chris Wilson
Quoting Ville Syrjala (2018-11-05 19:46:04) > From: Ville Syrjälä > > We deinit the lpe audio device before we call > drm_atomic_helper_shutdown(), which means the platform device > may already be gone when it comes time to shut down the crtc. Doesn't this mean that we fail to notify the audio c

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix ilk+ watermarks when disabling pipes

2018-11-05 Thread Ville Syrjälä
On Fri, Oct 26, 2018 at 08:05:04PM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: Fix ilk+ watermarks when disabling pipes > URL : https://patchwork.freedesktop.org/series/51518/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_5042_full -> Patch

[Intel-gfx] [PATCH] drm/i915: Don't oops during modeset shutdown after lpe audio deinit

2018-11-05 Thread Ville Syrjala
From: Ville Syrjälä We deinit the lpe audio device before we call drm_atomic_helper_shutdown(), which means the platform device may already be gone when it comes time to shut down the crtc. As we don't know when the last reference to the platform device gets dropped by the audio driver we can't a

Re: [Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Dave Hansen
On 11/5/18 3:13 AM, Kuo-Hsin Yang wrote: > -These are currently used in two places in the kernel: > +These are currently used in three places in the kernel: > > (1) By ramfs to mark the address spaces of its inodes when they are created, > and this mark remains for the life of the inode.

Re: [Intel-gfx] [RFC v5 1/8] drm: Add Enhanced Gamma LUT precision structure

2018-11-05 Thread Matt Roper
On Sun, Sep 16, 2018 at 01:45:24PM +0530, Uma Shankar wrote: > Existing LUT precision structure is having only 16 bit > precision. This is not enough for upcoming enhanced hardwares > and advance usecases like HDR processing. Hence added a new > structure with 32 bit precision values. Also added th

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Break long iterations for get/put shmemfs pages

2018-11-05 Thread Patchwork
== Series Details == Series: drm/i915: Break long iterations for get/put shmemfs pages URL : https://patchwork.freedesktop.org/series/52036/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5088 -> Patchwork_10727 = == Summary - FAILURE == Serious unknown changes coming wit

[Intel-gfx] [PATCH] drm/i915: Break long iterations for get/put shmemfs pages

2018-11-05 Thread Chris Wilson
As we may have to iterate a few thousand elements to acquire and release the shmemfs backing storage for a GPU object, we need to break up the long loop with cond_resched() to retain a modicum of low latency for other processes. Testcase: igt/benchmarks/gem_syslatency Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH 04/25] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start

2018-11-05 Thread Tvrtko Ursulin
On 02/11/2018 16:12, Chris Wilson wrote: Since commit 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu notifiers") we have been able to report failure from mmu_invalidate_range_start which allows us to use a trylock on the struct_mutex to avoid potential recursion and report -EBUSY ins

Re: [Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Michal Hocko
On Mon 05-11-18 22:33:13, Kuo-Hsin Yang wrote: > On Mon, Nov 5, 2018 at 9:02 PM Michal Hocko wrote: > > > > On Mon 05-11-18 19:13:48, Kuo-Hsin Yang wrote: [...] > > > + * @pvec: pagevec with pages to check > > > * > > > - * Checks pages for evictability and moves them to the appropriate lru > >

Re: [Intel-gfx] [PATCH 2/3] drm/i915/icl: Enable 2nd DBuf slice only when needed

2018-11-05 Thread Imre Deak
On Thu, Apr 26, 2018 at 07:55:16PM +0530, Mahesh Kumar wrote: > ICL has two slices of DBuf, each slice of size 1024 blocks. > We should not always enable slice-2. It should be enabled only if > display total required BW is > 12GBps OR more than 1 pipes are enabled. > > Changes since V1: > - typec

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define

2018-11-05 Thread Patchwork
== Series Details == Series: series starting with [v4,1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define URL : https://patchwork.freedesktop.org/series/52027/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5085_full -> Patchwork_10725_full = == Summary -

Re: [Intel-gfx] [PATCH] drm/vgem: Fix typo in driver feature flags

2018-11-05 Thread Emil Velikov
On Mon, 5 Nov 2018 at 14:54, Imre Deak wrote: > > Fix typo in struct field initializer. > > Fixes: 3a6eb795641c ("drm/vgem: create a render node for vgem") > Cc: Emil Velikov > Cc: David Airlie > Cc: Daniel Vetter > Cc: dri-de...@lists.freedesktop.org > Signed-off-by: Imre Deak Reviewed-by: E

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen9_lp: Fix DMC DC counter debugfs output

2018-11-05 Thread Imre Deak
On Thu, Nov 01, 2018 at 05:33:41AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/gen9_lp: Fix DMC DC counter debugfs output > URL : https://patchwork.freedesktop.org/series/51837/ > State : success Thanks for the review, pushed to -dinq with the warn for missing case added

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/vgem: Fix typo in driver feature flags

2018-11-05 Thread Patchwork
== Series Details == Series: drm/vgem: Fix typo in driver feature flags URL : https://patchwork.freedesktop.org/series/52029/ State : failure == Summary == Applying: drm/vgem: Fix typo in driver feature flags Using index info to reconstruct a base tree... M drivers/gpu/drm/vgem/vgem_drv.

[Intel-gfx] [PATCH] drm/vgem: Fix typo in driver feature flags

2018-11-05 Thread Imre Deak
Fix typo in struct field initializer. Fixes: 3a6eb795641c ("drm/vgem: create a render node for vgem") Cc: Emil Velikov Cc: David Airlie Cc: Daniel Vetter Cc: dri-de...@lists.freedesktop.org Signed-off-by: Imre Deak --- drivers/gpu/drm/vgem/vgem_drv.c | 2 +- 1 file changed, 1 insertion(+), 1

Re: [Intel-gfx] [PATCH 1/3] drm/atomic: Use explicit old crtc state in drm_atomic_add_affected_planes()

2018-11-05 Thread Ville Syrjälä
On Mon, Nov 05, 2018 at 02:30:50PM +, Wentland, Harry wrote: > > > On 2018-11-05 9:04 a.m., Ville Syrjälä wrote: > > On Mon, Nov 05, 2018 at 10:26:01AM +0100, Daniel Vetter wrote: > >> On Thu, Nov 01, 2018 at 08:46:44PM +0200, Ville Syrjala wrote: > >>> From: Ville Syrjälä > >>> > >>> Replac

Re: [Intel-gfx] [PATCH 3/3] drm/atomic: Use explicit old/new state in drm_atomic_plane_check()

2018-11-05 Thread Ville Syrjälä
On Mon, Nov 05, 2018 at 10:33:47AM +0100, Daniel Vetter wrote: > On Thu, Nov 01, 2018 at 08:46:46PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Convert drm_atomic_plane_check() over to using explicit old vs. new > > plane states. Avoids the confusion of "what does plane->state mea

Re: [Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Kuo-Hsin Yang
On Mon, Nov 5, 2018 at 9:02 PM Michal Hocko wrote: > > On Mon 05-11-18 19:13:48, Kuo-Hsin Yang wrote: > > The i915 driver uses shmemfs to allocate backing storage for gem > > objects. These shmemfs pages can be pinned (increased ref count) by > > shmem_read_mapping_page_gfp(). When a lot of pages

Re: [Intel-gfx] [PATCH 1/3] drm/atomic: Use explicit old crtc state in drm_atomic_add_affected_planes()

2018-11-05 Thread Wentland, Harry
On 2018-11-05 9:04 a.m., Ville Syrjälä wrote: > On Mon, Nov 05, 2018 at 10:26:01AM +0100, Daniel Vetter wrote: >> On Thu, Nov 01, 2018 at 08:46:44PM +0200, Ville Syrjala wrote: >>> From: Ville Syrjälä >>> >>> Replace 'crtc->state' with the explicit old crtc state. >>> >>> Actually it shouldn't m

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define

2018-11-05 Thread Patchwork
== Series Details == Series: series starting with [v4,1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define URL : https://patchwork.freedesktop.org/series/52027/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5085 -> Patchwork_10725 = == Summary - WARNING ==

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/icl: Fix suspend/resume for TypeC HDMI

2018-11-05 Thread Martin Peres
On 05/11/2018 15:42, Imre Deak wrote: > On Sat, Nov 03, 2018 at 12:45:01AM +, Patchwork wrote: >> == Series Details == >> >> Series: drm/i915/icl: Fix suspend/resume for TypeC HDMI >> URL : https://patchwork.freedesktop.org/series/51976/ >> State : failure > > The failures are unrelated si

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Fix suspend/resume for TypeC HDMI

2018-11-05 Thread Patchwork
== Series Details == Series: drm/i915/icl: Fix suspend/resume for TypeC HDMI URL : https://patchwork.freedesktop.org/series/51976/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5081_full -> Patchwork_10716_full = == Summary - WARNING == Minor unknown changes coming with

Re: [Intel-gfx] [PATCH 1/3] drm/atomic: Use explicit old crtc state in drm_atomic_add_affected_planes()

2018-11-05 Thread Ville Syrjälä
On Mon, Nov 05, 2018 at 10:26:01AM +0100, Daniel Vetter wrote: > On Thu, Nov 01, 2018 at 08:46:44PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Replace 'crtc->state' with the explicit old crtc state. > > > > Actually it shouldn't matter whether we use the old or the new > > crtc

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/icl: Fix suspend/resume for TypeC HDMI

2018-11-05 Thread Imre Deak
On Mon, Nov 05, 2018 at 03:42:07PM +0200, Imre Deak wrote: > On Sat, Nov 03, 2018 at 12:45:01AM +, Patchwork wrote: > > == Series Details == > > > > Series: drm/i915/icl: Fix suspend/resume for TypeC HDMI > > URL : https://patchwork.freedesktop.org/series/51976/ > > State : failure > > The

[Intel-gfx] ✗ Fi.CI.IGT: failure for mm, drm/i915: Mark pinned shmemfs pages as unevictable (rev3)

2018-11-05 Thread Patchwork
== Series Details == Series: mm, drm/i915: Mark pinned shmemfs pages as unevictable (rev3) URL : https://patchwork.freedesktop.org/series/25337/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5085_full -> Patchwork_10724_full = == Summary - FAILURE == Serious unknown chan

[Intel-gfx] [PATCH v4 2/2] drm/i915/icl: Define MOCS table for Icelake

2018-11-05 Thread Tomasz Lis
The table has been unified across OSes to minimize virtualization overhead. The MOCS table is now published as part of bspec, and versioned. Entries are supposed to never be modified, but new ones can be added. Adding entries increases table version. The patch includes version 1 entries. Meaning

[Intel-gfx] [PATCH v4 1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define

2018-11-05 Thread Tomasz Lis
The MOCS tables are going to be very similar across platforms. To reduce the amount of copied code, this patch rips the common part and puts it into a definition valid for all gen9 platforms. Signed-off-by: Tomasz Lis Suggested-by: Lucas De Marchi Reviewed-by: Lucas De Marchi Cc: Joonas Lahtin

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/icl: Fix suspend/resume for TypeC HDMI

2018-11-05 Thread Imre Deak
On Sat, Nov 03, 2018 at 12:45:01AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/icl: Fix suspend/resume for TypeC HDMI > URL : https://patchwork.freedesktop.org/series/51976/ > State : failure The failures are unrelated since all those platforms are without a TypeC port a

Re: [Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Michal Hocko
On Mon 05-11-18 14:02:09, Michal Hocko wrote: > On Mon 05-11-18 19:13:48, Kuo-Hsin Yang wrote: > > The i915 driver uses shmemfs to allocate backing storage for gem > > objects. These shmemfs pages can be pinned (increased ref count) by > > shmem_read_mapping_page_gfp(). When a lot of pages are pinn

Re: [Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Michal Hocko
On Mon 05-11-18 19:13:48, Kuo-Hsin Yang wrote: > The i915 driver uses shmemfs to allocate backing storage for gem > objects. These shmemfs pages can be pinned (increased ref count) by > shmem_read_mapping_page_gfp(). When a lot of pages are pinned, vmscan > wastes a lot of time scanning these pinne

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/lease: debug output for lease creation (rev3)

2018-11-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/lease: debug output for lease creation (rev3) URL : https://patchwork.freedesktop.org/series/51944/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5085_full -> Patchwork_10723_full = == Summary - FAILURE == Seri

[Intel-gfx] ✓ Fi.CI.BAT: success for mm, drm/i915: Mark pinned shmemfs pages as unevictable (rev3)

2018-11-05 Thread Patchwork
== Series Details == Series: mm, drm/i915: Mark pinned shmemfs pages as unevictable (rev3) URL : https://patchwork.freedesktop.org/series/25337/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5085 -> Patchwork_10724 = == Summary - SUCCESS == No regressions found. Exter

Re: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling

2018-11-05 Thread Kulkarni, Vandita
> -Original Message- > From: Chauhan, Madhav > Sent: Monday, November 5, 2018 3:46 PM > To: Kulkarni, Vandita ; Nikula, Jani > ; intel-gfx@lists.freedesktop.org > Cc: Ville Syrjälä > Subject: RE: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling > > > -Original Message- >

Re: [Intel-gfx] [PATCH 01/25] RFT drm/i915/execlists: Flush memory before signaling ELSQ

2018-11-05 Thread Mika Kuoppala
Chris Wilson writes: > We observe that the ordering of writes for a CS event is not as strong > from the GPU as we would like, and that on occasions we see the > ringbuffer tail updated before the event is written into the ringbuffer, > leading us to reuse the stale data. > > Through around a big

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for mm, drm/i915: Mark pinned shmemfs pages as unevictable (rev3)

2018-11-05 Thread Patchwork
== Series Details == Series: mm, drm/i915: Mark pinned shmemfs pages as unevictable (rev3) URL : https://patchwork.freedesktop.org/series/25337/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6cf86e3e77fd mm, drm/i915: mark pinned shmemfs pages as unevictable -:148: CHECK:AVOID_

Re: [Intel-gfx] [PATCH v3] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Kuo-Hsin Yang
On Fri, Nov 2, 2018 at 10:05 PM Dave Hansen wrote: > On 11/2/18 6:22 AM, Vovo Yang wrote: > > Chris helped to answer this question: > > Though it includes a few non-shmemfs objects, see > > debugfs/dri/0/i915_gem_objects and the "bound objects". > > > > Example i915_gem_object output: > > 591 ob

[Intel-gfx] [PATCH v4] mm, drm/i915: mark pinned shmemfs pages as unevictable

2018-11-05 Thread Kuo-Hsin Yang
The i915 driver uses shmemfs to allocate backing storage for gem objects. These shmemfs pages can be pinned (increased ref count) by shmem_read_mapping_page_gfp(). When a lot of pages are pinned, vmscan wastes a lot of time scanning these pinned pages. In some extreme case, all pages in the inactiv

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5

2018-11-05 Thread Patchwork
== Series Details == Series: drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5 URL : https://patchwork.freedesktop.org/series/52013/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5085_full -> Patchwork_10722_full = == Summary - WARNING == Minor unknown chang

Re: [Intel-gfx] [PATCH 5/5] drm/i915/icl: Fix port B combo PHY context loss after DC transitions

2018-11-05 Thread Imre Deak
On Fri, Nov 02, 2018 at 12:22:15PM -0700, Rodrigo Vivi wrote: > On Fri, Nov 02, 2018 at 08:07:06PM +0200, Imre Deak wrote: > > On ICL DMC/PCODE retains the HW context only for port A across DC > > transitions, for the other port B combo PHY, it doesn't. So we need to > > do this manually after exit

Re: [Intel-gfx] [PATCH 3/4] drm/i915/icl: Only grab TC ports when using it

2018-11-05 Thread Imre Deak
On Sat, Nov 03, 2018 at 01:41:12AM +0200, Souza, Jose wrote: > On Sat, 2018-11-03 at 01:06 +0200, Imre Deak wrote: > > On Fri, Nov 02, 2018 at 01:39:23PM -0700, José Roberto de Souza > > wrote: > > > When suspending or unloading the driver, it needs to release the > > > TC ports so HW can change it

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/lease: debug output for lease creation (rev3)

2018-11-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/lease: debug output for lease creation (rev3) URL : https://patchwork.freedesktop.org/series/51944/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5085 -> Patchwork_10723 = == Summary - SUCCESS == No regressions

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Release DDI power well references in MST ports

2018-11-05 Thread Imre Deak
On Fri, Nov 02, 2018 at 01:39:22PM -0700, José Roberto de Souza wrote: > MST ports did not had the post_pll_disable() hook causing the > references get in pre_pll_enable() never being released causing > DDI and AUX CH being enabled all the times. > > Cc: Imre Deak > Cc: Manasi Navare > Signed-of

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/lease: debug output for lease creation (rev3)

2018-11-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/lease: debug output for lease creation (rev3) URL : https://patchwork.freedesktop.org/series/51944/ State : warning == Summary == $ dim checkpatch origin/drm-tip 97b0f495d8f2 drm/lease: debug output for lease creation b91deb02ca70 dr

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5

2018-11-05 Thread Patchwork
== Series Details == Series: drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5 URL : https://patchwork.freedesktop.org/series/52013/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5085 -> Patchwork_10722 = == Summary - WARNING == Minor unknown changes coming

Re: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling

2018-11-05 Thread Chauhan, Madhav
> -Original Message- > From: Kulkarni, Vandita > Sent: Monday, November 5, 2018 3:26 PM > To: Chauhan, Madhav ; Nikula, Jani > ; intel-gfx@lists.freedesktop.org > Cc: Ville Syrjälä > Subject: RE: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling > > > > > -Original Message---

[Intel-gfx] [PATCH] drm/lease: look at ->universal_planes only once

2018-11-05 Thread Daniel Vetter
It's lockless, and userspace might chance it underneath us. That's not really a problem, all userspace gets is a slightly dysfunctional lease with the current code. But this might change, and gcc might decide to reload a few too many times, and then boom. So better safe than sorry. v2: Remove the

Re: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling

2018-11-05 Thread Kulkarni, Vandita
> -Original Message- > From: Chauhan, Madhav > Sent: Monday, November 5, 2018 3:03 PM > To: Kulkarni, Vandita ; Nikula, Jani > ; intel-gfx@lists.freedesktop.org > Cc: Ville Syrjälä > Subject: RE: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling > > > -Original Message- >

Re: [Intel-gfx] [v2 1/2] drm: Add colorspace property

2018-11-05 Thread Hans Verkuil
On 11/02/2018 03:29 PM, Jonas Karlman wrote: On 2018-11-02 15:13, Shankar, Uma wrote: -Original Message- From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] Sent: Friday, November 2, 2018 5:00 PM To: Maarten Lankhorst Cc: Shankar, Uma ; dri-de...@lists.freedesktop.org; intel-gf

[Intel-gfx] [PATCH] drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5

2018-11-05 Thread Chris Wilson
Exercising the gpu reloc path strenuously revealed an issue where the updated relocations (from MI_STORE_DWORD_IMM) were not being observed upon execution. After some experiments with adding pipecontrols (a lot of pipecontrols (32) as gen4/5 do not have a bit to wait on earlier pipe controls or eve

Re: [Intel-gfx] [PATCH 3/3] drm/atomic: Use explicit old/new state in drm_atomic_plane_check()

2018-11-05 Thread Daniel Vetter
On Thu, Nov 01, 2018 at 08:46:46PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Convert drm_atomic_plane_check() over to using explicit old vs. new > plane states. Avoids the confusion of "what does plane->state mean > again?". > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/

Re: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling

2018-11-05 Thread Chauhan, Madhav
> -Original Message- > From: Kulkarni, Vandita > Sent: Monday, November 5, 2018 11:17 AM > To: Nikula, Jani ; Chauhan, Madhav > ; intel-gfx@lists.freedesktop.org > Cc: Ville Syrjälä > Subject: RE: [Intel-gfx] [PATCH v10 00/15] drm/i915/icl: dsi enabling > > > > > -Original Message--

Re: [Intel-gfx] [PATCH 2/3] drm/atomic: Use explicit old/new state in drm_atomic_crtc_check()

2018-11-05 Thread Daniel Vetter
On Thu, Nov 01, 2018 at 08:46:45PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Convert drm_atomic_crtc_check() over to using explicit old vs. new > crtc states. Avoids the confusion of "what does crtc->state mean > again?". Yeah much better. > > Signed-off-by: Ville Syrjälä Reviewe

Re: [Intel-gfx] [PATCH 1/3] drm/atomic: Use explicit old crtc state in drm_atomic_add_affected_planes()

2018-11-05 Thread Daniel Vetter
On Thu, Nov 01, 2018 at 08:46:44PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Replace 'crtc->state' with the explicit old crtc state. > > Actually it shouldn't matter whether we use the old or the new > crtc state here since any plane that has been removed from the > crtc since the cr