On Wed, Jun 20, 2018 at 02:36:05PM -0700, Anusha Srivatsa wrote:
> From: Paulo Zanoni
>
> Do like the other functions and check for the ISR bits. We have plans
> to add a few more checks in this code in the next patches, that's why
> it's a little more verbose than it could be.
>
> v2:
> - Chang
== Series Details ==
Series: series starting with [1/6] drm/i915: Refactor export_fence() after
i915_vma_move_to_active()
URL : https://patchwork.freedesktop.org/series/45689/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4409_full -> Patchwork_9489_full =
== Summary - WAR
== Series Details ==
Series: drm/i915: Track vma activity per fence.context, not per engine (rev2)
URL : https://patchwork.freedesktop.org/series/45480/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4408_full -> Patchwork_9487_full =
== Summary - WARNING ==
Minor unknown
== Series Details ==
Series: series starting with [1/6] drm/i915: Refactor export_fence() after
i915_vma_move_to_active()
URL : https://patchwork.freedesktop.org/series/45689/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4409 -> Patchwork_9489 =
== Summary - SUCCESS ==
== Series Details ==
Series: series starting with [1/6] drm/i915: Refactor export_fence() after
i915_vma_move_to_active()
URL : https://patchwork.freedesktop.org/series/45689/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Refactor export_fence() after i915_vma_mo
On Wed, 2018-06-27 at 13:02 -0700, Tarun Vyas wrote:
> The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, then
> the pipe_update_start call schedules itself out to check back later.
>
> On ChromeOS-4.4 kernel, which is fairly up-to-date w.r.t drm/i915 but
> lags w.r.t core kernel cod
i915_vma_move_to_active() has grown beyond its execbuf origins, and
should take its rightful place in i915_vma.c as a method for i915_vma!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h| 3 --
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 61 --
d
In the next patch, we will want to be able to use more flexible request
timelines that can hop between engines. From the vma pov, we can then
not rely on the binding of this request to an engine and so can not
ensure that different requests are ordered through a per-engine
timeline, and so we must
Currently all callers are responsible for adding the vma to the active
timeline and then exporting its fence. Combine the two operations into
i915_vma_move_to_active() to move all the extra handling from the
callers to the single site.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_ge
Using a VMA on more than one timeline concurrently is the exception
rather than the rule (using it concurrently on multiple engines). As we
expect to only use one active tracker, store the most recently used
tracker inside the i915_vma itself and only fallback to the radixtree if
we need a second o
Handling such a late error in request construction is tricky, but to
accommodate future patches which may allocate here, we potentially could
err. To handle the error after already adjusting global state to track
the new request, we must finish and submit the request. But we don't
want to use the r
In the next patch, we will want to start skipping requests on failing to
complete their payloads. So export the utility function current used to
make requests inoperable following a failed gpu reset.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 25 +++
== Series Details ==
Series: drm/i915: Track vma activity per fence.context, not per engine (rev2)
URL : https://patchwork.freedesktop.org/series/45480/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4408 -> Patchwork_9487 =
== Summary - SUCCESS ==
No regressions found.
== Series Details ==
Series: series starting with [01/37] drm/i915/gtt: Add read only pages to
gen8_pte_encode (rev3)
URL : https://patchwork.freedesktop.org/series/45638/
State : failure
== Summary ==
Applying: drm/i915/gtt: Add read only pages to gen8_pte_encode
Applying: drm/i915/gtt: Read
Quoting Michał Winiarski (2018-06-18 13:32:47)
> On Mon, Jun 18, 2018 at 11:18:20AM +, Michal Wajdeczko wrote:
> > While debugging we may want to examine params passed to GuC.
> >
> > v2: drop #ifdef DEBUG_GUC - Michal
> >
> > Signed-off-by: Michal Wajdeczko
> > Cc: Daniele Ceraolo Spurio
>
== Series Details ==
Series: drm/i915: Track vma activity per fence.context, not per engine (rev2)
URL : https://patchwork.freedesktop.org/series/45480/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
26c316980c64 horror
-:17: ERROR:TRAILING_WHITESPACE: trailing whitespace
#17: F
In the next patch, we will want to be able to use more flexible request
timelines that can hop between engines. From the vma pov, we can then
not rely on the binding of this request to an engine and so can not
ensure that different requests are ordered through a per-engine
timeline, and so we must
In the next patch, we will want to be able to use more flexible request
timelines that can hop between engines. From the vma pov, we can then
not rely on the binding of this request to an engine and so can not
ensure that different requests are ordered through a per-engine
timeline, and so we must
Using a VMA on more than one timeline concurrently is the exception
rather than the rule (using it concurrently on multiple engines). As we
expect to only use one active tracker, store the most recently used
tracker inside the i915_vma itself and only fallback to the radixtree if
we need a second o
---
drivers/gpu/drm/i915/i915_drv.c | 8
drivers/gpu/drm/i915/i915_drv.h | 12
drivers/gpu/drm/i915/i915_request.c | 7 +--
3 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5b
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/icl: Add remaining registers and
bitfields for MG PHY DDI (rev2)
URL : https://patchwork.freedesktop.org/series/45623/
State : failure
== Summary ==
Applying: drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI
From: Intel-gfx [intel-gfx-boun...@lists.freedesktop.org] on behalf of Manasi
Navare [manasi.d.nav...@intel.com]
Sent: Thursday, June 28, 2018 3:35 PM
To: intel-gfx@lists.freedesktop.org
Cc: Zanoni, Paulo R
Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915/icl:
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Shaikh, Azhar
>Sent: Friday, June 29, 2018 10:45 AM
>To: Ville Syrjälä
>Cc: intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH v5] drm/i915: Fix assert_plane() warning on
>bo
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Friday, June 29, 2018 5:07 AM
>To: Shaikh, Azhar
>Cc: intel-gfx@lists.freedesktop.org; Navare, Manasi D
>
>Subject: Re: [PATCH v5] drm/i915: Fix assert_plane() warning on bootup with
>external display
The i915 DRM driver very cleverly used ascii85 encoding for their
GPU state file. Move the encode functions to a general header file to
support other drivers that might be interested in the same
functionality.
v3: Fix error_puts -> err_puts pointed out by the 01.org bot
v2: Update API to be cleane
On 2018-06-11 18:37, Daniele Ceraolo Spurio wrote:
On 25/05/18 11:26, Tomasz Lis wrote:
The patch adds support of preempt-to-idle requesting by setting a proper
bit within Execlist Control Register, and receiving preemption result
from
Context Status Buffer.
Preemption in previous gens re
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Mark up write into
scratch vma
URL : https://patchwork.freedesktop.org/series/45663/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4404_full -> Patchwork_9485_full =
== Summary - FAILURE ==
Seri
On Fri, 2018-06-29 at 14:51 +0300, Ville Syrjälä wrote:
> On Fri, Jun 29, 2018 at 01:32:58PM +0200, Hans de Goede wrote:
I saw that the change was discarded but I would comment about the GPIO
ACPI mapping tables.
> > + devm_acpi_dev_add_driver_gpios(dev->dev,
> > panel_gpios);
>
> Some
On 29/06/2018 16:22, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-06-29 16:15:04)
On 28/06/2018 22:35, Chris Wilson wrote:
The goal of gem_exec_gttfill is to exercise execbuf under heavy GTT
pressure (by trying to execute more objects than may fit into the GTT).
We spread the same set of
== Series Details ==
Series: drm/i915/intel_dsi: Add acpi_gpio_mapping for the panel-enable GPIO
URL : https://patchwork.freedesktop.org/series/45658/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4404_full -> Patchwork_9484_full =
== Summary - WARNING ==
Minor unknown c
Quoting Chris Wilson (2018-06-29 16:36:22)
> Quoting Tvrtko Ursulin (2018-06-29 16:08:40)
> >
> > On 29/06/2018 15:54, Tvrtko Ursulin wrote:
> >
> > [snip]
> >
> > >> +int i915_vma_move_to_active(struct i915_vma *vma,
> > >> + struct i915_request *rq,
> > >> + unsig
Quoting Tvrtko Ursulin (2018-06-29 16:08:40)
>
> On 29/06/2018 15:54, Tvrtko Ursulin wrote:
>
> [snip]
>
> >> +int i915_vma_move_to_active(struct i915_vma *vma,
> >> + struct i915_request *rq,
> >> + unsigned int flags)
> >> +{
> >> + struct drm_i915_gem_object *
Quoting Chris Wilson (2018-06-29 16:03:31)
> Quoting Tvrtko Ursulin (2018-06-29 15:54:02)
> >
> > On 29/06/2018 08:53, Chris Wilson wrote:
> > > In the next patch, we will want to be able to use more flexible request
> > > timelines that can hop between engines. From the vma pov, we can then
> > >
Quoting Tvrtko Ursulin (2018-06-29 16:15:04)
>
> On 28/06/2018 22:35, Chris Wilson wrote:
> > The goal of gem_exec_gttfill is to exercise execbuf under heavy GTT
> > pressure (by trying to execute more objects than may fit into the GTT).
> > We spread the same set of handles across different proce
On 28/06/2018 22:35, Chris Wilson wrote:
The goal of gem_exec_gttfill is to exercise execbuf under heavy GTT
pressure (by trying to execute more objects than may fit into the GTT).
We spread the same set of handles across different processes, with the
result that each would occasionally stall wa
On 29/06/2018 15:54, Tvrtko Ursulin wrote:
[snip]
+int i915_vma_move_to_active(struct i915_vma *vma,
+ struct i915_request *rq,
+ unsigned int flags)
+{
+ struct drm_i915_gem_object *obj = vma->obj;
+ struct i915_gem_active *active;
+
+ lockdep_assert_hel
Quoting Tvrtko Ursulin (2018-06-29 15:54:02)
>
> On 29/06/2018 08:53, Chris Wilson wrote:
> > In the next patch, we will want to be able to use more flexible request
> > timelines that can hop between engines. From the vma pov, we can then
> > not rely on the binding of this request to an engine a
On 29/06/2018 08:53, Chris Wilson wrote:
In the next patch, we will want to be able to use more flexible request
timelines that can hop between engines. From the vma pov, we can then
not rely on the binding of this request to an engine and so can not
ensure that different requests are ordered th
On Fri, Jun 29, 2018 at 01:20:39PM +0300, Jani Nikula wrote:
> Try to describe what the pick variants do, and which to prefer. No
> functional changes.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
>
> ---
>
> Let the naming bikeshed fest begin!
> ---
> drivers/gpu/drm/i915/i915_
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Mark up write into
scratch vma
URL : https://patchwork.freedesktop.org/series/45663/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4404 -> Patchwork_9485 =
== Summary - SUCCESS ==
No regressions
Quoting Tvrtko Ursulin (2018-06-29 15:15:30)
>
> On 29/06/2018 14:37, Chris Wilson wrote:
> > make_obj_busy() makes a dummy busy object, but didn't attach the fence
> > to the reservation object, so it would not have registered as busy. For
> > completeness, attach the dummy request as the exclusi
On Fri, 29 Jun 2018, "Chauhan, Madhav" wrote:
>> -Original Message-
>> From: Nikula, Jani
>> Sent: Friday, June 29, 2018 5:22 PM
>> To: Chauhan, Madhav ; intel-
>> g...@lists.freedesktop.org
>> Cc: Zanoni, Paulo R ; Shankar, Uma
>> ; Vivi, Rodrigo ;
>> Chauhan, Madhav
>> Subject: Re: [PAT
On Fri, 29 Jun 2018, "Chauhan, Madhav" wrote:
>> -Original Message-
>> From: Nikula, Jani
>> Sent: Friday, June 29, 2018 5:13 PM
>> To: Chauhan, Madhav ; intel-
>> g...@lists.freedesktop.org
>> Cc: Zanoni, Paulo R ; Shankar, Uma
>> ; Vivi, Rodrigo ;
>> Chauhan, Madhav
>> Subject: Re: [PAT
On 29/06/2018 14:37, Chris Wilson wrote:
make_obj_busy() makes a dummy busy object, but didn't attach the fence
to the reservation object, so it would not have registered as busy. For
completeness, attach the dummy request as the exclusive fence and mark
the object as written (in i915_vma_move_t
== Series Details ==
Series: drm/i915/intel_dsi: Add acpi_gpio_mapping for the panel-enable GPIO
URL : https://patchwork.freedesktop.org/series/45658/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4404 -> Patchwork_9484 =
== Summary - SUCCESS ==
No regressions found.
On 29/06/2018 14:37, Chris Wilson wrote:
We correctly attach the exclusive fetch for the scratch object when
emitting a request that writes into it, but for completeness we should
also declared the write to i915_vma_move_to_active()
Reported-by: Tvrtko Ursulin
Signed-off-by: Chris Wilson
Cc:
== Series Details ==
Series: drm/i915: abstract and document register picking macros
URL : https://patchwork.freedesktop.org/series/45650/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4403_full -> Patchwork_9483_full =
== Summary - WARNING ==
Minor unknown changes comin
> -Original Message-
> From: Nikula, Jani
> Sent: Friday, June 29, 2018 5:22 PM
> To: Chauhan, Madhav ; intel-
> g...@lists.freedesktop.org
> Cc: Zanoni, Paulo R ; Shankar, Uma
> ; Vivi, Rodrigo ;
> Chauhan, Madhav
> Subject: Re: [PATCH 03/20] drm/i915/icl: Define DSI mode ctl register
>
On Fri, 15 Jun 2018, Madhav Chauhan wrote:
> To save power, unused lanes should be powered
> down using the bitfield of PORT_CL_DW10.
>
> Signed-off-by: Madhav Chauhan
> ---
> drivers/gpu/drm/i915/intel_dsi_new.c | 44
>
> 1 file changed, 44 insertions(+)
>
On Mon, 18 Jun 2018 18:25:21 +0200, Patchwork
wrote:
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/guc: Print CTL params
passed to Guc
URL : https://patchwork.freedesktop.org/series/44934/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4334_full
On Fri, 15 Jun 2018, Madhav Chauhan wrote:
> This register used to power down individual lanes for
> DDI/DSI ports. Bitfields to power up/down various
> combinations of lanes are also added in this patch.
>
> Signed-off-by: Madhav Chauhan
> ---
> drivers/gpu/drm/i915/i915_reg.h | 19
We correctly attach the exclusive fetch for the scratch object when
emitting a request that writes into it, but for completeness we should
also declared the write to i915_vma_move_to_active()
Reported-by: Tvrtko Ursulin
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/se
make_obj_busy() makes a dummy busy object, but didn't attach the fence
to the reservation object, so it would not have registered as busy. For
completeness, attach the dummy request as the exclusive fence and mark
the object as written (in i915_vma_move_to_active)
Signed-off-by: Chris Wilson
Cc:
> -Original Message-
> From: Nikula, Jani
> Sent: Friday, June 29, 2018 5:13 PM
> To: Chauhan, Madhav ; intel-
> g...@lists.freedesktop.org
> Cc: Zanoni, Paulo R ; Shankar, Uma
> ; Vivi, Rodrigo ;
> Chauhan, Madhav
> Subject: Re: [PATCH 01/20] drm/i915/icl: Define register for DSI PLL
>
>
== Series Details ==
Series: drm/i915/skl+: ddb allocation algorithm optimization (rev2)
URL : https://patchwork.freedesktop.org/series/43508/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4403_full -> Patchwork_9482_full =
== Summary - WARNING ==
Minor unknown changes c
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915/dsi: rename the current DSI
legacy
URL : https://patchwork.freedesktop.org/series/45643/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4403_full -> Patchwork_9481_full =
== Summary - SUCCESS ==
No regr
Hi,
On 29-06-18 14:10, Ville Syrjälä wrote:
On Fri, Jun 29, 2018 at 02:05:58PM +0200, Hans de Goede wrote:
Hi,
On 29-06-18 13:51, Ville Syrjälä wrote:
On Fri, Jun 29, 2018 at 01:32:58PM +0200, Hans de Goede wrote:
Add acpi_gpio_mapping for the panel-enable GPIO, this fixes the following
erro
On 29/06/2018 08:53, Chris Wilson wrote:
Handling such a late error in request construction is tricky, but to
accommodate future patches which may allocate here, we potentially could
err. To handle the error after already adjusting global state to track
the new request, we must finish and submit
Quoting Tvrtko Ursulin (2018-06-29 13:10:32)
>
> On 29/06/2018 08:53, Chris Wilson wrote:
> > In the next patch, we will want to start skipping requests on failing to
> > complete their payloads. So export the utility function current used to
> > make requests inoperable following a failed gpu res
On Fri, Jun 29, 2018 at 02:05:58PM +0200, Hans de Goede wrote:
> Hi,
>
> On 29-06-18 13:51, Ville Syrjälä wrote:
> > On Fri, Jun 29, 2018 at 01:32:58PM +0200, Hans de Goede wrote:
> >> Add acpi_gpio_mapping for the panel-enable GPIO, this fixes the following
> >> error: "Failed to own gpio for pan
On 29/06/2018 08:53, Chris Wilson wrote:
In the next patch, we will want to start skipping requests on failing to
complete their payloads. So export the utility function current used to
make requests inoperable following a failed gpu reset.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i91
On Wed, Jun 27, 2018 at 05:11:05PM -0700, Azhar Shaikh wrote:
> On KBL, WHL RVPs, booting up with an external display connected, triggers
> below warning, when the BiOS brings up the external display too.
> This warning is not seen during hotplug.
>
> [3.615226] [ cut here ]---
Hi,
On 29-06-18 13:51, Ville Syrjälä wrote:
On Fri, Jun 29, 2018 at 01:32:58PM +0200, Hans de Goede wrote:
Add acpi_gpio_mapping for the panel-enable GPIO, this fixes the following
error: "Failed to own gpio for panel control" on BYT/CHT devices where
pwm_blc == PPS_BLC_PMIC.
Note this patch i
On 29/06/2018 08:53, Chris Wilson wrote:
Currently all callers are responsible for adding the vma to the active
timeline and then exporting its fence. Combine the two operations into
i915_vma_move_to_active() to move all the extra handling from the
callers to the single site.
Signed-off-by: Chr
== Series Details ==
Series: series starting with [01/37] drm/i915/gtt: Add read only pages to
gen8_pte_encode
URL : https://patchwork.freedesktop.org/series/45638/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4403_full -> Patchwork_9480_full =
== Summary - FAILURE ==
On Fri, 15 Jun 2018, Madhav Chauhan wrote:
> This patch defines DSI IO mode control register and it's bits
> used while enabling IO power for DSI.
>
> Signed-off-by: Madhav Chauhan
> ---
> drivers/gpu/drm/i915/i915_reg.h | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gp
On Fri, Jun 29, 2018 at 01:32:58PM +0200, Hans de Goede wrote:
> Add acpi_gpio_mapping for the panel-enable GPIO, this fixes the following
> error: "Failed to own gpio for panel control" on BYT/CHT devices where
> pwm_blc == PPS_BLC_PMIC.
>
> Note this patch is untested as I don't have hardware to
On Fri, 15 Jun 2018, Madhav Chauhan wrote:
> This patch adds the new registers and corresponding bit definitions
> which will be used for programming/enable DSI PLL.
>
> Signed-off-by: Madhav Chauhan
> ---
> drivers/gpu/drm/i915/i915_reg.h | 12
> 1 file changed, 12 insertions(+)
>
Hi,
On 19-06-18 22:18, Hans de Goede wrote:
Hi All,
This patch-set is the result of the work I've been doing recently to
give people a smooth "flickerfree" boot experience where the display
keeps displaying the logo put there by the firmware until it smoothly
fades into the Linux GUI (e.g. gdm)
Add acpi_gpio_mapping for the panel-enable GPIO, this fixes the following
error: "Failed to own gpio for panel control" on BYT/CHT devices where
pwm_blc == PPS_BLC_PMIC.
Note this patch is untested as I don't have hardware to test this,
but it should fix things.
Signed-off-by: Hans de Goede
---
Add more Coffeelake PCI IDs based on the following kernel patch:
commit c99d7832dcd7423ba352386107118b9bd8b83158
Author: Rodrigo Vivi
Date: Wed Dec 20 10:29:19 2017 -0800
drm/i915/cfl: Adding more Coffee Lake PCI IDs.
Signed-off-by: Liwei Song
---
src/i915_pciids.h | 37 +++
On 29/06/2018 11:51, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-06-29 11:36:50)
On 29/06/2018 11:09, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-06-29 11:04:36)
On 29/06/2018 08:53, Chris Wilson wrote:
Taken from an idea used for FQ_CODEL, we give new request flows a
priority bo
== Series Details ==
Series: drm/i915: abstract and document register picking macros
URL : https://patchwork.freedesktop.org/series/45650/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4403 -> Patchwork_9483 =
== Summary - SUCCESS ==
No regressions found.
External URL
Quoting Tvrtko Ursulin (2018-06-29 11:36:50)
>
> On 29/06/2018 11:09, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-06-29 11:04:36)
> >>
> >> On 29/06/2018 08:53, Chris Wilson wrote:
> >>> Taken from an idea used for FQ_CODEL, we give new request flows a
> >>> priority boost. These flows ar
On 29/06/2018 11:15, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-06-29 11:08:48)
On 29/06/2018 08:53, Chris Wilson wrote:
In order to maximise concurrency between engines, if we queue a request
to a current idle ring, reorder its dependencies to execute that request
as early as possible
Quoting Tvrtko Ursulin (2018-06-29 11:36:50)
>
> On 29/06/2018 11:09, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-06-29 11:04:36)
> >>
> >> On 29/06/2018 08:53, Chris Wilson wrote:
> >>> Taken from an idea used for FQ_CODEL, we give new request flows a
> >>> priority boost. These flows ar
On 29/06/2018 11:09, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-06-29 11:04:36)
On 29/06/2018 08:53, Chris Wilson wrote:
Taken from an idea used for FQ_CODEL, we give new request flows a
priority boost. These flows are likely to correspond with interactive
tasks and so be more latency s
== Series Details ==
Series: drm/i915: abstract and document register picking macros
URL : https://patchwork.freedesktop.org/series/45650/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
bce4e19e7c4d drm/i915: abstract and document register picking macros
-:25: CHECK:MACRO_ARG_RE
Try to describe what the pick variants do, and which to prefer. No
functional changes.
Signed-off-by: Jani Nikula
---
Let the naming bikeshed fest begin!
---
drivers/gpu/drm/i915/i915_reg.h | 28 ++--
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/driver
Quoting Tvrtko Ursulin (2018-06-29 11:08:48)
>
> On 29/06/2018 08:53, Chris Wilson wrote:
> > In order to maximise concurrency between engines, if we queue a request
> > to a current idle ring, reorder its dependencies to execute that request
> > as early as possible and ideally improve occupancy
== Series Details ==
Series: drm/i915/skl+: ddb allocation algorithm optimization (rev2)
URL : https://patchwork.freedesktop.org/series/43508/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4403 -> Patchwork_9482 =
== Summary - SUCCESS ==
No regressions found.
External
Quoting Tvrtko Ursulin (2018-06-29 11:00:30)
>
> On 29/06/2018 08:53, Chris Wilson wrote:
> > Our long standing defense against a single client from flooding the
> > system with requests (causing mempressure and stalls across the whole
> > system) is to retire the old request on every allocation.
Quoting Tvrtko Ursulin (2018-06-29 11:04:36)
>
> On 29/06/2018 08:53, Chris Wilson wrote:
> > Taken from an idea used for FQ_CODEL, we give new request flows a
> > priority boost. These flows are likely to correspond with interactive
> > tasks and so be more latency sensitive than the long queues.
On 29/06/2018 08:53, Chris Wilson wrote:
In order to maximise concurrency between engines, if we queue a request
to a current idle ring, reorder its dependencies to execute that request
as early as possible and ideally improve occupancy of multiple engines
simultaneously.
Signed-off-by: Chris W
On 29/06/2018 08:53, Chris Wilson wrote:
Taken from an idea used for FQ_CODEL, we give new request flows a
priority boost. These flows are likely to correspond with interactive
tasks and so be more latency sensitive than the long queues. As soon as
the client has more than one request in the que
On 29/06/2018 08:53, Chris Wilson wrote:
Our long standing defense against a single client from flooding the
system with requests (causing mempressure and stalls across the whole
system) is to retire the old request on every allocation. (By retiring
the oldest, we try to keep returning requests
== Series Details ==
Series: drm/i915/skl+: ddb allocation algorithm optimization (rev2)
URL : https://patchwork.freedesktop.org/series/43508/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: ddb allocation algorithm optimization
-drivers/gpu/drm/i915/i915_drv.h
== Series Details ==
Series: drm/i915/skl+: ddb allocation algorithm optimization (rev2)
URL : https://patchwork.freedesktop.org/series/43508/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ca84c065d170 drm/i915/skl+: ddb allocation algorithm optimization
-:578: WARNING:LINE_SPA
> -Original Message-
> From: Nikula, Jani
> Sent: Friday, June 29, 2018 2:58 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Chauhan, Madhav
>
> Subject: [RFC PATCH 1/2] drm/i915/dsi: rename the current DSI legacy
>
> Starting from ICL we have a new DSI block which requires
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915/dsi: rename the current DSI
legacy
URL : https://patchwork.freedesktop.org/series/45643/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4403 -> Patchwork_9481 =
== Summary - SUCCESS ==
No regressions fo
Quoting Tvrtko Ursulin (2018-06-29 10:31:23)
>
> On 29/06/2018 08:44, Chris Wilson wrote:
> > Setup a userptr object that only has a read-only mapping back to a file
> > store (memfd). Then attempt to write into that mapping using the GPU and
> > assert that those writes do not land (while also wr
This patch implements new DDB allocation algorithm as per HW team
recommendation. This algo takecare of scenario where we allocate less DDB
for the planes with lower relative pixel rate, but they require more DDB
to work.
It also takes care of enabling same watermark level for each
plane in crtc, f
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915/dsi: rename the current DSI
legacy
URL : https://patchwork.freedesktop.org/series/45643/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/dsi: rename the current DSI legacy
-drivers/gpu/drm/i915/int
== Series Details ==
Series: series starting with [RFC,1/2] drm/i915/dsi: rename the current DSI
legacy
URL : https://patchwork.freedesktop.org/series/45643/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d5f58c7ef825 drm/i915/dsi: rename the current DSI legacy
-:69: WARNING:FI
Hi,
On 29-06-18 03:07, Stephen Rothwell wrote:
Hi Bartlomiej,
After merging the fbdev tree, today's linux-next build (x86_64
allmodconfig) failed like this:
ERROR: "dummycon_unregister_output_notifier" [drivers/video/fbdev/core/fb.ko]
undefined!
ERROR: "dummycon_register_output_notifier" [dri
On 29/06/2018 08:44, Chris Wilson wrote:
Setup a userptr object that only has a read-only mapping back to a file
store (memfd). Then attempt to write into that mapping using the GPU and
assert that those writes do not land (while also writing via a writable
userptr mapping into the same memfd to
Avoid confusion with the functions to be added for ICL+ DSI
implementation.
The idea is that static functions and functions only called within the
legacy DSI implementation files (intel_legacy_dsi.c and
intel_legacy_dsi_pll.c) could remain as they are.
References: https://patchwork.freedesktop.or
Starting from ICL we have a new DSI block which requires completely
different programming from the current implementation. Having them in
the same file would be confusing. Rename the current DSI out of the way
as legacy DSI, to make way for the ICL+ implementation. We'll want to
call the new DSI bl
== Series Details ==
Series: series starting with [01/37] drm/i915/gtt: Add read only pages to
gen8_pte_encode
URL : https://patchwork.freedesktop.org/series/45638/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4403 -> Patchwork_9480 =
== Summary - SUCCESS ==
No regress
== Series Details ==
Series: series starting with [01/37] drm/i915/gtt: Add read only pages to
gen8_pte_encode
URL : https://patchwork.freedesktop.org/series/45638/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Add read only pages to gen8_pte_encode
Okay!
Co
1 - 100 of 141 matches
Mail list logo
