[Intel-gfx] [PATCH] drm/i915/gtt: Avoid calling non-existent allocate_va_range

On hsw and older, we do not need to allocate the ppgtt on the fly and so ppgtt->allocate_va_range() is NULL. Fixup ppgtt_bind_vma not to call it, in that case! v2: PIN_UPDATE still exists. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c | 26 ++ 1 fil

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gtt: Avoid calling non-existent allocate_va_range

Quoting Chris Wilson (2018-04-28 21:04:23) > On hsw and older, we do not need to allocate the ppgtt on the fly and so > ppgtt->allocate_va_range() is NULL. Fixup ppgtt_bind_vma not to call it, > in that case! > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 35 ++

[Intel-gfx] [PATCH 2/2] drm/i915/gtt: Enable full-ppgtt by default for HSW

Let's see if we have all the kinks worked out and full-ppgtt now works reliably on Haswell. If we can let userspace have full control over their own ppgtt, it makes softpinning far more effective, in turn making GPU dispatch far more efficient and more secure (due to better mm segregation). Signed

[Intel-gfx] [PATCH 1/2] drm/i915/gtt: Avoid calling non-existent allocate_va_range

On hsw and older, we do not need to allocate the ppgtt on the fly and so ppgtt->allocate_va_range() is NULL. Fixup ppgtt_bind_vma not to call it, in that case! Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c | 35 +++-- 1 file changed, 23 insertions(+)

[Intel-gfx] [PATCH i-g-t 1/4] igt: Exercise creating context with shared GTT

v2: Test each shared context is its own timeline and allows request reordering between shared contexts. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin Cc: Mika Kuoppala Cc: Michal Wajdeczko --- lib/i915/gem_context.c | 66 +++ lib/i915/gem_context.h | 13 + tests/Ma

[Intel-gfx] [PATCH i-g-t 4/4] igt: Add gem_exec_balance

Signed-off-by: Chris Wilson --- tests/Makefile.am | 1 + tests/Makefile.sources| 1 + tests/gem_exec_balancer.c | 446 ++ tests/meson.build | 1 + 4 files changed, 449 insertions(+) create mode 100644 tests/gem_exec_balancer.c diff -

[Intel-gfx] [PATCH i-g-t 3/4] igt: Add gem_ctx_engines

To exercise the new I915_CONTEXT_PARAM_ENGINES and interactions with gem_execbuf(). Signed-off-by: Chris Wilson --- tests/Makefile.sources | 1 + tests/gem_ctx_engines.c | 236 tests/meson.build | 1 + 3 files changed, 238 insertions(+) create

[Intel-gfx] [PATCH i-g-t 2/4] igt/gem_exec_whisper: Fork all-engine tests one-per-engine

Add a new mode for some more stress, submit the all-engines tests simultaneously, a stream per engine. Signed-off-by: Chris Wilson --- tests/gem_exec_whisper.c | 27 ++- 1 file changed, 22 insertions(+), 5 deletions(-) diff --git a/tests/gem_exec_whisper.c b/tests/gem_ex

[Intel-gfx] ✓ Fi.CI.IGT: success for Enable HuC authentication in Icelake

== Series Details == Series: Enable HuC authentication in Icelake URL : https://patchwork.freedesktop.org/series/42433/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4109_full -> Patchwork_8831_full = == Summary - SUCCESS == No regressions found. External URL: https:

[Intel-gfx] [PATCH v4] drm/i915/lrc: Scrub the GPU state of the guilty hanging request

Previously, we just reset the ring register in the context image such that we could skip over the broken batch and emit the closing breadcrumb. However, on resume the context image and GPU state would be reloaded, which may have been left in an inconsistent state by the reset. The presumption was t

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/lrc: Scrub the GPU state of the guilty hanging request (rev3)

== Series Details == Series: drm/i915/lrc: Scrub the GPU state of the guilty hanging request (rev3) URL : https://patchwork.freedesktop.org/series/42425/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4109_full -> Patchwork_8830_full = == Summary - FAILURE == Serious unkn

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable HuC authentication in Icelake

== Series Details == Series: Enable HuC authentication in Icelake URL : https://patchwork.freedesktop.org/series/42433/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4109 -> Patchwork_8831 = == Summary - SUCCESS == No regressions found. External URL: https://patchwor

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HuC authentication in Icelake

== Series Details == Series: Enable HuC authentication in Icelake URL : https://patchwork.freedesktop.org/series/42433/ State : warning == Summary == $ dim checkpatch origin/drm-tip e1a5588cbbae drm/i915/icl/guc: Do not allow GuC submission on Icelake for now 93fdefe745e1 drm/i915/icl/guc: Pas

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/lrc: Scrub the GPU state of the guilty hanging request (rev3)

== Series Details == Series: drm/i915/lrc: Scrub the GPU state of the guilty hanging request (rev3) URL : https://patchwork.freedesktop.org/series/42425/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4109 -> Patchwork_8830 = == Summary - SUCCESS == No regressions found.

Re: [Intel-gfx] [PATCH] drm/i915: Request driver probe from an async task

On Fri, 27 Apr 2018 10:04:13 +0200, Jani Nikula wrote: > > On Thu, 26 Apr 2018, Imre Deak wrote: > > On Thu, Apr 26, 2018 at 03:41:57PM +0300, David Weinehall wrote: > >> On Fri, Mar 23, 2018 at 08:30:48AM +, Chris Wilson wrote: > >> > As we are careful not to register external interfaces bef

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/lrc: Scrub the GPU state of the guilty hanging request

== Series Details == Series: drm/i915/lrc: Scrub the GPU state of the guilty hanging request URL : https://patchwork.freedesktop.org/series/42425/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4108 -> Patchwork_8829 = == Summary - FAILURE == Serious unknown changes comin