On Fri, 2018-03-23 at 00:06 +, Souza, Jose wrote:
> On Thu, 2018-03-22 at 16:31 -0700, Rodrigo Vivi wrote:
> > On Thu, Mar 22, 2018 at 02:48:46PM -0700, José Roberto de Souza
> > wrote:
> >
> > please add some justification on why this is useful
>
The plan is to remove sink crc and us
Reviewed-by: Shashank Sharma
Regards
Shashank
On 3/23/2018 11:55 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Since we may attempt to reconfigure SCDC when the sink has already been
disconnected we probably shouldn't scare the user with errors in dmesg
that are 100% expected in that case. Jus
On Fri, 2018-03-23 at 23:51 +, Souza, Jose wrote:
> On Fri, 2018-03-23 at 15:59 -0700, Pandiyan, Dhinakaran wrote:
> >
> >
> > On Thu, 2018-03-22 at 14:48 -0700, José Roberto de Souza wrote:
> > > Move to only one place the sink requirements that the actual driver
> > > needs to enable PSR2.
On Fri, 2018-03-23 at 23:49 +, Souza, Jose wrote:
> On Fri, 2018-03-23 at 15:14 -0700, Pandiyan, Dhinakaran wrote:
> > On Thu, 2018-03-22 at 15:57 -0700, Rodrigo Vivi wrote:
> > > On Thu, Mar 22, 2018 at 02:48:39PM -0700, José Roberto de Souza
> > > wrote:
> > > > Without GTC enabled hardware i
== Series Details ==
Series: drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER
URL : https://patchwork.freedesktop.org/series/40601/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
fail -> PASS (s
== Series Details ==
Series: drm/scdc-helper: Convert errors into debug messages
URL : https://patchwork.freedesktop.org/series/40591/
State : failure
== Summary ==
Possible new issues:
Test kms_chv_cursor_fail:
Subgroup pipe-c-128x128-top-edge:
pass -> FAIL
On Fri, 2018-03-23 at 15:59 -0700, Pandiyan, Dhinakaran wrote:
>
>
> On Thu, 2018-03-22 at 14:48 -0700, José Roberto de Souza wrote:
> > Move to only one place the sink requirements that the actual driver
> > needs to enable PSR2.
> >
> > Also intel_psr2_config_valid() is called every time the c
On Fri, 2018-03-23 at 15:14 -0700, Pandiyan, Dhinakaran wrote:
> On Thu, 2018-03-22 at 15:57 -0700, Rodrigo Vivi wrote:
> > On Thu, Mar 22, 2018 at 02:48:39PM -0700, José Roberto de Souza
> > wrote:
> > > Without GTC enabled hardware is sending dummy aux frame sync
> > > value
>
> Curious, is this
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
When running on platform with CTB based GuC communication enabled,
GuC to Host event data will be delivered as CT request message.
However, content of the data[1] of this CT message follows format
of the scratch register used in MMIO based communicati
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
Requests are read from CT in the irq handler, but actual processing
will be done in the work thread. Processing of specific actions will
be added in the upcoming patches.
v2: don't use GEM_BUG_ON (Chris)
don't kmalloc too large buffer (Michal)
v
== Series Details ==
Series: ICL reviewed mergeable patches
URL : https://patchwork.freedesktop.org/series/40585/
State : success
== Summary ==
Known issues:
Test kms_flip:
Subgroup 2x-plain-flip-fb-recreate-interruptible:
fail -> PASS (shard-hsw) fdo#
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
We will need them in G2H communication to properly handle
responses and requests from the Guc.
v2: keep irq enabled while disabling GuC logging (Oscar)
v3: rebase.
Signed-off-by: Michal Wajdeczko
Cc: Oscar Mateo
Cc: Daniele Ceraolo Spurio
Cc: Mic
On Thu, 2018-03-22 at 14:48 -0700, José Roberto de Souza wrote:
> Move to only one place the sink requirements that the actual driver
> needs to enable PSR2.
>
> Also intel_psr2_config_valid() is called every time the crtc config
> is computed, wasting some time every time it was checking for
>
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
Instead of returning small data in response status dword,
GuC may append longer data as response message payload.
If caller provides response buffer, we will copy received
data and use number of received data dwords as new success
return value. We wil
== Series Details ==
Series: drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4
(rev3)
URL : https://patchwork.freedesktop.org/series/39473/
State : failure
== Summary ==
Possible new issues:
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-indfb-dra
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
GuC can respond to our commands not only by updating SEND buffer
descriptor, but can also send a response message over RECV buffer.
Guc can also send unsolicited request messages over RECV buffer.
Let's start reading those messages and make placeholde
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
In next patch we will introduce another way of waiting for the response
that will use RECV buffer. To avoid misleading names, rename old wait
function to reflect the fact that it is based on descriptor update.
v2: fix comment style (Michal)
Signed-o
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
On platforms with CTB based GuC communications, we will handle
GuC events in a different way. Let's make event handler a virtual
function to allow easy switch between those variants.
Credits-to: Oscar Mateo
Signed-off-by: Michal Wajdeczko
Cc: Danie
On Thu, 2018-03-22 at 15:57 -0700, Rodrigo Vivi wrote:
> On Thu, Mar 22, 2018 at 02:48:39PM -0700, José Roberto de Souza wrote:
> > Without GTC enabled hardware is sending dummy aux frame sync value
Curious, is this something you found by testing?
> > that is not useful to sink do selective updat
On 03/23/2018 05:34 AM, Michał Winiarski wrote:
We probably shouldn't print out WOPCM size on platforms that don't have
GuC. We also want to make sure we don't hit any asserts if user explicitly
sets enable_guc != 0 on non-guc platforms.
Signed-off-by: Michał Winiarski
Cc: Chris Wilson
Cc: Jac
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
We're using data encoded in the status MMIO as return value from send
function, but GuC may also write more data in remaining MMIO regs.
Let's copy content of these registers to the buffer provided by caller.
v2: new line (Michel)
v3: updated commit
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
This is a preparation step for the upcoming patches.
We already can return some small data decoded from the command
status, but we will need more in the future.
v2: add explicit response buf size
v3: squash with helper patch
Signed-off-by: Michal Wa
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
GuC may return additional data in the response message.
Format and meaning of this data is action specific. We will
use this non-negative data as a new success return value.
Currently used actions don't return data that way yet.
v2: fix prohibited sp
On 3/23/2018 7:47 AM, Michal Wajdeczko wrote:
As we are going to extend our use of MMIO based communication,
try to explain its mechanics and update corresponding definitions.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Sagar Arun Kamble
Cc: Kelvin Gardiner
---
drivers/g
On Fri, Mar 23, 2018 at 12:58:53PM -0700, Paulo Zanoni wrote:
> Protect the macro parameters with parens in order to avoid priority
> issues on macro evaluation when the macro argument is not a single
> operand.
>
> This is not a problem today, but it could be in the future. I found
> this while r
== Series Details ==
Series: series starting with [1/2] drm/simple-kms-helper: Plumb plane state to
the enable hook (rev3)
URL : https://patchwork.freedesktop.org/series/40514/
State : success
== Summary ==
Possible new issues:
Test drv_suspend:
Subgroup fence-restore-tiled2unti
On 2018-03-22 11:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We want to get rid of plane->fb on atomic drivers. Stop setting it.
>
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: "David (ChunMing) Zhou"
> Cc: Harry Wentland
> Cc: amd-...@lists.freedesktop.org
> Signed-off-by: Vill
== Series Details ==
Series: drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER
URL : https://patchwork.freedesktop.org/series/40601/
State : success
== Summary ==
Series 40601v1 drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER
https://patchwork.freedesktop.org/api/1.0/se
== Series Details ==
Series: series starting with [v4,1/7] drm/i915: Correctly handle error path in
i915_gem_init_hw
URL : https://patchwork.freedesktop.org/series/40581/
State : failure
== Summary ==
Possible new issues:
Test drm_mm:
Subgroup sanitycheck:
pass
== Series Details ==
Series: drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER
URL : https://patchwork.freedesktop.org/series/40601/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ed3487826478 drm/i915: protect macro parameters in SWING_SEL_{UPP, LO}WER
-:14: WARNING:
On 03/23/2018 05:34 AM, Michał Winiarski wrote:
We need GuC to load HuC, but it's also possible for GuC to operate on
its own. We don't know what the size of HuC FW may be, so, not wanting
to make any platform-specific hardcoded guesses, we assume that its size
is 0... Which is a very bad approxi
Protect the macro parameters with parens in order to avoid priority
issues on macro evaluation when the macro argument is not a single
operand.
This is not a problem today, but it could be in the future. I found
this while reviewing a patch that introduces new callers for the
macros.
Reference: c
On 3/23/2018 12:21 PM, Kumar, Abhay wrote:
-Original Message-
From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
Sent: Wednesday, February 14, 2018 10:00 AM
To: Kumar, Abhay ; Intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice t
== Series Details ==
Series: drm/i915/guc: Support for Guc responses and requests (rev2)
URL : https://patchwork.freedesktop.org/series/28393/
State : failure
== Summary ==
Possible new issues:
Test kms_frontbuffer_tracking:
Subgroup fbc-rgb101010-draw-blt:
fail
On 03/23/2018 05:34 AM, Michał Winiarski wrote:
In the following patches we're going to support constraints checking on
an already locked partitioning. Let's structure the code now to allow
for code reuse and reduce the churn later on.
Signed-off-by: Michał Winiarski
Cc: Chris Wilson
Cc: Jacki
== Series Details ==
Series: drm/scdc-helper: Convert errors into debug messages
URL : https://patchwork.freedesktop.org/series/40591/
State : success
== Summary ==
Series 40591v1 drm/scdc-helper: Convert errors into debug messages
https://patchwork.freedesktop.org/api/1.0/series/40591/revisio
== Series Details ==
Series: ICL reviewed mergeable patches
URL : https://patchwork.freedesktop.org/series/40585/
State : success
== Summary ==
Series 40585v1 ICL reviewed mergeable patches
https://patchwork.freedesktop.org/api/1.0/series/40585/revisions/1/mbox/
Known issues:
Test debug
On Fri, 23 Mar 2018 19:40:10 +0100, Yaodong Li
wrote:
On 03/23/2018 11:26 AM, Michal Wajdeczko wrote:
On Fri, 23 Mar 2018 19:03:47 +0100, Yaodong Li
wrote:
On 03/23/2018 05:27 AM, Michal Wajdeczko wrote:
On Fri, 23 Mar 2018 13:07:15 +0100, Sagar Arun Kamble
wrote:
On 3/23/2018 4
== Series Details ==
Series: series starting with [v4,1/3] drm/i915: Reorder early initialization
URL : https://patchwork.freedesktop.org/series/40570/
State : failure
== Summary ==
Possible new issues:
Test kms_frontbuffer_tracking:
Subgroup fbc-rgb101010-draw-blt:
== Series Details ==
Series: ICL reviewed mergeable patches
URL : https://patchwork.freedesktop.org/series/40585/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8689ec52c22b drm/i915/icl: Add register definitions for Combo PHY vswing
sequences.
a8fa787db803 drm/i915/icl: Add Co
== Series Details ==
Series: drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4
(rev3)
URL : https://patchwork.freedesktop.org/series/39473/
State : success
== Summary ==
Series 39473v3 drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP
1.4
https://patchwork.f
On 03/23/2018 11:26 AM, Michal Wajdeczko wrote:
On Fri, 23 Mar 2018 19:03:47 +0100, Yaodong Li
wrote:
On 03/23/2018 05:27 AM, Michal Wajdeczko wrote:
On Fri, 23 Mar 2018 13:07:15 +0100, Sagar Arun Kamble
wrote:
On 3/23/2018 4:53 PM, Piotr Piórkowski wrote:
If GuC firmware is not availa
On 23/03/18 05:34, Michał Winiarski wrote:
We imposed additional restrictions to GEN9 WOPCM partitioning. However,
we ignored early steppings of CNL, to which those restrictions also
apply. Let's also tweak the logic a bit by having separate helpers for
returning extra size needed for the restr
On Fri, 23 Mar 2018 19:03:47 +0100, Yaodong Li
wrote:
On 03/23/2018 05:27 AM, Michal Wajdeczko wrote:
On Fri, 23 Mar 2018 13:07:15 +0100, Sagar Arun Kamble
wrote:
On 3/23/2018 4:53 PM, Piotr Piórkowski wrote:
If GuC firmware is not available on the system and we load i915 with
enabl
From: Ville Syrjälä
Since we may attempt to reconfigure SCDC when the sink has already been
disconnected we probably shouldn't scare the user with errors in dmesg
that are 100% expected in that case. Just leave it up to the caller
whether to print an error message or not, and just output debug
me
On 03/23/2018 05:27 AM, Michal Wajdeczko wrote:
On Fri, 23 Mar 2018 13:07:15 +0100, Sagar Arun Kamble
wrote:
On 3/23/2018 4:53 PM, Piotr Piórkowski wrote:
If GuC firmware is not available on the system and we load i915 with
enable
GuC, then we hit this null pointer dereference issue:
Pat
On Thu, Mar 22, 2018 at 04:49:22PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix hibernation with ACPI S0 target state
> URL : https://patchwork.freedesktop.org/series/40466/
> State : success
>
> == Summary ==
Thanks for the review, I pushed the patch to -dinq.
>
== Series Details ==
Series: series starting with [1/2] drm/simple-kms-helper: Plumb plane state to
the enable hook (rev3)
URL : https://patchwork.freedesktop.org/series/40514/
State : success
== Summary ==
Series 40514v3 series starting with [1/2] drm/simple-kms-helper: Plumb plane
state to
== Series Details ==
Series: series starting with [1/2] drm/simple-kms-helper: Plumb plane state to
the enable hook (rev3)
URL : https://patchwork.freedesktop.org/series/40514/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e2190dc276fb drm/simple-kms-helper: Plumb plane state
== Series Details ==
Series: drm/i915: Include submission tasklet state in engine dump (rev2)
URL : https://patchwork.freedesktop.org/series/40548/
State : success
== Summary ==
Known issues:
Test kms_cursor_legacy:
Subgroup 2x-long-flip-vs-cursor-atomic:
fail
On 03/23/2018 07:01 AM, Michał Winiarski wrote:
On Thu, Mar 22, 2018 at 02:27:59PM -0700, Yaodong Li wrote:
On 03/22/2018 01:38 PM, Michał Winiarski wrote:
On Tue, Mar 20, 2018 at 04:18:46PM -0700, Jackie Li wrote:
In current code, we only compare the locked WOPCM register values with the
calc
On Fri, Mar 23, 2018 at 03:22:35PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 22, 2018 at 04:36:42PM +0200, Imre Deak wrote:
> > After
> >
> > commit dd9f31c7a3887950cbd0d49eb9d43f7a1518a356
> > Author: Imre Deak
> > Date: Wed Aug 16 17:46:07 2017 +0300
> >
> > drm/i915/gen9+: Set same powe
From: Manasi Navare
This patch defines register definitions required for ICL voltage
vswing programming for Combo PHY DDI Ports. It uses the same bit
definitions and macros as the CNL voltage swing sequences.
v8 (from Paulo):
* Rebase.
v7:
* Kill _MMIIO_PORT2_LN (Paulo)
v6:
* Replace some spaces
Let's see that the CI has to say about them before we merge them.
These are taken from: [PATCH 00/17] ICL PLLs, DP/HDMI and misc display
Dhinakaran Pandiyan (1):
drm/i915/icl: HPD pin for port F
James Ausmus (1):
drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL
Manasi Navare (4):
From: James Ausmus
These fields have been deprecated and moved in ICL+. Stop setting the
bits.
They have moved to GAMMA_MODE and CSC_MODE, respectively. This patch
is just to stop incorrectly setting bits in PLANE_COLOR_CTL while
we're waiting for the new replacement functionality to be done.
v
From: Nabendu Maiti
Gen11 supports upto 5k source scaling
v2: Re-factoring of code as per review
v3: Corrected max Vertical size and indentation
v4: Added max Vertical dst size in same patch
Reviewed-by: Paulo Zanoni
Signed-off-by: Nabendu Maiti
---
drivers/gpu/drm/i915/intel_display.c | 11
From: Manasi Navare
These tables are used on voltage vswing sequence initialization on
Icelake.
The swing_sel on the spec's table is defined in a 4 bits binary like
1010. However the register bits are split in upper 1 bit swing_sel
and lower 3 bits swing sel.
In this table here we store this v
From: Manasi Navare
This table is used for voltage swing programming sequence during DDI
Buffer initialization for MG PHY DDI Buffers on Icelake.
v2 (from Paulo):
* Fix white space issues.
Cc: Rodrigo Vivi
Cc: Jani Nikula
Reviewed-by: Paulo Zanoni
Signed-off-by: Manasi Navare
Signed-off-by:
From: Manasi Navare
On Icelake platform, MG PHY is used when operating in DP alternate
mode or the legacy HDMI or DP modes. DDI Ports C, D, E, F are MG PHY
DDI ports on ICL.
This patch adds the necessary voltage swing programming related
register definitions and macros for MG PHY DDI ports.
v4
From: Dhinakaran Pandiyan
Extend enum hpd_pin to port F so that we can start using this for ICL.
v2: Rebase.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Reviewed-by: Rodrigo Vivi
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_hotplug.c |
== Series Details ==
Series: series starting with [v4,1/7] drm/i915: Correctly handle error path in
i915_gem_init_hw
URL : https://patchwork.freedesktop.org/series/40581/
State : success
== Summary ==
Series 40581v1 series starting with [v4,1/7] drm/i915: Correctly handle error
path in i915_
On 23/03/18 05:34, Michał Winiarski wrote:
We're seeing "RPM wakelock ref not held during HW access" warning
otherwise. And since IRQ are synced for runtime suspend, we can use the
variant without wakeref assert.
Reported-by: Marta Löfstedt
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?
== Series Details ==
Series: drm/i915: Actually flush interrupts on reset not just wedging (rev2)
URL : https://patchwork.freedesktop.org/series/40550/
State : success
== Summary ==
Known issues:
Test kms_cursor_legacy:
Subgroup 2x-long-flip-vs-cursor-atomic:
fail
== Series Details ==
Series: drm/i915/guc: Support for Guc responses and requests (rev2)
URL : https://patchwork.freedesktop.org/series/28393/
State : success
== Summary ==
Series 28393v2 drm/i915/guc: Support for Guc responses and requests
https://patchwork.freedesktop.org/api/1.0/series/2839
== Series Details ==
Series: series starting with [v3,1/3] drm/i915: Reorder early initialization
URL : https://patchwork.freedesktop.org/series/40556/
State : failure
== Summary ==
Possible new issues:
Test kms_draw_crc:
Subgroup draw-method-xrgb2101010-render-xtiled:
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/guc: Fix null pointer
dereference when GuC FW is not available
URL : https://patchwork.freedesktop.org/series/40559/
State : failure
== Summary ==
Possible new issues:
Test kms_frontbuffer_tracking:
Subgroup fbc
== Series Details ==
Series: drm/i915/guc: Support for Guc responses and requests (rev2)
URL : https://patchwork.freedesktop.org/series/28393/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/guc: Add documentation for MMIO based communication
Okay!
Commit: drm/i915/
== Series Details ==
Series: drm/i915/guc: Support for Guc responses and requests (rev2)
URL : https://patchwork.freedesktop.org/series/28393/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a60fcd18ab16 drm/i915/guc: Add documentation for MMIO based communication
-:166: CHECK:MA
== Series Details ==
Series: series starting with [v4,1/3] drm/i915: Reorder early initialization
URL : https://patchwork.freedesktop.org/series/40570/
State : success
== Summary ==
Series 40570v1 series starting with [v4,1/3] drm/i915: Reorder early
initialization
https://patchwork.freedeskt
On Fri, Mar 23, 2018 at 06:22:46PM +0200, Jani Nikula wrote:
> There was some discussion on the dim-tools list about splitting the
> dri-devel list to drm core and drivers lists [1]. Moving the discussion
> to the list in question seems prudent. ;)
>
> I freely admit I don't have the time or inter
Hi Mika,
Even after this series, we're still missing support for reading the
timestamp frequency (read_timestamp_frequency in intel_device_info.c).
I'm pretty sure someone wrote a patch for it. Do you any idea?
If not, I can send something.
Thanks,
-
Lionel
On 16/03/18 12:14, Mika Kuoppala
Den 23.03.2018 16.35, skrev Ville Syrjala:
From: Ville Syrjälä
mipi_dbi_enable_flush() wants to call the fb->dirty() hook from the
bowels of the .atomic_enable() hook. That prevents us from taking the
plane mutex in fb->dirty() unless we also plumb down the acquire
context.
Instead it seems s
On Tue, Mar 20, 2018 at 8:44 PM, Thomas Gleixner wrote:
> On Tue, 20 Mar 2018, Daniel Vetter wrote:
>
>> Sometimes it's really easy to know which object has gone boom and
>> where the offending code is, and sometimes it's really hard. One case
>> we're trying to hunt down is when module unload cat
On Tue, Mar 20, 2018 at 03:06:37PM -0700, Lucas De Marchi wrote:
> Remove 4-bytes hole in this struct an reorder tables accordingly. This
> also changes the last element of the tables to be more future-proof.
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 48
There was some discussion on the dim-tools list about splitting the
dri-devel list to drm core and drivers lists [1]. Moving the discussion
to the list in question seems prudent. ;)
I freely admit I don't have the time or interest in reading the patches
for other drivers than i915, but I do glanc
On Tue, Mar 20, 2018 at 03:06:35PM -0700, Lucas De Marchi wrote:
> Replace all users of pll->id to use pll->info->id. In functions using
> this more than once it was preferred to add an id variable to make the
> code easier to read.
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915
== Series Details ==
Series: series starting with [1/8] drm/i915/guc: Use _FW variants for mmio
access in GuC irq handler
URL : https://patchwork.freedesktop.org/series/40568/
State : failure
== Summary ==
Series 40568v1 series starting with [1/8] drm/i915/guc: Use _FW variants for
mmio acce
From: Matt Atwood
DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheeme from 8
bits to 7 in DPCD 0x000e. The 8th bit is used to identify extended
receiver capabilities. For panels that use this new feature wait interval
would be increased by 512 ms, when spec is max 16 ms. This behavio
== Series Details ==
Series: series starting with [1/8] drm/i915/guc: Use _FW variants for mmio
access in GuC irq handler
URL : https://patchwork.freedesktop.org/series/40568/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/guc: Use _FW variants for mmio access in G
== Series Details ==
Series: series starting with [1/8] drm/i915/guc: Use _FW variants for mmio
access in GuC irq handler
URL : https://patchwork.freedesktop.org/series/40568/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e70f1d562ad5 drm/i915/guc: Use _FW variants for mmio ac
On Fri, Mar 23, 2018 at 02:15:38PM +0200, Joonas Lahtinen wrote:
> Quoting Matt Roper (2018-03-17 02:08:57)
> > This is the fourth iteration of the work previously posted here:
> > (v1)
> > https://lists.freedesktop.org/archives/intel-gfx/2018-January/153156.html
> > (v2)
> > https://www.mail
Quoting Michal Wajdeczko (2018-03-23 12:34:49)
> In upcoming patch, we want to perform more actions in early
> initialization of the uC. This reordering will help resolve
> new dependencies that will be introduced by future patch.
>
> v2: s/i915_gem_load_init/i915_gem_init_early (Chris)
> v3: s/i9
On Fri, Mar 23, 2018 at 03:58:06PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 23, 2018 at 02:37:23PM +0100, Noralf Trønnes wrote:
> >
> > Den 23.03.2018 12.31, skrev Ville Syrjälä:
> > > On Fri, Mar 23, 2018 at 12:43:58AM +0100, Noralf Trønnes wrote:
> > >>
> > >> Den 22.03.2018 21.27, skrev Ville
From: Ville Syrjälä
mipi_dbi_enable_flush() wants to call the fb->dirty() hook from the
bowels of the .atomic_enable() hook. That prevents us from taking the
plane mutex in fb->dirty() unless we also plumb down the acquire
context.
Instead it seems simpler to split the fb->dirty() into a tinydrm
== Series Details ==
Series: drm/i915: Include submission tasklet state in engine dump (rev2)
URL : https://patchwork.freedesktop.org/series/40548/
State : success
== Summary ==
Series 40548v2 drm/i915: Include submission tasklet state in engine dump
https://patchwork.freedesktop.org/api/1.0/s
On Thu, Mar 22, 2018 at 09:37:43PM +0530, Sharma, Shashank wrote:
>
> On 3/22/2018 9:17 PM, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > When we're disabling the HDMI link we try to reset the scrambling and
> > TMDS bit clock ratio back to the default values. This will fail if the
> > sin
== Series Details ==
Series: drm/i915: Actually flush interrupts on reset not just wedging (rev2)
URL : https://patchwork.freedesktop.org/series/40550/
State : success
== Summary ==
Series 40550v2 drm/i915: Actually flush interrupts on reset not just wedging
https://patchwork.freedesktop.org/a
Today uc_fini_hw is subset of uc_sanitize, but remaining
code in sanitize function is also desired for uc_fini_hw.
Instead of duplicating the code, just call uc_sanitize,
but leave as separate function to maintain symmetry with
uc_init_hw.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc
Some functions already use i915 name instead of dev_priv.
Let's rename this param in all remaining functions, except
those that still use legacy macros.
v2: don't forget about function descriptions (Sagar)
v3: rebased
Signed-off-by: Michal Wajdeczko
Reviewed-by: Sagar Arun Kamble
---
drivers/g
We should not leave GuC submission enabled after sanitize,
as we are going to reset all GuC/HuC hardware.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_uc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel
We don't have to check load status values.
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc: Chris Wilson
Reviewed-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_huc.c | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git
In function gem_init_hw() we are calling uc_init_hw() but in case
of error later in function, we missed to call matching uc_fini_hw()
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 6 ++
1 file changed, 6 insertions(+)
diff --g
v2: except running with HYPERVISOR
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c| 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
inde
Since commit 6ca9a2beb54a ("drm/i915: Unwind i915_gem_init() failure")
we believed that we correctly handle all errors encountered during
GuC initialization, including special one that indicates request to
run driver with disabled GPU submission (-EIO).
Unfortunately since commit 121981fafe69 ("dr
== Series Details ==
Series: drm/i915: Actually flush interrupts on reset not just wedging (rev2)
URL : https://patchwork.freedesktop.org/series/40550/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b3648d43615e drm/i915: Actually flush interrupts on reset not just wedging
-:21:
Hi Ville,
On 23 March 2018 at 14:42, Ville Syrjälä wrote:
> On Fri, Mar 23, 2018 at 01:45:50PM +, Daniel Stone wrote:
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -13916,7 +13916,8 @@ static void intel_user_framebuffer_destroy(struct
>> dr
When running on platform with CTB based GuC communication enabled,
GuC to Host event data will be delivered as CT request message.
However, content of the data[1] of this CT message follows format
of the scratch register used in MMIO based communication, so some
code reuse is still possible.
Signe
We're using data encoded in the status MMIO as return value from send
function, but GuC may also write more data in remaining MMIO regs.
Let's copy content of these registers to the buffer provided by caller.
v2: new line (Michel)
v3: updated commit message
Signed-off-by: Michal Wajdeczko
Cc: Da
On platforms with CTB based GuC communications, we will handle
GuC events in a different way. Let's make event handler a virtual
function to allow easy switch between those variants.
Credits-to: Oscar Mateo
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Oscar Mateo
---
drivers
During debug we may want to investigate all communication
from the Guc. Add proper tracing macros in debug config.
v2: convert remaining DRM_DEBUG into new CT_DEBUG (Michal)
v3: use dedicated Kconfig (Daniele)
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
Acked-by
1 - 100 of 187 matches
Mail list logo
