[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: move dpll_info inside intel_shared_dpll

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: move dpll_info inside intel_shared_dpll URL : https://patchwork.freedesktop.org/series/40251/ State : failure == Summary == Series 40251v1 drm/i915: move dpll_info inside intel_shared_dpll https://patchwork.freedesktop.org/api/1.0/series/40251/revisions/1

Re: [Intel-gfx] [PATCH 04/14] drm/i915: Clean up TV pipe select bits

2018-03-19 Thread Jani Nikula
On Fri, 02 Mar 2018, Ville Syrjala wrote: > From: Ville Syrjälä > > Parametrize the TV pipe select bits. > > For consistency with the new way of doing things, let's read out the > pipe select bits even when the port is disable, even though we don't > need that behaviour for asserts in this case.

Re: [Intel-gfx] [PATCH 03/14] drm/i915: Clean up SDVO pipe select bits

2018-03-19 Thread Jani Nikula
On Fri, 02 Mar 2018, Ville Syrjala wrote: > From: Ville Syrjälä > > Clean up the SDVO pipe select bits. To make the whole situation a bit > less ugly we'll start to share the same code between .get_hw_state() > and the port state asserts. > > Signed-off-by: Ville Syrjälä Good stuff. Same nitpic

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915: Add control flags to i915_handle_error() URL : https://patchwork.freedesktop.org/series/40240/ State : failure == Summary == Possible new issues: Test drm_mm: Subgroup sanitycheck: pass -> IN

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move dpll_info inside intel_shared_dpll

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: move dpll_info inside intel_shared_dpll URL : https://patchwork.freedesktop.org/series/40251/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7636902c0601 drm/i915: move dpll_info to header 1783e9c8ea30 drm/i915: embed dpll_info inside intel

Re: [Intel-gfx] [PATCH 02/14] drm/i915: Clean up LVDS pipe select bits

2018-03-19 Thread Jani Nikula
On Fri, 02 Mar 2018, Ville Syrjala wrote: > From: Ville Syrjälä > > Clean up the LVDS pipe select bits. To make the whole situation a bit > less ugly we'll start to share the same code between .get_hw_state() > and the port state asserts. > > Signed-off-by: Ville Syrjälä Couple of nitpicks belo

Re: [Intel-gfx] [PATCH 01/14] drm/i915: Clean up ADPA pipe select bits

2018-03-19 Thread Jani Nikula
On Fri, 02 Mar 2018, Ville Syrjala wrote: > From: Ville Syrjälä > > Clean up the ADPA pipe select bits. To make the whole situation a bit > less ugly we'll start to share the same code between .get_hw_state() > and the port state asserts. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikul

[Intel-gfx] [PATCH 3/7] drm/i915: use funcs from dpll_info embedded in intel_shared_dpll

2018-03-19 Thread Lucas De Marchi
Replace all users of pll->funcs.* to use pll->info.funcs->*. The extra indirection here is not on any critical path and we can leave all const data together. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_display.c | 16 drivers/gpu/drm/i915/intel_dpll_mgr.c | 9

[Intel-gfx] [PATCH 7/7] drm/i915: rename dpll_info to intel_dpll_info

2018-03-19 Thread Lucas De Marchi
Now that the struct is moved to the header, let's add the proper prefix. git grep -lz "struct dpll_info" -- drivers/gpu/drm/i915/ | \ xargs -0 sed -i 's/struct dpll_info/struct intel_dpll_info/g' Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 16

[Intel-gfx] [PATCH 6/7] drm/i915: use flags from dpll_info embedded in intel_shared_dpll

2018-03-19 Thread Lucas De Marchi
Replace all users of pll->flags to use pll->info.flags. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 -- drivers/gpu/drm/i915/intel_dpll_mgr.h | 18 -- 3 files changed, 9 insertions(+), 13 deletions(-

[Intel-gfx] [PATCH 1/7] drm/i915: move dpll_info to header

2018-03-19 Thread Lucas De Marchi
This will allow the struct to be embedded in intel_shared_dpll. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 7 --- drivers/gpu/drm/i915/intel_dpll_mgr.h | 10 ++ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH 2/7] drm/i915: embed dpll_info inside intel_shared_dpll

2018-03-19 Thread Lucas De Marchi
This way we can stop copying fields from dpll_info to intel_shared_dpll one by one. The migration of each field will come on separate patches. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 ++ drivers/gpu/drm/i915/intel_dpll_mgr.h | 5 + 2 files changed, 7 inse

[Intel-gfx] [PATCH 4/7] drm/i915: use name from dpll_info embedded in intel_shared_dpll

2018-03-19 Thread Lucas De Marchi
Replace all users of pll->name to use pll->info.name. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_debugfs.c | 3 ++- drivers/gpu/drm/i915/intel_display.c | 7 --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 26 ++ drivers/gpu/drm/i915/intel_dpll_mgr.

[Intel-gfx] [PATCH 5/7] drm/i915: use id from dpll_info embedded in intel_shared_dpll

2018-03-19 Thread Lucas De Marchi
Replace all users of pll->id to use pll->info.id. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 8 +- drivers/gpu/drm/i915/intel_dpll_mgr.c | 138 +- drivers/gpu/drm/i915/intel_dpll_mgr

[Intel-gfx] [PATCH 0/7] drm/i915: move dpll_info inside intel_shared_dpll

2018-03-19 Thread Lucas De Marchi
This is an alternative to my previous patch "drm/i915: Remove hole and padding from intel_shared_dpll". Not sure if I split this too much, but I think it's easier to review this way. We can always squash them if wanted. As can be seen below this reduces .text and size of our structs, but maybe m

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915/guc: Don't try to enable GuC logging when we're not using GuC URL : https://patchwork.freedesktop.org/series/40239/ State : warning == Summary == Possible new issues: Test kms_atomic_transition: Subgroup plane-all-modeset-transition-fencing:

[Intel-gfx] [PULL] gvt-next-fixes for 4.17

2018-03-19 Thread Zhenyu Wang
Hi, Joonas Here's gvt-next-fixes update for 4.17. One regression that caused guest VM gpu hang has been fixed and with other changes as details below. Thanks -- The following changes since commit 22de4e7a531b623962e62ee6d3a39a7e51bdf90e: drm/i915/pmu: Work around compiler warnings on some ker

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: enable guc interrupts unconditionally in uc_resume

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915/guc: enable guc interrupts unconditionally in uc_resume URL : https://patchwork.freedesktop.org/series/40242/ State : failure == Summary == Series 40242v1 drm/i915/guc: enable guc interrupts unconditionally in uc_resume https://patchwork.freedesktop.org/ap

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915: Add control flags to i915_handle_error() URL : https://patchwork.freedesktop.org/series/40240/ State : success == Summary == Series 40240v1 series starting with [1/5] drm/i915: Add control flags to i915_handle_error() https://

Re: [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4

2018-03-19 Thread kbuild test robot
Hi Matt, Thank you for the patch! Yet something to improve: [auto build test ERROR on v4.16-rc4] [also build test ERROR on next-20180319] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/matthew

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915: Add control flags to i915_handle_error() URL : https://patchwork.freedesktop.org/series/40240/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Add control flags to i915_handle_error() +drivers/gpu/dr

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/i915: Add control flags to i915_handle_error() URL : https://patchwork.freedesktop.org/series/40240/ State : warning == Summary == $ dim checkpatch origin/drm-tip b279af513a73 drm/i915: Add control flags to i915_handle_error() -:111:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Don't try to enable GuC logging when we're not using GuC

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915/guc: Don't try to enable GuC logging when we're not using GuC URL : https://patchwork.freedesktop.org/series/40239/ State : success == Summary == Series 40239v1 drm/i915/guc: Don't try to enable GuC logging when we're not using GuC https://patchwork.freed

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Chris Wilson
Quoting Michel Thierry (2018-03-20 00:56:04) > On 3/19/2018 5:44 PM, Chris Wilson wrote: > > Quoting Michel Thierry (2018-03-20 00:39:35) > >> On 3/19/2018 5:18 PM, Chris Wilson wrote: > >>> Not all callers want the GPU error to handled in the same way, so expose > >>> a control parameter. In the f

[Intel-gfx] linux-next: manual merge of the drm-misc tree with Linus' tree

2018-03-19 Thread Stephen Rothwell
Hi all, Today's linux-next merge of the drm-misc tree got a conflict in: drivers/gpu/drm/sun4i/sun4i_tcon.h between commit: e742a17cd360 ("drm/sun4i: tcon: Reduce the scope of the LVDS error a bit") from Linus' tree and commit: 6664e9dc5383 ("drm/sun4i: Add support for A80 TCONs") from

Re: [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4

2018-03-19 Thread kbuild test robot
Hi Matt, Thank you for the patch! Yet something to improve: [auto build test ERROR on v4.16-rc4] [also build test ERROR on next-20180319] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/matthew

[Intel-gfx] [PATCH] drm/i915/guc: enable guc interrupts unconditionally in uc_resume

2018-03-19 Thread Michel Thierry
Probably lost while rebasing commit eacd8391f977 ("drm/i915/guc: Keep GuC interrupts enabled when using GuC"). Not really needed since i915_gem_init_hw is called before uc_resume, but it brings symmetry to uc_suspend. Signed-off-by: Michel Thierry Cc: Michał Winiarski --- drivers/gpu/drm/i915/

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Michel Thierry
On 3/19/2018 5:44 PM, Chris Wilson wrote: Quoting Michel Thierry (2018-03-20 00:39:35) On 3/19/2018 5:18 PM, Chris Wilson wrote: Not all callers want the GPU error to handled in the same way, so expose a control parameter. In the first instance, some callers do not want the heavyweight error ca

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Chris Wilson
Quoting Michel Thierry (2018-03-20 00:39:35) > On 3/19/2018 5:18 PM, Chris Wilson wrote: > > Not all callers want the GPU error to handled in the same way, so expose > > a control parameter. In the first instance, some callers do not want the > > heavyweight error capture so add a bit to request th

Re: [Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Michel Thierry
On 3/19/2018 5:18 PM, Chris Wilson wrote: Not all callers want the GPU error to handled in the same way, so expose a control parameter. In the first instance, some callers do not want the heavyweight error capture so add a bit to request the state to be captured and saved. v2: Pass msg down to i

[Intel-gfx] [PATCH 2/5] drm/i915/execlists: Refactor out complete_preempt_context()

2018-03-19 Thread Chris Wilson
As a complement to inject_preempt_context(), follow up with the function to handle its completion. This will be useful should we wish to extend the duties of the preempt-context for execlists. Signed-off-by: Chris Wilson Cc: Jeff McGee Cc: Michał Winiarski --- drivers/gpu/drm/i915/intel_lrc.c

[Intel-gfx] [PATCH 1/5] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Chris Wilson
Not all callers want the GPU error to handled in the same way, so expose a control parameter. In the first instance, some callers do not want the heavyweight error capture so add a bit to request the state to be captured and saved. v2: Pass msg down to i915_reset/i915_reset_engine so that we inclu

[Intel-gfx] [PATCH 3/5] drm/i915: Move engine reset prepare/finish to backends

2018-03-19 Thread Chris Wilson
In preparation to more carefully handling incomplete preemption during reset by execlists, we move the existing code wholesale to the backends under a couple of new reset vfuncs. Signed-off-by: Chris Wilson Cc: Michał Winiarski CC: Michel Thierry Cc: Jeff McGee --- drivers/gpu/drm/i915/i915_g

[Intel-gfx] [PATCH 4/5] drm/i915: Split execlists/guc reset prepartions

2018-03-19 Thread Chris Wilson
In the next patch, we will make the execlists reset prepare callback take into account preemption by flushing the context-switch handler. This is not applicable to the GuC submission backend, so split the two into their own backend callbacks. Signed-off-by: Chris Wilson Cc: Michał Winiarski CC:

[Intel-gfx] [PATCH 5/5] drm/i915/execlists: Flush pending preemption events during reset

2018-03-19 Thread Chris Wilson
Catch up with the inflight CSB events, after disabling the tasklet before deciding which request was truly guilty of hanging the GPU. Signed-off-by: Chris Wilson Cc: Michał Winiarski CC: Michel Thierry Cc: Jeff McGee --- drivers/gpu/drm/i915/intel_lrc.c | 355 ++---

Re: [Intel-gfx] [PATCH] drm/i915/guc: Don't try to enable GuC logging when we're not using GuC

2018-03-19 Thread Chris Wilson
Quoting Michał Winiarski (2018-03-20 00:13:37) > When changing the default values for guc_log_level, we accidentally left > the log enabled on non-guc platforms. Let's fix that. > > Fixes: 9605d1ce7c6b ("drm/i915/guc: Default to non-verbose GuC logging") > Reported-by: Chris Wilson > Signed-off-b

[Intel-gfx] [PATCH] drm/i915/guc: Don't try to enable GuC logging when we're not using GuC

2018-03-19 Thread Michał Winiarski
When changing the default values for guc_log_level, we accidentally left the log enabled on non-guc platforms. Let's fix that. Fixes: 9605d1ce7c6b ("drm/i915/guc: Default to non-verbose GuC logging") Reported-by: Chris Wilson Signed-off-by: Michał Winiarski Cc: Chris Wilson Cc: Sagar Arun Kambl

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Disable some extra clang warnings (rev2)

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Disable some extra clang warnings (rev2) URL : https://patchwork.freedesktop.org/series/40145/ State : warning == Summary == Possible new issues: Test drv_suspend: Subgroup forcewake: pass -> SKIP (shard-snb) Test

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads URL : https://patchwork.freedesktop.org/series/40233/ State : warning == Summary == Series 40233v1 series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrFor

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads URL : https://patchwork.freedesktop.org/series/40233/ State : warning == Summary == $ dim checkpatch origin/drm-tip e6a22b973125 drm/i915/cnl: Implement WaProgramMgsr

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: make GEM_WARN_ON less terrible

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: make GEM_WARN_ON less terrible URL : https://patchwork.freedesktop.org/series/40215/ State : success == Summary == Known issues: Test kms_flip: Subgroup flip-vs-absolute-wf_vblank-interruptible: fail -> PASS (shar

Re: [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference

2018-03-19 Thread Gustavo A. R. Silva
On 03/19/2018 04:23 PM, Chris Wilson wrote: Quoting Gustavo A. R. Silva (2018-03-19 20:50:12) Hi Chris, On 03/19/2018 03:38 PM, Chris Wilson wrote: Quoting Gustavo A. R. Silva (2018-03-19 19:30:53) _workload_ is being dereferenced before it is null checked, hence there is a potential null p

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads

2018-03-19 Thread Chris Wilson
Quoting Yunwei Zhang (2018-03-19 21:50:08) > + /* If more than one slice are enabled, L3Banks should be all enabled > */ > + if (hweight8(sseu->slice_mask) == 1) { if (is_power_of_two(sseu->slice_mask)) -Chris ___ Intel-gfx mailing list Inte

Re: [Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

2018-03-19 Thread Chris Wilson
Quoting Yunwei Zhang (2018-03-19 21:50:07) > WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO > read into Slice/Subslice specific registers, MCR packet control > register(0xFDC) needs to be programmed to point to any enabled > slice/subslice pair. Otherwise, incorrect valu

[Intel-gfx] [PATCH 1/2] drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads

2018-03-19 Thread Yunwei Zhang
WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO read into Slice/Subslice specific registers, MCR packet control register(0xFDC) needs to be programmed to point to any enabled slice/subslice pair. Otherwise, incorrect value will be returned. However, that means each subse

[Intel-gfx] [PATCH 2/2] drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads

2018-03-19 Thread Yunwei Zhang
L3Bank could be fused off in hardware for debug purpose, and it is possible that subslice is enabled while its corresponding L3Bank pairs are disabled. In such case, if MCR packet control register(0xFDC) is programed to point to a disabled bank pair, a MMIO read into L3Bank range will return 0 inst

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reword warning for missing cases (rev2)

2018-03-19 Thread Lucas De Marchi
CCing checkpatch maintainers On Mon, Mar 19, 2018 at 06:36:16PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Reword warning for missing cases (rev2) > URL : https://patchwork.freedesktop.org/series/39821/ > State : warning > > == Summary == > > $ dim checkpatch origin/

Re: [Intel-gfx] [PATCH v2] drm/i915: Reword warning for missing cases

2018-03-19 Thread Chris Wilson
Quoting Lucas De Marchi (2018-03-19 17:37:20) > In some places we end up converting switch statements to a series of > if/else, particularly when introducing helper functions to handle a > group of cases. It's tempting to either leave a wrong warning (since now > we don't have a switch case anymore

Re: [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference

2018-03-19 Thread Gustavo A. R. Silva
Hi Chris, On 03/19/2018 03:38 PM, Chris Wilson wrote: Quoting Gustavo A. R. Silva (2018-03-19 19:30:53) _workload_ is being dereferenced before it is null checked, hence there is a potential null pointer dereference. Fix this by moving the pointer dereference after _workload_ has been null che

Re: [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference

2018-03-19 Thread Chris Wilson
Quoting Gustavo A. R. Silva (2018-03-19 20:50:12) > Hi Chris, > > On 03/19/2018 03:38 PM, Chris Wilson wrote: > > Quoting Gustavo A. R. Silva (2018-03-19 19:30:53) > >> _workload_ is being dereferenced before it is null checked, hence > >> there is a potential null pointer dereference. > >> > >> F

Re: [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Promote .format_mod_supported() to the lead role

2018-03-19 Thread Ville Syrjälä
On Mon, Mar 19, 2018 at 09:17:16PM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: Promote .format_mod_supported() to the lead role > URL : https://patchwork.freedesktop.org/series/40207/ > State : warning > > == Summary == > > Possible new issues: > > Test kms_vblan

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Promote .format_mod_supported() to the lead role

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Promote .format_mod_supported() to the lead role URL : https://patchwork.freedesktop.org/series/40207/ State : warning == Summary == Possible new issues: Test kms_vblank: Subgroup pipe-a-ts-continuation-suspend: pass ->

Re: [Intel-gfx] [PATCH i-g-t 4/5] tests/perf_pmu: Add tests for engine queued/runnable/running stats

2018-03-19 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-03-19 18:22:04) > From: Tvrtko Ursulin > > Simple tests to check reported queue depths are correct. > > Signed-off-by: Tvrtko Ursulin > --- > tests/perf_pmu.c | 224 > +++ > 1 file changed, 224 insertions(+) > >

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [v3,1/3] drm/i915/guc: Unify naming of private GuC action functions

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [v3,1/3] drm/i915/guc: Unify naming of private GuC action functions URL : https://patchwork.freedesktop.org/series/40204/ State : warning == Summary == Possible new issues: Test drv_suspend: Subgroup forcewake: pa

Re: [Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference

2018-03-19 Thread Chris Wilson
Quoting Gustavo A. R. Silva (2018-03-19 19:30:53) > _workload_ is being dereferenced before it is null checked, hence > there is a potential null pointer dereference. > > Fix this by moving the pointer dereference after _workload_ has > been null checked. The checks are misleading and not require

Re: [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible

2018-03-19 Thread Jani Nikula
On Mon, 19 Mar 2018, Matthew Auld wrote: > On 19 March 2018 at 18:17, Chris Wilson wrote: >> Quoting Matthew Auld (2018-03-19 18:08:54) >>> GEM_WARN_ON() was originally intended to be used only as: >>> >>>if (GEM_WARN_ON(expr)) >>> ... >>> >>> but it just so happens to also work as si

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable some extra clang warnings (rev2)

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Disable some extra clang warnings (rev2) URL : https://patchwork.freedesktop.org/series/40145/ State : success == Summary == Series 40145v2 drm/i915: Disable some extra clang warnings https://patchwork.freedesktop.org/api/1.0/series/40145/revisions/2/mbox

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Disable some extra clang warnings (rev2)

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Disable some extra clang warnings (rev2) URL : https://patchwork.freedesktop.org/series/40145/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Disable some extra clang warnings - +drivers/gpu/drm/i915/gvt/gtt.c:661:9:expect

[Intel-gfx] ✗ Fi.CI.BAT: failure for Queued/runnable/running engine stats (rev3)

2018-03-19 Thread Patchwork
== Series Details == Series: Queued/runnable/running engine stats (rev3) URL : https://patchwork.freedesktop.org/series/36926/ State : failure == Summary == Series 36926v3 Queued/runnable/running engine stats https://patchwork.freedesktop.org/api/1.0/series/36926/revisions/3/mbox/ Possib

[Intel-gfx] [PATCH] drm/i915/gvt/scheduler: fix potential NULL pointer dereference

2018-03-19 Thread Gustavo A. R. Silva
_workload_ is being dereferenced before it is null checked, hence there is a potential null pointer dereference. Fix this by moving the pointer dereference after _workload_ has been null checked. Addresses-Coverity-ID: 1430136 ("Dereference before null check") Fixes: fa3dd623e559 ("drm/i915/gvt:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: make GEM_WARN_ON less terrible

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: make GEM_WARN_ON less terrible URL : https://patchwork.freedesktop.org/series/40215/ State : success == Summary == Series 40215v1 drm/i915: make GEM_WARN_ON less terrible https://patchwork.freedesktop.org/api/1.0/series/40215/revisions/1/mbox/ Known

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/3] drm/i915/guc: Unify naming of private GuC action functions

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915/guc: Unify naming of private GuC action functions URL : https://patchwork.freedesktop.org/series/40190/ State : success == Summary == Possible new issues: Test pm_rc6_residency: Subgroup rc6-accuracy:

Re: [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible

2018-03-19 Thread Matthew Auld
On 19 March 2018 at 18:17, Chris Wilson wrote: > Quoting Matthew Auld (2018-03-19 18:08:54) >> GEM_WARN_ON() was originally intended to be used only as: >> >>if (GEM_WARN_ON(expr)) >> ... >> >> but it just so happens to also work as simply: >> >>GEM_WARN_ON(expr); >> >> since it ju

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: make GEM_WARN_ON less terrible

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: make GEM_WARN_ON less terrible URL : https://patchwork.freedesktop.org/series/40215/ State : warning == Summary == $ dim checkpatch origin/drm-tip 09aaab021f8c drm/i915: make GEM_WARN_ON less terrible -:32: ERROR:SPACING: space required after that ';' (ct

[Intel-gfx] [PATCH v2] drm/i915: Disable some extra clang warnings

2018-03-19 Thread Matthias Kaehlcke
Commit 39bf4de89ff7 ("drm/i915: Add -Wall -Wextra to our build, set warnings to full") enabled extra warnings for i915 to spot possible bugs in new code, and then disabled a subset of these warnings to keep the current code building without warnings (with gcc). Enabling the extra warnings also enab

Re: [Intel-gfx] [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4

2018-03-19 Thread Jani Nikula
On Fri, 16 Mar 2018, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheeme from 8 > bits to 7 in DPCD 0x000e. The 8th bit is used to identify extended > receiver capabilities. For panels that use this new feature wait interval >

Re: [Intel-gfx] [PATCH] drm/i915: make edp optimize config

2018-03-19 Thread Jani Nikula
On Fri, 16 Mar 2018, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > Previously it was assumed that eDP panels would advertise the lowest link > rate required for their singular mode to function. With the introduction > of more advanced features there are advantages to a panel advertisin

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Reword warning for missing cases (rev2)

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Reword warning for missing cases (rev2) URL : https://patchwork.freedesktop.org/series/39821/ State : failure == Summary == Series 39821v2 drm/i915: Reword warning for missing cases https://patchwork.freedesktop.org/api/1.0/series/39821/revisions/2/mbox/

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: fix spelling mistake: "registeration" -> "registration"

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915/gvt: fix spelling mistake: "registeration" -> "registration" URL : https://patchwork.freedesktop.org/series/40185/ State : success == Summary == Known issues: Test kms_flip: Subgroup 2x-flip-vs-expired-vblank-interruptible: pa

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Reword warning for missing cases (rev2)

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Reword warning for missing cases (rev2) URL : https://patchwork.freedesktop.org/series/39821/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7cb94d2c3c47 drm/i915: Reword warning for missing cases -:40: CHECK:MACRO_ARG_REUSE: Macro argument

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Promote .format_mod_supported() to the lead role

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Promote .format_mod_supported() to the lead role URL : https://patchwork.freedesktop.org/series/40207/ State : success == Summary == Series 40207v1 drm/i915: Promote .format_mod_supported() to the lead role https://patchwork.freedesktop.org/api/1.0/series

[Intel-gfx] [PATCH i-g-t 2/5] intel-gpu-overlay: Add engine queue stats

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Use new PMU engine queue stats (queued, runnable and running) and display them per engine. v2: * Compact per engine stats. (Chris Wilson) Signed-off-by: Tvrtko Ursulin --- overlay/gpu-top.c | 42 ++ overlay/gpu-top.h | 11 +

[Intel-gfx] [PATCH i-g-t 5/5] tests/i915_query: Engine queues tests

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin ... Signed-off-by: Tvrtko Ursulin --- tests/i915_query.c | 381 + 1 file changed, 381 insertions(+) diff --git a/tests/i915_query.c b/tests/i915_query.c index c7de8cbd8371..94e7a3297ebd 100644 --- a/tests/i915_query.c ++

[Intel-gfx] [PATCH i-g-t 3/5] intel-gpu-overlay: Show 1s, 30s and 15m GPU load

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Show total GPU loads in the window banner. Engine load is defined as total of runnable and running requests on an engine. Total, non-normalized, load is display. In other words if N engines are busy with exactly one request, the load will be shown as N. v2: * Different fl

[Intel-gfx] [PATCH i-g-t 1/5] include: i915 uAPI headers

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Temporary up to date uAPI headers. Signed-off-by: Tvrtko Ursulin --- include/drm-uapi/i915_drm.h | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index 16e452aa12d4..14c7e790f6

[Intel-gfx] [PATCH i-g-t 0/5] Queued/runnable/running engine stats

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin IGT patches for the identicaly named i915 series, including: * Engine queue depths for intel-gpu-overlay (including load average). * Tests for new PMU counters. * Tests for the query API. Tests have been tested (!) only on Skylake so YMMV. Also they depend on one yet unm

[Intel-gfx] [PATCH i-g-t 4/5] tests/perf_pmu: Add tests for engine queued/runnable/running stats

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Simple tests to check reported queue depths are correct. Signed-off-by: Tvrtko Ursulin --- tests/perf_pmu.c | 224 +++ 1 file changed, 224 insertions(+) diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c index 469b9becdbac

Re: [Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible

2018-03-19 Thread Chris Wilson
Quoting Matthew Auld (2018-03-19 18:08:54) > GEM_WARN_ON() was originally intended to be used only as: > >if (GEM_WARN_ON(expr)) > ... > > but it just so happens to also work as simply: > >GEM_WARN_ON(expr); > > since it just wraps WARN_ON, which is a little misleading since for

[Intel-gfx] [PATCH 3/7] drm/i915: Keep a count of requests submitted from userspace

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a count of requests submitted from userspace and not yet runnable due unresolved dependencies. v2: Rename and move under the container struct. (Chris Wilson) v3: Rebase. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_request.c | 3 +++ drivers/gpu/dr

[Intel-gfx] [PATCH 4/7] drm/i915/pmu: Add queued counter

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin We add a PMU counter to expose the number of requests which have been submitted from userspace but are not yet runnable due dependencies and unsignaled fences. This is useful to analyze the overall load of the system. v2: * Rebase for name change and re-order. * Drop floa

[Intel-gfx] [PATCH 6/7] drm/i915/pmu: Add running counter

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin We add a PMU counter to expose the number of requests currently executing on the GPU. This is useful to analyze the overall load of the system. v2: * Rebase. * Drop floating point constant. (Chris Wilson) v3: * Change scale to 1024 for faster arithmetics. (Chris Wilson)

[Intel-gfx] [PATCH 7/7] drm/i915: Engine queues query

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin As well as exposing active requests on engines via PMU, we can also export the current raw values (as tracked by i915 command submission) via a dedicated query. This is to satisfy customers who have userspace load balancing solutions implemented on top of their custom kernel

[Intel-gfx] [PATCH 5/7] drm/i915/pmu: Add runnable counter

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin We add a PMU counter to expose the number of requests with resolved dependencies waiting for a slot on the GPU to run. This is useful to analyze the overall load of the system. v2: Don't limit to gen8+. v3: * Rebase for dynamic sysfs. * Drop currently executing requests.

[Intel-gfx] [PATCH 2/7] drm/i915: Keep a count of requests waiting for a slot on GPU

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. v2: * Move queued increment from insert_request to execlist_submit_request to avoid bumping when re-ordering for priority. * Support the counter on the ringbuffer submission path as well, albeit ju

[Intel-gfx] [PATCH 1/7] drm/i915/pmu: Fix enable count array size and bounds checking

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Enable count array is supposed to have one counter for each possible engine sampler. As such array sizing and bounds checking is not correct when more engine samplers are added. At the same time tidy the assert for readability and robustness. Signed-off-by: Tvrtko Ursulin

[Intel-gfx] [PATCH v4 0/7] Queued/runnable/running engine stats

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Per-engine queue depths are an interesting metric for analyzing the system load and also for users who wish to use it to load balance their submissions based on it. In this version I have split the metrics into three separate counters: 1. QUEUED - From execbuf time to reque

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Promote .format_mod_supported() to the lead role

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915: Promote .format_mod_supported() to the lead role URL : https://patchwork.freedesktop.org/series/40207/ State : warning == Summary == $ dim checkpatch origin/drm-tip bd9ae7d6edf8 drm/i915: Promote .format_mod_supported() to the lead role -:19: WARNING:COMM

[Intel-gfx] [PATCH] drm/i915: make GEM_WARN_ON less terrible

2018-03-19 Thread Matthew Auld
GEM_WARN_ON() was originally intended to be used only as: if (GEM_WARN_ON(expr)) ... but it just so happens to also work as simply: GEM_WARN_ON(expr); since it just wraps WARN_ON, which is a little misleading since for !DRM_I915_DEBUG_GEM builds the second case will actually break

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/guc: Unify naming of private GuC action functions

2018-03-19 Thread Patchwork
== Series Details == Series: series starting with [v3,1/3] drm/i915/guc: Unify naming of private GuC action functions URL : https://patchwork.freedesktop.org/series/40204/ State : success == Summary == Series 40204v1 series starting with [v3,1/3] drm/i915/guc: Unify naming of private GuC act

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915/guc: Handle GuC log flush event in dedicated function

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915/guc: Handle GuC log flush event in dedicated function URL : https://patchwork.freedesktop.org/series/40183/ State : warning == Summary == Possible new issues: Test kms_atomic_transition: Subgroup plane-all-modeset-transition:

[Intel-gfx] [PATCH v2] drm/i915: Reword warning for missing cases

2018-03-19 Thread Lucas De Marchi
In some places we end up converting switch statements to a series of if/else, particularly when introducing helper functions to handle a group of cases. It's tempting to either leave a wrong warning (since now we don't have a switch case anymore) or to convert to WARN(1, ...), but we can just provi

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm: Restore planes after load detection

2018-03-19 Thread Patchwork
== Series Details == Series: drm: Restore planes after load detection URL : https://patchwork.freedesktop.org/series/40201/ State : warning == Summary == Series 40201v1 drm: Restore planes after load detection https://patchwork.freedesktop.org/api/1.0/series/40201/revisions/1/mbox/ Possi

Re: [Intel-gfx] [PATCH] drm: Restore planes after load detection

2018-03-19 Thread Maarten Lankhorst
Op 19-03-18 om 16:39 schreef Ville Syrjala: > From: Ville Syrjälä > > Actually turn the planes back on after were done with > the load detection. > > Fixes: 20bdc112bbe4 ("drm/i915: Disable all planes for load detection, v2.") > Cc: Maarten Lankhorst > Cc: Daniel Vetter > Signed-off-by: Ville Sy

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/guc: Drop union guc_log_control

2018-03-19 Thread Michał Winiarski
On Mon, Mar 19, 2018 at 04:20:02PM +, Michal Wajdeczko wrote: > Usually we use shift/mask macros for bit field definitions. > Union guc_log_control was not following that pattern. > > Additional bonus: > > add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-25 (-25) > Function

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Trim error mask to known engines

2018-03-19 Thread Chris Wilson
Quoting Michel Thierry (2018-03-19 16:31:05) > On 19/03/18 06:12, Chris Wilson wrote: > > Quoting Chris Wilson (2018-03-16 21:49:59) > >> For the convenience of userspace passing in an arbitrary reset mask, > >> remove unknown engines from the set of engines that are to be reset. > >> This means th

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Add control flags to i915_handle_error()

2018-03-19 Thread Chris Wilson
Quoting Michel Thierry (2018-03-19 16:48:01) > On 16/03/18 14:50, Chris Wilson wrote: > > Not all callers want the GPU error to handled in the same way, so expose > > a control parameter. In the first instance, some callers do not want the > > heavyweight error capture so add a bit to request the s

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/guc: Unify parameters of public CT functions

2018-03-19 Thread Patchwork
== Series Details == Series: drm/i915/guc: Unify parameters of public CT functions URL : https://patchwork.freedesktop.org/series/40197/ State : failure == Summary == Series 40197v1 drm/i915/guc: Unify parameters of public CT functions https://patchwork.freedesktop.org/api/1.0/series/40197/rev

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Trim error mask to known engines

2018-03-19 Thread Chris Wilson
Quoting Michel Thierry (2018-03-19 16:31:05) > On 19/03/18 06:12, Chris Wilson wrote: > > Quoting Chris Wilson (2018-03-16 21:49:59) > >> For the convenience of userspace passing in an arbitrary reset mask, > >> remove unknown engines from the set of engines that are to be reset. > >> This means th

[Intel-gfx] [PATCH i-g-t v8] tests/perf_pmu: Improve accuracy by waiting on spinner to start

2018-03-19 Thread Tvrtko Ursulin
From: Tvrtko Ursulin More than one test assumes that the spinner is running pretty much immediately after we have create or submitted it. In actuality there is a variable delay, especially on execlists platforms, between submission and spin batch starting to run on the hardware. To enable tests

[Intel-gfx] [PATCH libdrm 1/1] intel: allocate the requested size when reuse is disabled

2018-03-19 Thread James Xiong
From: "Xiong, James" 1) fixed a bug: a bucket size instead of the requested was allocated even when reuse is disabled. 2) set bo_reuse explicitly Signed-off-by: Xiong, James --- intel/intel_bufmgr_gem.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/intel/intel_bufmgr

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