== Series Details ==
Series: series starting with [1/2] drm/i915: Add enum aux_ch and clean up the
aux init to use it (rev3)
URL : https://patchwork.freedesktop.org/series/38744/
State : success
== Summary ==
Test kms_flip:
Subgroup 2x-plain-flip-fb-recreate-interruptible:
== Series Details ==
Series: series starting with [1/4] drm/uapi: The ctm matrix uses sign-magnitude
representation
URL : https://patchwork.freedesktop.org/series/38811/
State : warning
== Summary ==
Test kms_flip:
Subgroup flip-vs-wf_vblank-interruptible:
pass -
== Series Details ==
Series: series starting with [1/8] drm/i915: Use the correct power domain for
aux ch (rev3)
URL : https://patchwork.freedesktop.org/series/38802/
State : warning
== Summary ==
Test kms_flip_tiling:
Subgroup flip-to-yf-tiled:
fail -> PASS
== Series Details ==
Series: series starting with [1/2] drm/i915: Add enum aux_ch and clean up the
aux init to use it (rev2)
URL : https://patchwork.freedesktop.org/series/38744/
State : failure
== Summary ==
Test gem_eio:
Subgroup in-flight-contexts:
pass -> INC
== Series Details ==
Series: drm/i915: Disable SAGV on pre plane update.
URL : https://patchwork.freedesktop.org/series/38806/
State : failure
== Summary ==
Test kms_flip_tiling:
Subgroup flip-to-yf-tiled:
fail -> PASS (shard-apl) fdo#103822
Test kms_frontbu
> -Original Message-
> From: Juha-Pekka Heikkila [mailto:juhapekka.heikk...@gmail.com]
> Sent: Thursday, February 22, 2018 7:06 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 13/16] drm/i915: Add NV12 as supported
> format for primary plan
Hi Oscar,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20180222]
[cannot apply to v4.16-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url
== Series Details ==
Series: series starting with [1/8] drm/i915: Use the correct power domain for
aux ch
URL : https://patchwork.freedesktop.org/series/38802/
State : warning
== Summary ==
Test drv_suspend:
Subgroup forcewake:
pass -> SKIP (shard-snb)
Test
Hi Oscar,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20180222]
[cannot apply to v4.16-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url
On Wed, 2018-02-14 at 08:03 -0800, Rodrigo Vivi wrote:
> We can still use PSR1 when PSR2 conditions are not met.
>
> So, let's split the check in a way that we make sure has_psr
> gets set independently of PSR2 criteria.
>
> v2: Duh! Handle proper return to avoid breaking PSR2.
>
> Cc: Dhinakara
On Wed, 2018-02-21 at 14:28 -0800, Rodrigo Vivi wrote:
> On Wed, Feb 21, 2018 at 01:12:08PM -0800, Souza, Jose wrote:
> > On Wed, 2018-02-21 at 12:45 -0800, Rodrigo Vivi wrote:
> > > On Tue, Feb 20, 2018 at 06:23:47PM -0800, José Roberto de Souza
> > > wrote:
> > > > When PSR/PSR2/GTC is enabled ha
On Tue, 2018-02-13 at 16:29 -0800, Rodrigo Vivi wrote:
> According to spec:
> "PSR2 is supported for pipe active sizes up to
> 3640 pixels wide and 2304 lines tall."
>
> BSpec: 7713
>
> Cc: Dhinakaran Pandiyan
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_psr.c | 6 +++---
>
== Series Details ==
Series: drm/i915: expose RCS topology to userspace
URL : https://patchwork.freedesktop.org/series/38801/
State : failure
== Summary ==
Test kms_flip:
Subgroup modeset-vs-vblank-race-interruptible:
fail -> PASS (shard-hsw) fdo#103060
== Series Details ==
Series: series starting with [1/2] drm/i915: Add enum aux_ch and clean up the
aux init to use it (rev3)
URL : https://patchwork.freedesktop.org/series/38744/
State : success
== Summary ==
Series 38744v3 series starting with [1/2] drm/i915: Add enum aux_ch and clean
up th
PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
for AUX-A enables DC_OFF well too. This is not required, so add a new
AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX
channels re-use the existing AUX domains.
v4: Reword comment (Rodrigo and Ville
Daniel Vetter writes:
> Bunch of neat improvements:
>
> - xml generates correctly depend upon the test binaries
> - no need to re-run autogen.sh when new chapters/functions get added,
> all handed by meson
I just rebased on top of this commit, and now my cross build takes 5
minutes as my skyla
== Series Details ==
Series: drm/i915: Update missing parts after the rename to i915_request
URL : https://patchwork.freedesktop.org/series/38794/
State : success
== Summary ==
Test kms_flip:
Subgroup 2x-flip-vs-wf_vblank-interruptible:
pass -> FAIL (shard-h
On Fri, Feb 23, 2018 at 12:58:44AM +0200, Pandiyan, Dhinakaran wrote:
> On Fri, 2018-02-23 at 00:42 +0200, Imre Deak wrote:
> > On Fri, Feb 23, 2018 at 12:30:14AM +0200, Pandiyan, Dhinakaran wrote:
> > > On Fri, 2018-02-23 at 00:05 +0200, Imre Deak wrote:
> > > > On Thu, Feb 22, 2018 at 11:53:30PM
On 2/21/2018 10:17 PM, Sagar Arun Kamble wrote:
Looks good to me. Few cosmetic changes suggested below. With those
addressed:
Reviewed-by: Sagar Arun Kamble
On 2/22/2018 5:05 AM, Oscar Mateo wrote:
In Gen11, the Video Decode engines (aka VDBOX, aka VCS, aka BSD) and the
Video Enhancement en
On Fri, 2018-02-23 at 00:42 +0200, Imre Deak wrote:
> On Fri, Feb 23, 2018 at 12:30:14AM +0200, Pandiyan, Dhinakaran wrote:
> > On Fri, 2018-02-23 at 00:05 +0200, Imre Deak wrote:
> > > On Thu, Feb 22, 2018 at 11:53:30PM +0200, Imre Deak wrote:
> > > > On Thu, Feb 22, 2018 at 11:33:10PM +0200, Pand
On Thu, Feb 22, 2018 at 10:10:24PM +, Pandiyan, Dhinakaran wrote:
>
>
> On Thu, 2018-02-22 at 23:47 +0200, Ville Syrjälä wrote:
> > On Thu, Feb 22, 2018 at 09:33:10PM +, Pandiyan, Dhinakaran wrote:
> > >
> > >
> > >
> > > On Thu, 2018-02-22 at 12:44 -0800, Rodrigo Vivi wrote:
> > > > O
On Fri, Feb 23, 2018 at 12:30:14AM +0200, Pandiyan, Dhinakaran wrote:
> On Fri, 2018-02-23 at 00:05 +0200, Imre Deak wrote:
> > On Thu, Feb 22, 2018 at 11:53:30PM +0200, Imre Deak wrote:
> > > On Thu, Feb 22, 2018 at 11:33:10PM +0200, Pandiyan, Dhinakaran wrote:
> > > >
> > > >
> > > >
> > > > O
On Fri, 2018-02-23 at 00:05 +0200, Imre Deak wrote:
> On Thu, Feb 22, 2018 at 11:53:30PM +0200, Imre Deak wrote:
> > On Thu, Feb 22, 2018 at 11:33:10PM +0200, Pandiyan, Dhinakaran wrote:
> > >
> > >
> > >
> > > On Thu, 2018-02-22 at 12:44 -0800, Rodrigo Vivi wrote:
> > > > On Thu, Feb 22, 2018 a
== Series Details ==
Series: series starting with [1/4] drm/uapi: The ctm matrix uses sign-magnitude
representation
URL : https://patchwork.freedesktop.org/series/38811/
State : success
== Summary ==
Series 38811v1 series starting with [1/4] drm/uapi: The ctm matrix uses
sign-magnitude repre
On Thu, 2018-02-22 at 23:47 +0200, Ville Syrjälä wrote:
> On Thu, Feb 22, 2018 at 09:33:10PM +, Pandiyan, Dhinakaran wrote:
> >
> >
> >
> > On Thu, 2018-02-22 at 12:44 -0800, Rodrigo Vivi wrote:
> > > On Thu, Feb 22, 2018 at 12:28:50PM -0800, Dhinakaran Pandiyan wrote:
> > > > PSR on CNL r
On Thu, Feb 22, 2018 at 11:53:30PM +0200, Imre Deak wrote:
> On Thu, Feb 22, 2018 at 11:33:10PM +0200, Pandiyan, Dhinakaran wrote:
> >
> >
> >
> > On Thu, 2018-02-22 at 12:44 -0800, Rodrigo Vivi wrote:
> > > On Thu, Feb 22, 2018 at 12:28:50PM -0800, Dhinakaran Pandiyan wrote:
> > > > PSR on CNL
== Series Details ==
Series: series starting with [1/8] drm/i915: Use the correct power domain for
aux ch (rev3)
URL : https://patchwork.freedesktop.org/series/38802/
State : success
== Summary ==
Series 38802v3 series starting with [1/8] drm/i915: Use the correct power
domain for aux ch
htt
On Thu, Feb 22, 2018 at 11:33:10PM +0200, Pandiyan, Dhinakaran wrote:
>
>
>
> On Thu, 2018-02-22 at 12:44 -0800, Rodrigo Vivi wrote:
> > On Thu, Feb 22, 2018 at 12:28:50PM -0800, Dhinakaran Pandiyan wrote:
> > > PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
> > > for
On Thu, Feb 22, 2018 at 09:33:10PM +, Pandiyan, Dhinakaran wrote:
>
>
>
> On Thu, 2018-02-22 at 12:44 -0800, Rodrigo Vivi wrote:
> > On Thu, Feb 22, 2018 at 12:28:50PM -0800, Dhinakaran Pandiyan wrote:
> > > PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
> > > for
On 22/02/18 11:28, Daniele Ceraolo Spurio wrote:
On 22/02/18 10:45, Michal Wajdeczko wrote:
Right after GPU reset there will be a small window of time during which
some of GuC/HuC fields will still show state before reset. Let's start
to fix that by sanitizing firmware status as we will use
From: Ville Syrjälä
The documentation for the ctm matrix suggests a two's complement
format, but at least the i915 implementation is using sign-magnitude
instead. And looks like malidp is doing the same. Change the docs
to match the current implementation, and change the type from __s64
to __u64
From: Ville Syrjälä
If we don't have to frob with the user provided ctm matrix there's
no point in copying it over. Just point at the user ctm directly.
Also the matrix gets fully populated by ctm_mult_by_limited() so
no need to zero initialize it.
Cc: Johnson Lin
Cc: Uma Shankar
Cc: Shashank
From: Ville Syrjälä
On pre-HSW we have dedicated hardware for the RGB limited range
handling, and so we don't want to compress with the CSC matrix.
Toss in a FIXME about gamma LUT vs. limited range using the CSC.
Cc: Johnson Lin
Cc: Uma Shankar
Cc: Shashank Sharma
Signed-off-by: Ville Syrjäl
From: Ville Syrjälä
The pipe CSC was introduced by ILK, so change everything related
to use ilk_ as the prefix.
Cc: Johnson Lin
Cc: Uma Shankar
Cc: Shashank Sharma
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_color.c | 39 +++---
1 file changed
On Thu, 2018-02-22 at 12:44 -0800, Rodrigo Vivi wrote:
> On Thu, Feb 22, 2018 at 12:28:50PM -0800, Dhinakaran Pandiyan wrote:
> > PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
> > for AUX-A enables DC_OFF well too. This is not required, so add a new
> > AUX_IO_A doma
On 22/02/18 13:21, Michal Wajdeczko wrote:
On Thu, 22 Feb 2018 21:52:39 +0100, Michel Thierry
wrote:
On 22/02/18 10:45, Michal Wajdeczko wrote:
Right after GPU reset there will be a small window of time during which
some of GuC/HuC fields will still show state before reset. Let's start
to fi
From: Ville Syrjälä
We have two instances of the code to fill out the header for the aux
message. Pull it into a small helper.
v2: Rebase due to txbuf[] changes
Cc: Sean Paul
Cc: Ramalingam C
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 32 -
From: Ville Syrjälä
Let's try to keep the details on the AKSV stuff concentrated
in one place. So move the control bit and +5 data size handling
there.
v2: Increase txbuf[] to include the payload which intel_dp_aux_xfer()
will still load into the registers even though the hardware
will i
Quoting Antonio Argenziano (2018-02-22 21:24:31)
>
>
> On 22/02/18 00:50, Chris Wilson wrote:
> > __igt_spin_batch_new() may be used inside a background helper which is
> > competing against the GPU being reset. As such, we cannot even assert
> > that the spin->handle is busy immediately after su
On 22/02/18 00:50, Chris Wilson wrote:
__igt_spin_batch_new() may be used inside a background helper which is
competing against the GPU being reset. As such, we cannot even assert
that the spin->handle is busy immediately after submission as it may
have already been reset by another client writ
== Series Details ==
Series: series starting with [1/2] drm/i915: Add enum aux_ch and clean up the
aux init to use it (rev2)
URL : https://patchwork.freedesktop.org/series/38744/
State : success
== Summary ==
Series 38744v2 series starting with [1/2] drm/i915: Add enum aux_ch and clean
up th
On Thu, 22 Feb 2018 21:52:39 +0100, Michel Thierry
wrote:
On 22/02/18 10:45, Michal Wajdeczko wrote:
Right after GPU reset there will be a small window of time during which
some of GuC/HuC fields will still show state before reset. Let's start
to fix that by sanitizing firmware status as we
On Thu, Feb 22, 2018 at 08:10:35PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Let's try to keep the details on the AKSV stuff concentrated
> in one place. So move the control bit and +5 data size handling
> there.
>
> Cc: Sean Paul
> Cc: Ramalingam C
> Signed-off-by: Ville Syrjälä
== Series Details ==
Series: drm: Add generic fbdev emulation (rev3)
URL : https://patchwork.freedesktop.org/series/35873/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK i
== Series Details ==
Series: extend PWM framework to support PWM modes
URL : https://patchwork.freedesktop.org/series/38809/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK
== Series Details ==
Series: drm/i915/cnl: Add WaRsDisableCoarsePowerGating
URL : https://patchwork.freedesktop.org/series/38807/
State : failure
== Summary ==
Series 38807v1 drm/i915/cnl: Add WaRsDisableCoarsePowerGating
https://patchwork.freedesktop.org/api/1.0/series/38807/revisions/1/mbox/
On 22.02.2018 19:28, Andy Shevchenko wrote:
> On Thu, Feb 22, 2018 at 2:01 PM, Claudiu Beznea
> wrote:
>> Add PWM normal and complementary modes.
>
>> +- PWM_DTMODE_COMPLEMENTARY: PWM complementary working mode (for PWM
>> +channels two outputs); if not specified, the default for PWM channel wi
This adds an API for writing in-kernel clients.
TODO:
- Flesh out and complete documentation.
- Cloned displays is not tested.
- Complete tiled display support and test it.
- Test plug/unplug different monitors.
- A runtime knob to prevent clients from attaching for debugging purposes.
- Maybe a w
On 22/02/18 10:45, Michal Wajdeczko wrote:
Right after GPU reset there will be a small window of time during which
some of GuC/HuC fields will still show state before reset. Let's start
to fix that by sanitizing firmware status as we will use it shortly.
Suggested-by: Daniele Ceraolo Spurio
Sig
Add _ioctl suffix to the remaining ioctl functions so they match up with
the others:
- drm_mode_addfb()
- drm_mode_getfb()
- drm_mode_getplane_res()
- drm_mode_getplane()
- drm_mode_setplane()
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/drm_crtc_internal.h | 20 ++--
driver
On 22.02.2018 14:33, Daniel Thompson wrote:
> On Thu, Feb 22, 2018 at 02:01:16PM +0200, Claudiu Beznea wrote:
>> Add PWM mode to pwm_config() function. The drivers which uses pwm_config()
>> were adapted to this change.
>>
>> Signed-off-by: Claudiu Beznea
>> ---
>> arch/arm/mach-s3c24xx/mach-rx
On Thu, Feb 22, 2018 at 12:25:46PM -0800, Pandiyan, Dhinakaran wrote:
> On Thu, 2018-02-22 at 12:13 -0800, Rodrigo Vivi wrote:
> > On Thu, Feb 22, 2018 at 11:57:03AM -0800, Pandiyan, Dhinakaran wrote:
> > > On Thu, 2018-02-22 at 11:34 -0800, Rodrigo Vivi wrote:
> > > > On Thu, Feb 22, 2018 at 08:59
From: David Herrmann
Rather than doing drm_file allocation/destruction right in the fops, lets
provide separate helpers. This decouples drm_file management from the
still-mandatory drm-fops. It prepares for use of drm_file without the
fops, both by possible separate fops implementations and APIs
Add PWM normal and complementary modes.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/pwm/pwm.txt | 9 +++--
Documentation/pwm.txt | 26 +++---
include/dt-bindings/pwm/pwm.h | 1 +
3 files changed, 31 inserti
On Thu, Feb 22, 2018 at 12:28:50PM -0800, Dhinakaran Pandiyan wrote:
> PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
> for AUX-A enables DC_OFF well too. This is not required, so add a new
> AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX
> cha
This is part 2 of making ioctls useable for in-kernel clients.
Make an ioctl wrapper function that calls a function that can be used by
in-kernel clients.
It adjusts the signature of the following functions:
- drm_mode_getcrtc()
- drm_mode_create_dumb_ioctl()
- drm_mode_destroy_dumb_ioctl()
- drm_
Add push-pull mode support. In push-pull mode the channels' outputs have
same polarities and the edges are complementary delayed for one period.
Signed-off-by: Claudiu Beznea
---
include/linux/pwm.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/linux/pwm.h b
It only makes sense for userspace clients.
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/drm_file.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c
index d4588d33f91c..55505378df47 100644
--- a/dri
This is part 1 of making ioctls useable for in-kernel clients.
Make an ioctl wrapper function that calls a function that can be used by
in-kernel clients.
It adjusts the following functions to handle kernel buffers:
- drm_mode_getresources()
- drm_mode_setcrtc()
- drm_mode_getconnector()
- drm_mod
This patchset explores the possibility of having generic fbdev emulation
in DRM for drivers that supports dumb buffers which they can export.
The change this time is that I have tried to do an in-kernel client API.
The intention was to have callbacks on the drm_file, but I gave up on
that mainly b
== Series Details ==
Series: drm/i915: Disable SAGV on pre plane update.
URL : https://patchwork.freedesktop.org/series/38806/
State : success
== Summary ==
Series 38806v1 drm/i915: Disable SAGV on pre plane update.
https://patchwork.freedesktop.org/api/1.0/series/38806/revisions/1/mbox/
Test
On Thu, 2018-02-22 at 14:43 +0200, Ville Syrjälä wrote:
> On Thu, Feb 22, 2018 at 07:16:07AM +, Pandiyan, Dhinakaran wrote:
> >
> > On Tue, 2018-02-20 at 21:00 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Just store function pointers that give us the correct register
Add a function so the generic fbdev client can check if the framebuffer
does flushing. This is needed to set up deferred I/O.
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/drm_framebuffer.c | 31 +++
include/drm/drm_framebuffer.h | 2 ++
2 files changed, 33 i
Add functions for iterating the registered DRM devices.
This is done looping through the primary minors instead of using an
iter on drm_class which is also a possibility. The reason is that
drm_minor_acquire() takes a ref on the drm_device which is needed.
Another option would be to add a separate
Just a hack to test the client API.
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/client/Kconfig | 5 +
drivers/gpu/drm/client/Makefile| 1 +
drivers/gpu/drm/client/drm_vtcon.c | 760 +
3 files changed, 766 insertions(+)
create mode 100644 dri
Hi all,
Please give feedback on these patches which extends the PWM framework in
order to support multiple PWM modes of operations. This series is a rework
of [1] and [2].
The current patch series add the following PWM modes:
- PWM mode normal
- PWM mode complementary
- PWM mode push-pull
Normal
Add support for PWM push-pull mode. This is only supported by SAMA5D2 SoCs.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atmel.c | 40
1 file changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
in
This adds generic fbdev emulation for drivers that support the
dumb buffer API. No fbdev code is necessary in the driver.
Differences from drm_fb_helper:
- The backing buffer is created when the first fd is opened.
- Supports changing the mode from userspace.
- Doesn't restore on lastclose if ther
Add a way to check if userspace modes are equal. Useful for in-kernel
clients. Also export drm_mode_convert_umode().
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/drm_modes.c | 50 +
include/drm/drm_modes.h | 2 ++
2 files changed, 52 insertio
On Thu, Feb 22, 2018 at 12:55:14AM -0300, Paulo Zanoni wrote:
> From: Dhinakaran Pandiyan
>
> Extend enum hpd_pin to port F so that we can start using this for ICL.
>
> v2: Rebase.
>
> Cc: Rodrigo Vivi
> Cc: Paulo Zanoni
> Signed-off-by: Dhinakaran Pandiyan
Reviewed-by: Rodrigo Vivi
> ---
Just a hack to test the client API.
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/client/Kconfig | 5 +
drivers/gpu/drm/client/Makefile | 1 +
drivers/gpu/drm/client/drm_bootsplash.c | 205
3 files changed, 211 insertions(+)
create mode
PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
for AUX-A enables DC_OFF well too. This is not required, so add a new
AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX
channels re-use the existing AUX domains as they do need power well 2.
v3: Extr
Add documentation for PWM push-pull mode.
Signed-off-by: Claudiu Beznea
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pwm/pwm.txt | 2 ++
Documentation/pwm.txt | 16
include/dt-bindings/pwm/pwm.h | 1 +
3 files changed,
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-clps711x.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-clps711x.c b/drivers/pwm/pwm-clps711x.c
index 26ec24e457b1..2a4
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-pxa.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/pwm/pwm-pxa.c b/drivers/pwm/pwm-pxa.c
index 4143a46684d2..7a035716e054 100644
--- a/drivers/pwm/pwm-p
Add pwm capabilities for Atmel/Microchip PWM controllers.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atmel.c | 80 -
1 file changed, 52 insertions(+), 28 deletions(-)
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
index 530d
On Thu, Feb 22, 2018 at 02:01:16PM +0200, Claudiu Beznea wrote:
> Add PWM mode to pwm_config() function. The drivers which uses pwm_config()
> were adapted to this change.
>
> Signed-off-by: Claudiu Beznea
> ---
-snip-
> diff --git a/drivers/media/rc/ir-rx51.c b/drivers/media/rc/ir-rx51.c
> ind
Add basic PWM modes: normal and complementary. These modes should
differentiate the single output PWM channels from two outputs PWM
channels. These modes could be set as follow:
1. PWM channels with one output per channel:
- normal mode
2. PWM channels with two outputs per channel:
- normal mode
-
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-cros-ec.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/pwm/pwm-cros-ec.c b/drivers/pwm/pwm-cros-ec.c
index 9c13694eaa24..e54954c13323 100644
--- a/drive
Add PWM mode to pwm_config() function. The drivers which uses pwm_config()
were adapted to this change.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-s3c24xx/mach-rx1950.c | 11 +--
drivers/bus/ts-nbus.c| 2 +-
drivers/clk/clk-pwm.c| 3 ++-
drivers/gp
On 22.02.2018 15:01, Sean Young wrote:
> On Thu, Feb 22, 2018 at 02:01:16PM +0200, Claudiu Beznea wrote:
>> Add PWM mode to pwm_config() function. The drivers which uses pwm_config()
>> were adapted to this change.
>>
>> Signed-off-by: Claudiu Beznea
>> ---
>
> -snip-
>
>> diff --git a/drivers
On Thu, 2018-02-22 at 12:13 -0800, Rodrigo Vivi wrote:
> On Thu, Feb 22, 2018 at 11:57:03AM -0800, Pandiyan, Dhinakaran wrote:
> > On Thu, 2018-02-22 at 11:34 -0800, Rodrigo Vivi wrote:
> > > On Thu, Feb 22, 2018 at 08:59:49PM +0200, Ville Syrjälä wrote:
> > > > On Tue, Feb 20, 2018 at 06:23:47PM -
On Thu, Feb 22, 2018 at 11:57:03AM -0800, Pandiyan, Dhinakaran wrote:
> On Thu, 2018-02-22 at 11:34 -0800, Rodrigo Vivi wrote:
> > On Thu, Feb 22, 2018 at 08:59:49PM +0200, Ville Syrjälä wrote:
> > > On Tue, Feb 20, 2018 at 06:23:47PM -0800, José Roberto de Souza wrote:
> > > > When PSR/PSR2/GTC is
On Thu, Feb 22, 2018 at 10:00:47PM +0200, Ville Syrjälä wrote:
> On Thu, Feb 22, 2018 at 11:28:58AM -0800, Rodrigo Vivi wrote:
> > According to Spec "Requirement before plane enabling or
> > configuration change: Disable SAGV if any enabled plane will not
> > be able to enable watermarks for memory
Old Wa added now forever on CNL all steppings.
With CPU P states enabled along with RC6, dispatcher
hangs can happen.
Cc: Rafael Antognolli
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_drv.h | 5 +++--
drivers/gpu/drm/i915/intel_guc.c | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 2
On Thu, Feb 22, 2018 at 11:28:58AM -0800, Rodrigo Vivi wrote:
> According to Spec "Requirement before plane enabling or
> configuration change: Disable SAGV if any enabled plane will not
> be able to enable watermarks for memory latency >= SAGV block
> time, or any transcoder is interlaced. Else, e
On Thu, 2018-02-22 at 11:34 -0800, Rodrigo Vivi wrote:
> On Thu, Feb 22, 2018 at 08:59:49PM +0200, Ville Syrjälä wrote:
> > On Tue, Feb 20, 2018 at 06:23:47PM -0800, José Roberto de Souza wrote:
> > > When PSR/PSR2/GTC is enabled hardware can do AUX transactions by it
> > > self, so lets use the mu
== Series Details ==
Series: drm/i915/preemption: Allow preemption between submission ports (rev2)
URL : https://patchwork.freedesktop.org/series/38774/
State : success
== Summary ==
Test gem_eio:
Subgroup in-flight-contexts:
incomplete -> PASS (shard-apl) fdo#104
== Series Details ==
Series: series starting with [1/8] drm/i915: Use the correct power domain for
aux ch
URL : https://patchwork.freedesktop.org/series/38802/
State : success
== Summary ==
Series 38802v1 series starting with [1/8] drm/i915: Use the correct power
domain for aux ch
https://pa
On Thu, Feb 22, 2018 at 08:59:49PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 20, 2018 at 06:23:47PM -0800, José Roberto de Souza wrote:
> > When PSR/PSR2/GTC is enabled hardware can do AUX transactions by it
> > self, so lets use the mutex register that is available in gen9+ to
> > avoid concurrent
According to Spec "Requirement before plane enabling or
configuration change: Disable SAGV if any enabled plane will not
be able to enable watermarks for memory latency >= SAGV block
time, or any transcoder is interlaced. Else, enable SAGV."
Currently we are only enabling and disabling SAGV on ful
On 22/02/18 10:45, Michal Wajdeczko wrote:
Right after GPU reset there will be a small window of time during which
some of GuC/HuC fields will still show state before reset. Let's start
to fix that by sanitizing firmware status as we will use it shortly.
Suggested-by: Daniele Ceraolo Spurio
S
I forgot to add the series that require this change in Mesa :
https://patchwork.freedesktop.org/series/38795/
On 22/02/18 17:53, Lionel Landwerlin wrote:
Hi all,
This iteration has 2 main changes :
- Joonas wanted to have stride fields into the
drm_i915_query_topology_info, so the layou
Right after GPU reset there will be a small window of time during which
some of GuC/HuC fields will still show state before reset. Let's start
to fix that by sanitizing firmware status as we will use it shortly.
Suggested-by: Daniele Ceraolo Spurio
Signed-off-by: Michal Wajdeczko
Cc: Daniele Cer
On Tue, Feb 20, 2018 at 06:23:47PM -0800, José Roberto de Souza wrote:
> When PSR/PSR2/GTC is enabled hardware can do AUX transactions by it
> self, so lets use the mutex register that is available in gen9+ to
> avoid concurrent access by hardware and driver.
>
> Reference:
> https://01.org/sites
On Wed, Feb 21, 2018 at 11:28:56PM -0800, Dhinakaran Pandiyan wrote:
> PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
> for AUX-A enables DC_OFF well too. This is not required, so add a new
> AUX_IO_A domain for AUX-A to allow DC states to remain enabled. Other AUX
> cha
== Series Details ==
Series: series starting with [1/8] drm/i915: Use the correct power domain for
aux ch
URL : https://patchwork.freedesktop.org/series/38802/
State : failure
== Summary ==
Series 38802v1 series starting with [1/8] drm/i915: Use the correct power
domain for aux ch
https://pa
On Thu, Feb 22, 2018 at 12:28:11PM +0200, Imre Deak wrote:
> On Wed, Feb 21, 2018 at 11:28:56PM -0800, Dhinakaran Pandiyan wrote:
> > PSR on CNL requires AUX IO wells to be kept on and the existing AUX domain
> > for AUX-A enables DC_OFF well too. This is not required, so add a new
> > AUX_IO_A dom
== Series Details ==
Series: drm/i915: expose RCS topology to userspace
URL : https://patchwork.freedesktop.org/series/38801/
State : success
== Summary ==
Series 38801v1 drm/i915: expose RCS topology to userspace
https://patchwork.freedesktop.org/api/1.0/series/38801/revisions/1/mbox/
Test g
From: Ville Syrjälä
Collect all the aux ch vfunc assignments into intel_dp_aux_init()
instead of having it spread around.
Reviewed-by: Chris Wilson
Reviewed-by: Rodrigo Vivi
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 53 +++--
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