== Series Details ==
Series: series starting with [1/2] lib/igt_aux: Add function to swap int64 in
array
URL : https://patchwork.freedesktop.org/series/38466/
State : success
== Summary ==
Test kms_rotation_crc:
Subgroup primary-rotation-180:
fail -> PASS (
== Series Details ==
Series: drm/i915/cnl: New power domain for AUX IO.
URL : https://patchwork.freedesktop.org/series/38467/
State : failure
== Summary ==
Test drv_selftest:
Subgroup mock_sanitycheck:
pass -> DMESG-FAIL (shard-snb)
Subgroup mock_fence:
On Fri, Feb 16, 2018 at 03:25:55PM -0800, Dhinakaran Pandiyan wrote:
> PSR requires AUX IO well to be kept on and the existing AUX domain
> enables other wells too.
>
Cc: Imre Deak
> Signed-off-by: Dhinakaran Pandiyan
> ---
> drivers/gpu/drm/i915/intel_display.h| 5 +
> drivers/gpu/d
== Series Details ==
Series: series starting with [1/2] lib/igt_aux: Add function to swap int64 in
array
URL : https://patchwork.freedesktop.org/series/38466/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
1aec09098d3c3729ed152aee9ee4e6e656fa7a3f igt/kms_f
== Series Details ==
Series: drm/i915/cnl: New power domain for AUX IO.
URL : https://patchwork.freedesktop.org/series/38467/
State : success
== Summary ==
Series 38467v1 drm/i915/cnl: New power domain for AUX IO.
https://patchwork.freedesktop.org/api/1.0/series/38467/revisions/1/mbox/
Test g
PSR requires AUX IO well to be kept on and the existing AUX domain
enables other wells too.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_display.h| 5 +
drivers/gpu/drm/i915/intel_dp.c | 6 ++
drivers/gpu/drm/i915/intel_drv.h| 1 +
drivers/gpu/
From: Antonio Argenziano
v2: Use igt_swap()
Signed-off-by: Antonio Argenziano
Cc: Chris Wilson
Cc: Michal Winiarski
Reviewed-by: Chris Wilson
---
lib/igt_aux.c | 16
lib/igt_aux.h | 1 +
2 files changed, 17 insertions(+)
diff --git a/lib/igt_aux.c b/lib/igt_aux.c
index 8c
From: Antonio Argenziano
Since commit: drm/i915/scheduler: Support user-defined priorities, the
driver support an extra context param to set context's priority. Add
tests for that interface and update invalid tests.
v2:
- Add arg size validation test. (Chris)
- Add arg value over
On Fri, 2018-02-16 at 08:55 +, Chris Wilson wrote:
> Quoting Dhinakaran Pandiyan (2018-02-16 04:33:21)
> > Preparing a framebuffer should not require a flush. _post_plane_update()
> > takes care of flushing when a flip is scheduled, this should be
> > sufficient for PSR and FBC.
>
> Makes sen
On Fri, 2018-02-16 at 08:52 +, Chris Wilson wrote:
> Quoting Dhinakaran Pandiyan (2018-02-16 04:33:18)
> > i915_gem_obj_pin_to_display() calls frontbuffer_flush with origin set to
> > DIRTYFB. The callers however are at a vantage point to decide if hardware
> > frontbuffer tracking can do the
== Series Details ==
Series: tests/gem_ctx_param: Update invalid param (rev3)
URL : https://patchwork.freedesktop.org/series/35438/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
1aec09098d3c3729ed152aee9ee4e6e656fa7a3f igt/kms_frontbuffer_tracking: Disable
On Fri, 2018-02-16 at 08:58 +, Chris Wilson wrote:
> Quoting Dhinakaran Pandiyan (2018-02-16 04:33:22)
> > With fbdev, screen freezes after a few continuous PSR exit->enter cycles.
> > Printing out the PSR status register clearly showed this freeze coincided
> > with exiting when the hardware i
On Thu, 2018-02-15 at 11:55 -0800, Rodrigo Vivi wrote:
> Dave Airlie writes:
>
> > On 6 February 2018 at 06:32, Rodrigo Vivi wrote:
> >> On Sat, Feb 03, 2018 at 08:14:48AM +, Keith Packard wrote:
> >>> Dhinakaran Pandiyan writes:
> >>>
> >>> > From: "Pandiyan, Dhinakaran"
> >>> >
> >>>
From: Antonio Argenziano
Since commit: drm/i915/scheduler: Support user-defined priorities, the
driver support an extra context param to set context's priority. Add
tests for that interface and update invalid tests.
v2:
- Add arg size validation test. (Chris)
- Add arg value over
== Series Details ==
Series: drm/i915/execlists: Remove too-early assert
URL : https://patchwork.freedesktop.org/series/38443/
State : success
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8059/shards.html
___
I
On Thu, Feb 15, 2018 at 03:43:46PM -0800, Rodrigo Vivi wrote:
> On Thu, Feb 15, 2018 at 04:02:46PM +0200, Jani Nikula wrote:
> > On Thu, 15 Feb 2018, Mahesh Kumar wrote:
> > > Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is
> > > defining it as 0x162ED4. Similarly for CNL_
On 16 February 2018 at 09:00, Chris Wilson wrote:
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
== Series Details ==
Series: drm/i915/hsw: add missing disabled EUs registers reads
URL : https://patchwork.freedesktop.org/series/38441/
State : failure
== Summary ==
Series 38441v1 drm/i915/hsw: add missing disabled EUs registers reads
https://patchwork.freedesktop.org/api/1.0/series/38441/r
Quoting Chris Wilson (2018-02-16 15:32:10)
> We can't assert that the execlists are active before we set the flag. So
> perform the assert after we are expected to have marked the execlists
> active.
>
> Fixes: 339ccd35b42c ("drm/i915: Assert that we always complete a submission
> to guc/execlist
Quoting Patchwork (2018-02-16 16:03:21)
> == Series Details ==
>
> Series: drm/i915/execlists: Remove too-early assert
> URL : https://patchwork.freedesktop.org/series/38443/
> State : success
>
> == Summary ==
>
> Series 38443v1 drm/i915/execlists: Remove too-early assert
> https://patchwork.
== Series Details ==
Series: drm/i915/execlists: Remove too-early assert
URL : https://patchwork.freedesktop.org/series/38443/
State : success
== Summary ==
Series 38443v1 drm/i915/execlists: Remove too-early assert
https://patchwork.freedesktop.org/api/1.0/series/38443/revisions/1/mbox/
Test
We can't assert that the execlists are active before we set the flag. So
perform the assert after we are expected to have marked the execlists
active.
Fixes: 339ccd35b42c ("drm/i915: Assert that we always complete a submission to
guc/execlists")
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
It turns out that HSW has a register that tells us how many EUs are
disabled per half-slice (roughly a similar notion to subslice). We
didn't read those registers so far as most userspace drivers didn't
need those values prior to Gen8, but an internal library would like to
have access to this.
Sin
Quoting Patchwork (2018-02-15 17:00:18)
> == Series Details ==
>
> Series: drm/i915: Assert that we always complete a submission to guc/execlists
> URL : https://patchwork.freedesktop.org/series/38376/
> State : success
>
> == Summary ==
>
> Series 38376v1 drm/i915: Assert that we always compl
== Series Details ==
Series: drm: move read_domains and write_domain into i915 (rev2)
URL : https://patchwork.freedesktop.org/series/38418/
State : success
== Summary ==
Test kms_frontbuffer_tracking:
Subgroup fbc-rgb565-draw-mmap-cpu:
fail -> PASS (shard-ap
On Mon, Nov 27, 2017 at 11:57:46AM -0500, Sinan Kaya wrote:
> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> where a PCI device is present. This restricts the device drivers to be
> reused for other domain numbers.
>
> Getting ready to remove pci_get_bus_and_slot() functi
Quoting Mika Kuoppala (2018-02-16 13:42:23)
> Chris Wilson writes:
>
> > The continual resubmission model for execlists (and emulated over guc)
> > requires that we keep feeding requests into the HW in order to generate
> > more CS interrupts to drain the rest of the queue. Add a couple of
> > as
Quoting Christian König (2018-02-16 12:43:38)
> i915 is the only driver using those fields in the drm_gem_object
> structure, so they only waste memory for all other drivers.
>
> Move the fields into drm_i915_gem_object instead and patch the i915 code
> with the following sed commands:
>
> sed -i
== Series Details ==
Series: Documentation patch for batchbuffer submission
URL : https://patchwork.freedesktop.org/series/38433/
State : failure
== Summary ==
Applying: drivers/gpu/drm/i915:Documentation for batchbuffer submission
error: corrupt patch at line 139
error: could not build fake a
From: Kevin Rogovin
This patch attempts to provide text for the kernel documentation on the
subject of batchbuffer submission. The contents of the patch are essentially:
- explain the nature of (PP)GTT and relocation with respect to GPU executing
batchbuffers (as narrative) and
- add a littl
From: Kevin Rogovin
Signed-off-by: Kevin Rogovin
---
Documentation/gpu/i915.rst | 109 +
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 10 +++
2 files changed, 119 insertions(+)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
ind
Quoting Chris Wilson (2018-02-16 13:49:51)
> + for (unsigned i = 0; i < size; i++) {
> + int64_t prio = values[i];
> + int expected = 0;
> + int err;
> +
> + arg.value = prio;
> +
> +
From: Antonio Argenziano
Since commit: drm/i915/scheduler: Support user-defined priorities, the
driver support an extra context param to set context's priority. Add
tests for that interface and update invalid tests.
v2:
- Add arg size validation test. (Chris)
- Add arg value over
From: Antonio Argenziano
v2: Use igt_swap()
Signed-off-by: Antonio Argenziano
Cc: Chris Wilson
Cc: Michal Winiarski
Reviewed-by: Chris Wilson
---
lib/igt_aux.c | 16
lib/igt_aux.h | 1 +
2 files changed, 17 insertions(+)
diff --git a/lib/igt_aux.c b/lib/igt_aux.c
index 8c
The in-lined comments for channel.port doesn't follow the syntax
described at kernel-doc document, causing the following warning:
$ ./scripts/kernel-doc -none drivers/gpu/drm/i915/intel_dpio_phy.c
drivers/gpu/drm/i915/intel_dpio_phy.c:154: warning: Function parameter
or member 'ch
This series fix two bugs at kernel-doc.rst examples and add support
for in-line nested struct comments.
It also converts one documentation at intel_dpio_phy to use it,
in order to give a practical example about how to use it.
Mauro Carvalho Chehab (6):
doc-guide: kernel-doc: fix example for nes
== Series Details ==
Series: drm: move read_domains and write_domain into i915
URL : https://patchwork.freedesktop.org/series/38418/
State : success
== Summary ==
Test perf:
Subgroup oa-exponents:
pass -> FAIL (shard-apl) fdo#102254
Subgroup buffer-f
Chris Wilson writes:
> The continual resubmission model for execlists (and emulated over guc)
> requires that we keep feeding requests into the HW in order to generate
> more CS interrupts to drain the rest of the queue. Add a couple of
> asserts to ensure that we don't skip a cycle and come to a
== Series Details ==
Series: drm: move read_domains and write_domain into i915 (rev2)
URL : https://patchwork.freedesktop.org/series/38418/
State : success
== Summary ==
Series 38418v2 drm: move read_domains and write_domain into i915
https://patchwork.freedesktop.org/api/1.0/series/38418/revi
== Series Details ==
Series: drm: move read_domains and write_domain into i915 (rev2)
URL : https://patchwork.freedesktop.org/series/38418/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5034eda35e5e drm: move read_domains and write_domain into i915 v2
-:15: WARNING: Possible un
i915 is the only driver using those fields in the drm_gem_object
structure, so they only waste memory for all other drivers.
Move the fields into drm_i915_gem_object instead and patch the i915 code
with the following sed commands:
sed -i "s/obj->base.read_domains/obj->read_domains/g" drivers/gpu/
On 16/02/18 12:28, Joonas Lahtinen wrote:
Quoting Lionel Landwerlin (2018-02-15 14:02:02)
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available. Here we introduce a more detailed way of querying the
Am 16.02.2018 um 13:30 schrieb Chris Wilson:
Quoting Christian König (2018-02-16 12:27:28)
Am 16.02.2018 um 11:18 schrieb Chris Wilson:
Quoting Christian König (2018-02-16 09:31:23)
i915 is the only driver using those fields in the drm_gem_object
structure, so they only waste memory for all ot
On Fri, Feb 16, 2018 at 09:49:28AM +0100, Lukas Wunner wrote:
> [trimming cc: a little to avoid spamming folks not directly involved with
> i915]
>
> On Mon, Feb 12, 2018 at 03:04:06PM +0200, Imre Deak wrote:
> > On Sun, Feb 11, 2018 at 10:38:28AM +0100, Lukas Wunner wrote:
> > > i915, malidp and
Quoting Christian König (2018-02-16 12:27:28)
> Am 16.02.2018 um 11:18 schrieb Chris Wilson:
> > Quoting Christian König (2018-02-16 09:31:23)
> >> i915 is the only driver using those fields in the drm_gem_object
> >> structure, so they only waste memory for all other drivers.
> >>
> >> Move the fi
Quoting Lionel Landwerlin (2018-02-15 14:02:02)
> With the introduction of asymmetric slices in CNL, we cannot rely on
> the previous SUBSLICE_MASK getparam to tell userspace what subslices
> are available. Here we introduce a more detailed way of querying the
> Gen's GPU topology that doesn't aggr
Am 16.02.2018 um 11:18 schrieb Chris Wilson:
Quoting Christian König (2018-02-16 09:31:23)
i915 is the only driver using those fields in the drm_gem_object
structure, so they only waste memory for all other drivers.
Move the fields into drm_i915_gem_object instead and patch the i915 code
with t
== Series Details ==
Series: series starting with [1/5] drm/i915/frontbuffer: Pull frontbuffer_flush
out of gem_obj_pin_to_display
URL : https://patchwork.freedesktop.org/series/38410/
State : success
== Summary ==
Test kms_flip:
Subgroup dpms-vs-vblank-race-interruptible:
== Series Details ==
Series: series starting with [CI,1/5] drm/i915/frontbuffer: Pull
frontbuffer_flush out of gem_obj_pin_to_display
URL : https://patchwork.freedesktop.org/series/38408/
State : success
== Summary ==
Test kms_sysfs_edid_timing:
pass -> WARN (shard
Quoting Oscar Mateo (2018-02-15 22:46:42)
> Once upon a time, we tried to apply workarounds for registers that lived
> inside the context image for every new context. That meant emitting LRI
> commands soon after each context was created.
>
> Nowadays, we have a single golden context that gets use
Quoting Christian König (2018-02-16 09:31:23)
> i915 is the only driver using those fields in the drm_gem_object
> structure, so they only waste memory for all other drivers.
>
> Move the fields into drm_i915_gem_object instead and patch the i915 code
> with the following sed commands:
>
> sed -i
Quoting Patchwork (2018-02-15 23:50:52)
> == Series Details ==
>
> Series: drm/i915: Use seqlock in engine stats (rev2)
> URL : https://patchwork.freedesktop.org/series/38347/
> State : failure
>
> == Summary ==
>
> Test perf_pmu:
> Subgroup busy-start-vcs0:
> pass
== Series Details ==
Series: drm: move read_domains and write_domain into i915
URL : https://patchwork.freedesktop.org/series/38418/
State : success
== Summary ==
Series 38418v1 drm: move read_domains and write_domain into i915
https://patchwork.freedesktop.org/api/1.0/series/38418/revisions/1
== Series Details ==
Series: drm: move read_domains and write_domain into i915
URL : https://patchwork.freedesktop.org/series/38418/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3cfcc2e86289 drm: move read_domains and write_domain into i915
-:15: WARNING: Possible unwrapped co
i915 is the only driver using those fields in the drm_gem_object
structure, so they only waste memory for all other drivers.
Move the fields into drm_i915_gem_object instead and patch the i915 code
with the following sed commands:
sed -i "s/obj->base.read_domains/obj->read_domains/g" drivers/gpu/
Quoting Oscar Mateo (2018-02-15 22:46:40)
> This has grown to be a sizable amount of code, so move it to
> its own file before we try to refactor anything. For the moment,
> we are leaving behind the WA BB code and the WAs that get applied
> (incorrectly) in init_clock_gating, but we will deal with
Quoting Oscar Mateo (2018-02-15 22:46:41)
> There are different kind of workarounds (those that modify registers that
> live in the context image, those that modify global registers, those that
> whitelist registers, etc...) and they have different requirements in terms
> of where they are applied
Quoting Oscar Mateo (2018-02-15 22:46:45)
> Move GT WAs appropiately from the current xxx_disp_workarounds_apply
> function to the corresponding xxx_gt_workarounds_apply one.
>
> FIXME: It looks like Chris has found some WAs that actually live in
> the context image. We need to move these to their
A situation we have in the CI farm is that the only machine capable of
performing PSR also happens to have a large panel, too large for PSR to
handle. Flip the small-mode option to enable using the smallest mode by
default, and selecting the preferred mode as the option.
Signed-off-by: Chris Wilso
Signed-off-by: Chris Wilson
---
tests/kms_frontbuffer_tracking.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 2622952c..6c4071de 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
Quoting Dhinakaran Pandiyan (2018-02-16 04:33:22)
> With fbdev, screen freezes after a few continuous PSR exit->enter cycles.
> Printing out the PSR status register clearly showed this freeze coincided
> with exiting when the hardware is in a transitory state. So wait for a max
> of 100 ms (~6 fram
Quoting Dhinakaran Pandiyan (2018-02-16 04:33:21)
> Preparing a framebuffer should not require a flush. _post_plane_update()
> takes care of flushing when a flip is scheduled, this should be
> sufficient for PSR and FBC.
Makes sense.
> Cc: Paulo Zanoni
> Cc: Ville Syrjälä
> Cc: Chris Wilson
>
Quoting Dhinakaran Pandiyan (2018-02-16 04:33:19)
> From: Rodrigo Vivi
>
> So far we are using frontbuffer tracking for everything
> and ignoring that PSR has a HW capable HW tracking for many
> modern usages of GPU on Core platforms and newer Atom ones.
>
> One reason for that is that we were t
== Series Details ==
Series: series starting with [1/6] drm/i915: Move a bunch of workaround-related
code to its own file
URL : https://patchwork.freedesktop.org/series/38397/
State : success
== Summary ==
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-c-frame-sequence:
Quoting Dhinakaran Pandiyan (2018-02-16 04:33:18)
> i915_gem_obj_pin_to_display() calls frontbuffer_flush with origin set to
> DIRTYFB. The callers however are at a vantage point to decide if hardware
> frontbuffer tracking can do the flush for us. For example, legacy cursor
> updates, like flips,
[trimming cc: a little to avoid spamming folks not directly involved with i915]
On Mon, Feb 12, 2018 at 03:04:06PM +0200, Imre Deak wrote:
> On Sun, Feb 11, 2018 at 10:38:28AM +0100, Lukas Wunner wrote:
> > i915, malidp and msm "solved" this issue by not stopping the poll worker
> > on runtime sus
On Wed, 14 Feb 2018, Ville Syrjälä wrote:
> On Tue, Feb 13, 2018 at 04:29:17PM -0800, José Roberto de Souza wrote:
>> data_reg was not being used but it can be used to reduce the number of
>> calls to hsw_dip_data_reg() and just increment the reg by the size of
>> uint32.
>>
>> Signed-off-by: Jos
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