== Series Details ==
Series: ICP initial support (rev2)
URL : https://patchwork.freedesktop.org/series/36350/
State : success
== Summary ==
Test kms_flip:
Subgroup 2x-vblank-vs-dpms-suspend:
skip -> PASS (shard-hsw)
Subgroup plain-flip-fb-recreate:
== Series Details ==
Series: DRM management via cgroups
URL : https://patchwork.freedesktop.org/series/36837/
State : warning
== Summary ==
Series 36837v1 DRM management via cgroups
https://patchwork.freedesktop.org/api/1.0/series/36837/revisions/1/mbox/
Test core_auth:
Subgroup basic
== Series Details ==
Series: drm/i915: Implement display w/a #1143
URL : https://patchwork.freedesktop.org/series/36813/
State : failure
== Summary ==
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
fail -> PASS (shard-snb) fdo
Update i915_context_status to include priority.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index cc659b4b2a45..075b269ac63b 100644
--- a/drivers
GPU contexts are usually created with "normal" priority as a starting point and
then may be adjusted from their either via explicit methods (context_set_param)
or implicit methods (boosts/penalization due to runtime behavior). Let's allow
a system integrator to override this starting GPU priority
Drivers or other kernel subsystems may allow subsystem-specific policy and
configuration to be applied to cgroups. If these subsystems track private data
on a per-cgroup basis, they need a way to be notified about cgroup destruction
so that they can clean up their own internal data for that cgroup
cgroups are a convenient mechanism for system integrators to organize processes
into a logical hierarchy for system configuration purposes. cgroups can be
used to control resources (memory, cpu time share, etc.) or apply other types
of subsystem-specific policy (network priorty, BPF programs, etc.
Most DRM drivers will want to handle the CGROUP_SETPARAM ioctl by looking up a
driver-specific per-cgroup data structure (or allocating a new one) and storing
the supplied parameter value into the data structure (possibly after doing some
checking and sanitization on the provided value). Let's pro
Cc: Tejun Heo
Cc: cgro...@vger.kernel.org
Signed-off-by: Matt Roper
---
include/drm/drm_file.h | 28
1 file changed, 28 insertions(+)
diff --git a/include/drm/drm_file.h b/include/drm/drm_file.h
index 0e0c868451a5..08855a99069c 100644
--- a/include/drm/drm_file.h
++
Drivers may wish to access a cgroup's inode to perform permission checks on
driver-specific operations.
Cc: Tejun Heo
Cc: cgro...@vger.kernel.org
Signed-off-by: Matt Roper
---
fs/kernfs/inode.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/kernfs/inode.c b/fs/kernfs/inode.c
index a3430
Drivers may wish to limit their own cgroup operations to cgroups in the
cgroup-v2 hierarchy. Let's make this helper function usable outside the cgroup
core code.
Cc: Tejun Heo
Cc: cgro...@vger.kernel.org
Signed-off-by: Matt Roper
---
include/linux/cgroup.h | 2 ++
kernel/cgroup/cgroup
cgroups are core kernel mechanism that allows a system integrator /
system administrator to collect OS processes into a hierarchy of groups
according to their intended role in the overall system; resource
management and policy configuration can then be applied to each cgroup
independently.
The DRM
Drivers that handle processes on a per-cgroup basis need to be able to lookup
the cgroup that a process belongs to.
Cc: Tejun Heo
Cc: cgro...@vger.kernel.org
Signed-off-by: Matt Roper
---
include/linux/cgroup.h | 5 -
kernel/cgroup/cgroup-internal.h | 3 ---
kernel/cgroup/cgroup.c
== Series Details ==
Series: scripts/trace.pl: Re-order calculations and fixups
URL : https://patchwork.freedesktop.org/series/36829/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
94bd67c5d6184c435c2fed0bfb39d75b3138b7a8 tools/intel_vbt_decode: update vbt
Hi Mahesh,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.15-rc8 next-20180119]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
== Series Details ==
Series: series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for
another SKU.
URL : https://patchwork.freedesktop.org/series/36828/
State : success
== Summary ==
Series 36828v1 series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI
IDs for another SKU
From: John Harrison
Delay the auto-generation of end/notify values until the point where
everything is known. As opposed to potentially generating them
multiple times with differing values.
Signed-off-by: John Harrison
Cc: Tvrtko Ursulin
---
scripts/trace.pl | 31 ++---
From: John Harrison
There are various statistics being calculated multiple times in
multiple places while the log file is being read in. Some of these are
then re-calculated when the database is munged to correct various
issues with the logs. This patch consolidates the calculations into a
separa
From: John Harrison
Add an extra level to the databse key sort so that the ordering is
deterministic. If the time stamp matches, it now compares the key
itself as well (context/seqno). This makes it much easier to determine
if a change has actually broken anything. Previously back to back runs
wi
From: John Harrison
Cache the key count value rather than querying the hash every time.
Also assert that the database does not magically change size after the
fixups.
Signed-off-by: John Harrison
Cc: Tvrtko Ursulin
---
scripts/trace.pl | 9 ++---
1 file changed, 6 insertions(+), 3 deletio
From: John Harrison
The trace.pl script calculates a bunch of statistics. It also
re-generates some timestamp values to correct issues with the log
being processed. These operations were all mixed up together thus some
were done multiple times (with different results each time). Whereas
some stat
On CNP Pin 3 is for misc of Port F usage depending on the
configuration. For CNL that uses Port F, pin 3 is the one.
v2: Make it more generic and update commit message.
Cc: Anusha Srivatsa
Cc: Lucas De Marchi
Cc: Manasi Navare
Signed-off-by: Rodrigo Vivi
Reviewed-by: Paulo Zanoni
---
driver
On CNP boards that are using DDI F,
bit 25 (SDE_PORTE_HOTPLUG_SPT) is representing
the Digital Port F hotplug line when the Digital
Port F hotplug detect input is enabled.
v2: Reuse all existent structure instead of adding a
new HPD_PORT_F pointing to pin of port E.
v3: Use IS_CNL_WITH_PORT_F so w
On some Cannonlake SKUs we have a dedicated Aux for port F,
that is only the full split between port A and port E.
There is still no Aux E for Port E, as in previous platforms,
because port_E still means shared lanes with port A.
v2: Rebase.
v3: Add couple missed PORT_F cases on intel_dp.
v4: Reb
This was wrong since its introduction on commit '04416108ccea
("drm/i915/cnl: Add registers related to voltage swing sequences.")'
But since no Port F was needed so far we don't need to
propagate fixes back there.
Cc: Lucas De Marchi
Cc: Manasi Navare
Signed-off-by: Rodrigo Vivi
Reviewed-by: D
SKUs that lacks on the full port F split will just time out
when touching this power well bits, causing a noisy warn.
This macro style is a deviation from the original definition in use
for other platforms, but it at least avoid code duplication.
Other smart alternatives like providing a joint lis
Now let's finish the Port-F support by adding the
proper port F detection, irq and power well support.
v2: Rebase
v3: Use BIT_ULL
v4: Cover missed case on ddi init.
v5: Update commit message.
v6: Rebase on top of display headers rework.
Cc: Manasi Navare
Cc: Ville Syrjälä
Signed-off-by: Rodrigo
The only difference is that this SKUs has the full
Port A/E split named as Port F.
But since SKUs differences don't matter on the platform
definition group and ids, let's merge all off them together.
v2: Really include the PCI IDs to the picidlist[];
v3: Add the PCI Id for another SKU (Anusha).
v
On CNL SKUs that uses port F, max DP rate is 8.1G for all
ports when we have the elevated voltage.
v2: Make commit message more generic.
Cc: Lucas De Marchi
Cc: Manasi Navare
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_dp.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletio
Since when it got introduced with commit '555e38d27317
("drm/i915/cnl: DDI - PLL mapping")' the support for Port F
was wrong, because Port F bits are far from bits used
for A to E.
Since Port F is not used so far we don't need to propagate
Fixes back there.
v2: Reuse _SHIFT definition to avoid co
Let's try to simplify this mapping to hpd_pin -> bit
instead using port.
So for CNL with port F where we have this port using
hdp_pin and bits of other ports we don't need to duplicated
the mapping.
But for now this is only a re-org with no functional change
expected.
Cc: Lucas De Marchi
Suggest
== Series Details ==
Series: igt/gen7_forcewake_mt: Make the mmio register as volatile
URL : https://patchwork.freedesktop.org/series/36826/
State : failure
== Summary ==
IGT patchset tested on top of latest successful build
94bd67c5d6184c435c2fed0bfb39d75b3138b7a8 tools/intel_vbt_decode: upda
Prevent the compiler from caching reads/writes to the hw register as we
do want to perform mmio.
Signed-off-by: Chris Wilson
---
tests/gen7_forcewake_mt.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/tests/gen7_forcewake_mt.c b/tests/gen7_forcewake_mt.c
index 07320ef9
On 19/01/18 11:30, Kelvin Gardiner wrote:
This patch clears a single bit. The bit is 0 by default but expected not to be
set. Explicitly clearing the bit in this patch is intended to indicate some
thinking has occurred, and that we want this bit cleared and we are not just
excepting the default
On Fri, Jan 19, 2018 at 09:42:14PM +, Pandiyan, Dhinakaran wrote:
> On Thu, 2018-01-18 at 23:26 -0800, Rodrigo Vivi wrote:
> > On Fri, Jan 12, 2018 at 09:57:07PM +, Dhinakaran Pandiyan wrote:
> > > The frame counter may have got reset between disabling and enabling vblank
> > > interrupts d
On Fri, Jan 19, 2018 at 10:02:12PM +, Pandiyan, Dhinakaran wrote:
>
>
>
> On Fri, 2018-01-19 at 00:01 -0800, Rodrigo Vivi wrote:
> > On Fri, Jan 12, 2018 at 09:57:06PM +, Dhinakaran Pandiyan wrote:
> > > The HW frame counter can get reset if device enters a low power state
> > > after
>
On Fri, 2018-01-19 at 00:01 -0800, Rodrigo Vivi wrote:
> On Fri, Jan 12, 2018 at 09:57:06PM +, Dhinakaran Pandiyan wrote:
> > The HW frame counter can get reset if device enters a low power state after
> > vblank interrupts were disabled. This messes up any following vblank count
> > update
== Series Details ==
Series: series starting with [1/2] drm/i915: Track the number of times we have
woken the GPU up
URL : https://patchwork.freedesktop.org/series/36802/
State : failure
== Summary ==
Warning: bzip CI_DRM_3658/shard-glkb6/results22.json.bz2 wasn't in correct JSON
format
Test
On Thu, 2018-01-18 at 23:26 -0800, Rodrigo Vivi wrote:
> On Fri, Jan 12, 2018 at 09:57:07PM +, Dhinakaran Pandiyan wrote:
> > The frame counter may have got reset between disabling and enabling vblank
> > interrupts due to DMC putting the hardware to DC5/6 state if PSR was
> > active. The frame
On Thu, 2018-01-18 at 23:36 -0800, Rodrigo Vivi wrote:
> On Fri, Jan 12, 2018 at 09:57:03PM +, Dhinakaran Pandiyan wrote:
> > drm_vblank_count() has a u32 type returning what is a 64-bit vblank count.
> > The effect of this is when drm_wait_vblank_ioctl() tries to widen the user
> > space reque
== Series Details ==
Series: drm/i915: Shrink the request kmem_cache on allocation error
URL : https://patchwork.freedesktop.org/series/36800/
State : success
== Summary ==
Warning: bzip CI_DRM_3658/shard-glkb6/results22.json.bz2 wasn't in correct JSON
format
Test kms_frontbuffer_tracking:
Quoting Tvrtko Ursulin (2018-01-19 13:45:24)
> + case I915_CONTEXT_GET_ENGINE_BUSY:
> + engine = intel_engine_lookup_user(i915, args->class,
> + args->instance);
> + if (!engine) {
> + ret = -EIN
Quoting Tvrtko Ursulin (2018-01-19 16:26:16)
> From: Tvrtko Ursulin
>
> Some customers want to know how much of the GPU time are their clients
> using in order to make dynamic load balancing decisions.
>
> With the hooks already in place which track the overall engine busyness,
> we can extend t
On Fri, 2018-01-19 at 10:17 +0200, Jani Nikula wrote:
> On Thu, 18 Jan 2018, Adam Jackson wrote:
> > On Thu, 2018-01-18 at 17:06 +0200, Jani Nikula wrote:
> > > No more sing-a-ling.
> > >
> > > Reported-by: Adam Jackson
> >
> > Why'd you omit the typos I reported in tools/intel_vbt_decode.c ?
>
Quoting Michał Winiarski (2018-01-19 13:36:27)
> On Fri, Jan 19, 2018 at 12:49:26PM +, Michal Wajdeczko wrote:
> > It looks that GuC log functionality is not fully functional yet and
> > causes issues when enabled by auto(-1) modparam on debug builds.
> >
> > [ 30.062893] ===
Yes, this applies to CFL also. CFL follows on from KBL and doesn't have any
display changes, so for the workarounds you can translate KBL:All to CFL:All.
There is a note about that.
-Original Message-
From: Vivi, Rodrigo
Sent: Friday, 19 January, 2018 12:08 PM
To: Ville Syrjala
Cc: i
Quoting Paulo Zanoni (2018-01-19 18:10:51)
> Em Sex, 2018-01-19 às 17:30 +, Tvrtko Ursulin escreveu:
> > On 10/01/2018 10:16, Joonas Lahtinen wrote:
> > > If these are in a later patch, should be squashed here.
> >
> > It might be possible in some cases, or it might be quite challenging
> > in
== Series Details ==
Series: drm/i915: expose RCS topology to userspace
URL : https://patchwork.freedesktop.org/series/36793/
State : success
== Summary ==
Warning: bzip CI_DRM_3658/shard-glkb6/results22.json.bz2 wasn't in correct JSON
format
Test perf:
Subgroup oa-exponents:
Em Qui, 2018-01-11 às 16:00 -0200, Paulo Zanoni escreveu:
> Hi
>
> This series adds the initial support for ICP. No conflicts with the
> other
> series. Patches 1 and 2 are parts of other series that we've already
> been
> discussing on this mailing list, but I put them here so CI can do the
> rig
On Fri, Jan 19, 2018 at 06:45:49PM +, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Apparently SKL/KBL need some manual help to get the
> programmed HDMI vswing to stick. Implement the relevant
> workaround (display w/a #1143).
>
> Note that the relevant chicken bits live in a transcoder re
On Fri, Jan 19, 2018 at 06:48:12PM +, Paulo Zanoni wrote:
> From: Anusha Srivatsa
>
> ICP has two backlight controllers - similar to previous platforms like
> BXT -, but we only use one controller for now, so we can just reuse
> the CNP code.
>
> v2: Remove the usage of ICP_SECOND_PPS_BACKLI
== Series Details ==
Series: ICP initial support (rev2)
URL : https://patchwork.freedesktop.org/series/36350/
State : success
== Summary ==
Series 36350v2 ICP initial support
https://patchwork.freedesktop.org/api/1.0/series/36350/revisions/2/mbox/
Test debugfs_test:
Subgroup read_all_
On Fri, Jan 19, 2018 at 10:48 AM, Paulo Zanoni
wrote:
>
> From: Anusha Srivatsa
>
> ICP has two backlight controllers - similar to previous platforms like
> BXT -, but we only use one controller for now, so we can just reuse
> the CNP code.
>
> v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT reg
== Series Details ==
Series: drm/i915/guc: Keep GuC log disabled by default
URL : https://patchwork.freedesktop.org/series/36796/
State : failure
== Summary ==
Warning: bzip CI_DRM_3658/shard-glkb6/results22.json.bz2 wasn't in correct JSON
format
Test pm_rps:
Subgroup reset:
This patch clears a single bit. The bit is 0 by default but expected not to be
set. Explicitly clearing the bit in this patch is intended to indicate some
thinking has occurred, and that we want this bit cleared and we are not just
excepting the default value.
v2 (from Paulo): fix indentation.
v3:
== Series Details ==
Series: drm/i915: Implement display w/a #1143
URL : https://patchwork.freedesktop.org/series/36813/
State : success
== Summary ==
Series 36813v1 drm/i915: Implement display w/a #1143
https://patchwork.freedesktop.org/api/1.0/series/36813/revisions/1/mbox/
Test debugfs_tes
From: Anusha Srivatsa
ICP has two backlight controllers - similar to previous platforms like
BXT -, but we only use one controller for now, so we can just reuse
the CNP code.
v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
Reuse CNP code since it is very similar.(Ville)
v3 (from
From: Ville Syrjälä
Apparently SKL/KBL need some manual help to get the
programmed HDMI vswing to stick. Implement the relevant
workaround (display w/a #1143).
Note that the relevant chicken bits live in a transcoder register
even though the bits affect a specific DDI port rather than a
specific
>-Original Message-
>From: Zanoni, Paulo R
>Sent: Friday, January 19, 2018 10:25 AM
>To: Vivi, Rodrigo ; Srivatsa, Anusha
>
>Cc: Ausmus, James ; Nikula, Jani
>; intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH 6/8] drm/i915/icp: Add backlight Support for
>ICP
>
>Em Sex, 2
Em Sex, 2018-01-19 às 09:56 -0800, Rodrigo Vivi escreveu:
> On Fri, Jan 19, 2018 at 05:26:02PM +, Anusha Srivatsa wrote:
> > On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > > On Thu, Jan 11, 2018 at 09:48:57PM +
On Fri, Jan 19, 2018 at 09:26:02AM -0800, Anusha Srivatsa wrote:
> On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > > > On Thu, Jan 11, 2018 at 04:00:08
Em Sex, 2018-01-19 às 17:30 +, Tvrtko Ursulin escreveu:
> On 10/01/2018 10:16, Joonas Lahtinen wrote:
> > On Tue, 2018-01-09 at 21:23 -0200, Paulo Zanoni wrote:
> > > From: Tvrtko Ursulin
> > >
> > > v2: Rebase.
> > >
> > > v3:
> > >* Remove DPF, it has been removed from SKL+.
> > >*
== Series Details ==
Series: drm/i915: Avoid leaking lpe audio platdev.data
URL : https://patchwork.freedesktop.org/series/35151/
State : failure
== Summary ==
Test perf:
Subgroup buffer-fill:
pass -> FAIL (shard-apl) fdo#103755
Subgroup enable-disab
On Fri, Jan 19, 2018 at 05:26:02PM +, Anusha Srivatsa wrote:
> On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > > > On Thu, Jan 11, 2018 at 04:00:08
On 10/01/2018 10:16, Joonas Lahtinen wrote:
On Tue, 2018-01-09 at 21:23 -0200, Paulo Zanoni wrote:
From: Tvrtko Ursulin
v2: Rebase.
v3:
* Remove DPF, it has been removed from SKL+.
* Fix -internal rebase wrt. execlists interrupt handling.
v4: Rebase.
v5:
* Updated for POR changes.
On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > > From: Anusha Srivatsa
> > > >
> >
On 1/19/2018 2:00 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Render engine constructor helpers must only be called from the render
engine constructors, but there is no need to burden the production
binaries with warnings which can only be triggered during development.
Signed-off-by: Tvrtko
Hi,
On 19/01/2018 16:45, Peter Zijlstra wrote:
On Thu, Jan 18, 2018 at 06:40:07PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
For situations where sysadmins might want to allow different level of
of access control for different PMUs, we start creating per-PMU
perf_event_paranoid contro
== Series Details ==
Series: Per-context and per-client engine busyness (rev3)
URL : https://patchwork.freedesktop.org/series/32645/
State : failure
== Summary ==
Series 32645v3 Per-context and per-client engine busyness
https://patchwork.freedesktop.org/api/1.0/series/32645/revisions/3/mbox/
On Thu, Jan 18, 2018 at 06:40:07PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> For situations where sysadmins might want to allow different level of
> of access control for different PMUs, we start creating per-PMU
> perf_event_paranoid controls in sysfs.
You've completely and utterl
Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > From: Anusha Srivatsa
> > >
> > > ICP has two backlight controllers - similar to previous platforms
> >
From: Tvrtko Ursulin
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the hooks already in place which track the overall engine busyness,
we can extend that slightly to split that time between contexts.
v2: Fix
On 19/01/18 05:05, Mika Kuoppala wrote:
Daniele Ceraolo Spurio writes:
From: Thomas Daniel
Enhanced Execlists is an upgraded version of execlists which supports
up to 8 ports. The lrcs to be submitted are written to a submit queue,
which is then loaded on the HW. When writing to the ELSP r
== Series Details ==
Series: series starting with [1/2] drm/i915: Track the number of times we have
woken the GPU up
URL : https://patchwork.freedesktop.org/series/36802/
State : success
== Summary ==
Series 36802v1 series starting with [1/2] drm/i915: Track the number of times
we have woken
== Series Details ==
Series: drm/i915: Shrink the request kmem_cache on allocation error
URL : https://patchwork.freedesktop.org/series/36800/
State : success
== Summary ==
Series 36800v1 drm/i915: Shrink the request kmem_cache on allocation error
https://patchwork.freedesktop.org/api/1.0/seri
On Thu, Oct 12, 2017 at 12:13:38PM -0700, Manasi Navare wrote:
> In case of eDP because the panel has a fixed mode, the link rate
> and lane count at which it is trained corresponds to the link BW
> required to support the native resolution of the panel. In case of
> panles with lower resolutions w
== Series Details ==
Series: drm/i915: add support for specifying DMC firmware override by module
param (rev2)
URL : https://patchwork.freedesktop.org/series/34157/
State : failure
== Summary ==
Test gem_eio:
Subgroup in-flight-suspend:
pass -> FAIL (shard-
== Series Details ==
Series: drm/i915: Fix up the CCS code (rev3)
URL : https://patchwork.freedesktop.org/series/29308/
State : failure
== Summary ==
Applying: drm/i915: Add a comment exlaining CCS hsub/vsub
Applying: drm/i915: Nuke a pointless unreachable()
Using index info to reconstruct a b
== Series Details ==
Series: Per-context and per-client engine busyness (rev2)
URL : https://patchwork.freedesktop.org/series/32645/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
== Series Details ==
Series: drm/i915: expose RCS topology to userspace
URL : https://patchwork.freedesktop.org/series/36793/
State : success
== Summary ==
Series 36793v1 drm/i915: expose RCS topology to userspace
https://patchwork.freedesktop.org/api/1.0/series/36793/revisions/1/mbox/
Test d
When we finally decide the gpu is idle, that is a good time to shrink
our kmem_caches.
v3: Defer until an rcu grace period after we idle.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 65 +
1 file changed, 65 insert
By counting the number of times we have woken up, we have a very simple
means of defining an epoch, which will come in handy if we want to
perform deferred tasks at the end of an epoch (i.e. while we are going
to sleep) without imposing on the next activity cycle.
Signed-off-by: Chris Wilson
---
== Series Details ==
Series: drm/i915/guc: Keep GuC log disabled by default
URL : https://patchwork.freedesktop.org/series/36796/
State : success
== Summary ==
Series 36796v1 drm/i915/guc: Keep GuC log disabled by default
https://patchwork.freedesktop.org/api/1.0/series/36796/revisions/1/mbox/
On 19/01/18 14:24, Tvrtko Ursulin wrote:
On 19/01/2018 13:22, Lionel Landwerlin wrote:
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available. Here we introduce a more detailed way of querying the
G
If we fail to allocate a new request, make sure we recover the pages
that are in the process of being freed by inserting an RCU barrier.
v2: Comment before the shrink and barrier in the error path.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
From: Ville Syrjälä
Let's document why we claim hsub==8,vsub==16 for CCS.
v2: Replace my explanation with Jason's
Cc: Daniel Vetter
Cc: Ben Widawsky
Cc: Jason Ekstrand
Cc: Daniel Stone
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 14 ++
1 file change
== Series Details ==
Series: series starting with [1/3] drm/i915: Downgrade incorrect engine
constructor usage warnings to development
URL : https://patchwork.freedesktop.org/series/36771/
State : failure
== Summary ==
Test perf:
Subgroup oa-exponents:
fail -> PA
== Series Details ==
Series: drm/i915: Avoid leaking lpe audio platdev.data
URL : https://patchwork.freedesktop.org/series/35151/
State : success
== Summary ==
Series 35151v1 drm/i915: Avoid leaking lpe audio platdev.data
https://patchwork.freedesktop.org/api/1.0/series/35151/revisions/1/mbox/
On 19/01/2018 13:22, Lionel Landwerlin wrote:
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available. Here we introduce a more detailed way of querying the
Gen's GPU topology that doesn't aggregate n
On Mon, 18 Dec 2017, Mika Kahola wrote:
> We may have fused or unused pipes in our system. Let's check that the pipe
> in question is within limits of accessible pipes. In case, that we are not
> able to access the pipe, we return early with a warning.
>
> v2: Rephrasing of the commit message (Jan
On Fri, 19 Jan 2018, Michał Winiarski wrote:
> On Fri, Jan 19, 2018 at 12:49:26PM +, Michal Wajdeczko wrote:
>> It looks that GuC log functionality is not fully functional yet and
>> causes issues when enabled by auto(-1) modparam on debug builds.
This could use a better explanation. Now it s
On Sat, 09 Dec 2017, Chris Wilson wrote:
> The struct platform_device memdups the provided data pointer requiring
> us to free the template we construct during lpe_audio_platdev_create():
>
> unreferenced object 0x88026eafe400 (size 512):
> comm "insmod", pid 6850, jiffies 4295060179 (age 22
Daniele Ceraolo Spurio writes:
> From: Thomas Daniel
>
> Enhanced Execlists is an upgraded version of execlists which supports
> up to 8 ports. The lrcs to be submitted are written to a submit queue,
> which is then loaded on the HW. When writing to the ELSP register, the
> lrcs are written cycl
Now that we have that information in topology fields, let's just reused it.
v2: Style tweaks (Tvrtko)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 27 +++
1 file changed, 11 insertions(+), 16 deletions(-)
diff -
From: Tvrtko Ursulin
Some clients have the DRM fd passed to them over a socket by the X server.
Grab the real client and pid when they create their first context and
update the exposed data for more useful enumeration.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h
Quoting Tvrtko Ursulin (2018-01-19 11:45:24)
>
> On 18/01/2018 11:57, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-01-18 10:41:36)
> >> From: Tvrtko Ursulin
> >>
> >> We add a PMU counter to expose the number of requests currently executing
> >> on the GPU.
> >>
> >> This is useful to ana
From: Tvrtko Ursulin
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the accounting infrastructure in place in the previous patch, we add
a new context param (I915_CONTEXT_GET_ENGINE_BUSY) which takes a class an
From: Tvrtko Ursulin
By default we are not collecting any per-engine and per-context
statistcs.
Add a new sysfs toggle to enable this facility:
$ echo 1 >/sys/class/drm/card0/clients/enable_stats
v2: Rebase.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
driver
From: Tvrtko Ursulin
I have sent this as part of a larger series back in October '17.
First part of it is implementing a customer requirement to be able to query
engine utilization on their own contexts. This is done in patch 2, which falls
under the standard open source userspace requirements e
From: Tvrtko Ursulin
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the hooks already in place which track the overall engine busyness,
we can extend that slightly to split that time between contexts.
v2: Fix
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